[J-u-boot.git] / drivers / rtc / ds1307.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2001, 2002, 2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 * Keith Outwater, [email protected]`
 * Steven Scholz, [email protected]
 */

/*
 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
 * DS1307 and DS1338/9 Real Time Clock (RTC).
 *
 * based on ds1337.c
 */

#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
#include <rtc.h>
#include <i2c.h>

enum ds_type {
	ds_1307,
	ds_1337,
	ds_1339,
	ds_1340,
	m41t11,
	mcp794xx,
};

/*
 * RTC register addresses
 */
#define RTC_SEC_REG_ADDR	0x00
#define RTC_MIN_REG_ADDR	0x01
#define RTC_HR_REG_ADDR		0x02
#define RTC_DAY_REG_ADDR	0x03
#define RTC_DATE_REG_ADDR	0x04
#define RTC_MON_REG_ADDR	0x05
#define RTC_YR_REG_ADDR		0x06
#define RTC_CTL_REG_ADDR	0x07

#define DS1337_CTL_REG_ADDR	0x0e
#define DS1337_STAT_REG_ADDR	0x0f
#define DS1340_STAT_REG_ADDR	0x09

#define RTC_STAT_BIT_OSF	0x80

#define RTC_SEC_BIT_CH		0x80	/* Clock Halt (in Register 0)   */

/* DS1307-specific bits */
#define RTC_CTL_BIT_RS0		0x01	/* Rate select 0                */
#define RTC_CTL_BIT_RS1		0x02	/* Rate select 1                */
#define RTC_CTL_BIT_SQWE	0x10	/* Square Wave Enable           */
#define RTC_CTL_BIT_OUT		0x80	/* Output Control               */

/* DS1337-specific bits */
#define DS1337_CTL_BIT_RS1	0x08	/* Rate select 1                */
#define DS1337_CTL_BIT_RS2	0x10	/* Rate select 2                */
#define DS1337_CTL_BIT_EOSC	0x80	/* Enable Oscillator            */

/* DS1340-specific bits */
#define DS1340_SEC_BIT_EOSC	0x80	/* Enable Oscillator            */
#define DS1340_CTL_BIT_OUT	0x80	/* Output Control               */

/* MCP7941X-specific bits */
#define MCP7941X_BIT_ST		0x80
#define MCP7941X_BIT_VBATEN	0x08

#ifndef CONFIG_DM_RTC

/*---------------------------------------------------------------------*/
#undef DEBUG_RTC

#ifdef DEBUG_RTC
#define DEBUGR(fmt, args...) printf(fmt, ##args)
#else
#define DEBUGR(fmt, args...)
#endif
/*---------------------------------------------------------------------*/

#ifndef CFG_SYS_I2C_RTC_ADDR
# define CFG_SYS_I2C_RTC_ADDR	0x68
#endif

#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
# error The DS1307 is specified only up to 100kHz!
#endif

static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);

/*
 * Get the current time from the RTC
 */
int rtc_get (struct rtc_time *tmp)
{
	int rel = 0;
	uchar sec, min, hour, mday, wday, mon, year;

#ifdef CONFIG_RTC_MCP79411
read_rtc:
#endif
	sec = rtc_read (RTC_SEC_REG_ADDR);
	min = rtc_read (RTC_MIN_REG_ADDR);
	hour = rtc_read (RTC_HR_REG_ADDR);
	wday = rtc_read (RTC_DAY_REG_ADDR);
	mday = rtc_read (RTC_DATE_REG_ADDR);
	mon = rtc_read (RTC_MON_REG_ADDR);
	year = rtc_read (RTC_YR_REG_ADDR);

	DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
		"hr: %02x min: %02x sec: %02x\n",
		year, mon, mday, wday, hour, min, sec);

#ifdef CONFIG_RTC_DS1307
	if (sec & RTC_SEC_BIT_CH) {
		printf ("### Warning: RTC oscillator has stopped\n");
		/* clear the CH flag */
		rtc_write (RTC_SEC_REG_ADDR,
			   rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
		rel = -1;
	}
#endif

#ifdef CONFIG_RTC_MCP79411
	/* make sure that the backup battery is enabled */
	if (!(wday & MCP7941X_BIT_VBATEN)) {
		rtc_write(RTC_DAY_REG_ADDR,
			  wday | MCP7941X_BIT_VBATEN);
	}

	/* clock halted?  turn it on, so clock can tick. */
	if (!(sec & MCP7941X_BIT_ST)) {
		rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST);
		printf("Started RTC\n");
		goto read_rtc;
	}
#endif

	tmp->tm_sec  = bcd2bin (sec & 0x7F);
	tmp->tm_min  = bcd2bin (min & 0x7F);
	tmp->tm_hour = bcd2bin (hour & 0x3F);
	tmp->tm_mday = bcd2bin (mday & 0x3F);
	tmp->tm_mon  = bcd2bin (mon & 0x1F);
	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
	tmp->tm_yday = 0;
	tmp->tm_isdst= 0;

	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return rel;
}

/*
 * Set the RTC
 */
int rtc_set (struct rtc_time *tmp)
{
	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
		printf("WARNING: year should be between 1970 and 2069!\n");

	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
#ifdef CONFIG_RTC_MCP79411
	rtc_write (RTC_DAY_REG_ADDR,
		   bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN);
#else
	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
#endif
	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
#ifdef CONFIG_RTC_MCP79411
	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST);
#else
	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
#endif

	return 0;
}

/*
 * Reset the RTC. We setting the date back to 1970-01-01.
 * We also enable the oscillator output on the SQW/OUT pin and program
 * it for 32,768 Hz output. Note that according to the datasheet, turning
 * on the square wave output increases the current drain on the backup
 * battery to something between 480nA and 800nA.
 */
void rtc_reset (void)
{
	rtc_write (RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0);
}

/*
 * Helper functions
 */

static
uchar rtc_read (uchar reg)
{
	return (i2c_reg_read (CFG_SYS_I2C_RTC_ADDR, reg));
}

static void rtc_write (uchar reg, uchar val)
{
	i2c_reg_write (CFG_SYS_I2C_RTC_ADDR, reg, val);
}

#endif /* !CONFIG_DM_RTC */

#ifdef CONFIG_DM_RTC
static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm)
{
	int ret;
	uchar buf[7];
	enum ds_type type = dev_get_driver_data(dev);

	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	      tm->tm_hour, tm->tm_min, tm->tm_sec);

	if (tm->tm_year < 1970 || tm->tm_year > 2069)
		printf("WARNING: year should be between 1970 and 2069!\n");

	buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
	buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
	buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
	buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
	buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
	buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
	buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);

	if (type == mcp794xx) {
		buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN;
		buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST;
	}

	ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
	if (ret < 0)
		return ret;

	if (type == ds_1337) {
		/* Ensure oscillator is enabled */
		dm_i2c_reg_write(dev, DS1337_CTL_REG_ADDR, 0);
	}

	return 0;
}

static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm)
{
	int ret;
	uchar buf[7];
	enum ds_type type = dev_get_driver_data(dev);

	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
	if (ret < 0)
		return ret;

	if (type == ds_1337 || type == ds_1340) {
		uint reg = (type == ds_1337) ? DS1337_STAT_REG_ADDR :
					       DS1340_STAT_REG_ADDR;
		int status = dm_i2c_reg_read(dev, reg);

		if (status >= 0 && (status & RTC_STAT_BIT_OSF)) {
			printf("### Warning: RTC oscillator has stopped\n");
			/* clear the OSF flag */
			dm_i2c_reg_write(dev, reg, status & ~RTC_STAT_BIT_OSF);
		}
	}

	tm->tm_sec  = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
	tm->tm_min  = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
	tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
	tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
	tm->tm_mon  = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
	tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
			      (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
			       1900 : 2000);
	tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
	tm->tm_yday = 0;
	tm->tm_isdst = 0;

	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	      tm->tm_hour, tm->tm_min, tm->tm_sec);

	return 0;
}

static int ds1307_rtc_reset(struct udevice *dev)
{
	int ret;
	enum ds_type type = dev_get_driver_data(dev);

	/*
	 * reset clock/oscillator in the seconds register:
	 * on DS1307 bit 7 enables Clock Halt (CH),
	 * on DS1340 bit 7 disables the oscillator (not EOSC)
	 * on MCP794xx bit 7 enables Start Oscillator (ST)
	 */
	ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
	if (ret < 0)
		return ret;

	if (type == ds_1307) {
		/* Write control register in order to enable square-wave
		 * output (SQWE) and set a default rate of 32.768kHz (RS1|RS0).
		 */
		ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
				       RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
				       RTC_CTL_BIT_RS0);
	} else if (type == ds_1337) {
		/* Write control register in order to enable oscillator output
		 * (not EOSC) and set a default rate of 32.768kHz (RS2|RS1).
		 */
		ret = dm_i2c_reg_write(dev, DS1337_CTL_REG_ADDR,
				       DS1337_CTL_BIT_RS2 | DS1337_CTL_BIT_RS1);
	} else if (type == ds_1340 || type == mcp794xx || type == m41t11) {
		/* Reset clock calibration, frequency test and output level. */
		ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, 0x00);
	}

	return ret;
}

static int ds1307_probe(struct udevice *dev)
{
	i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
			   DM_I2C_CHIP_WR_ADDRESS);

	return 0;
}

static const struct rtc_ops ds1307_rtc_ops = {
	.get = ds1307_rtc_get,
	.set = ds1307_rtc_set,
	.reset = ds1307_rtc_reset,
};

static const struct udevice_id ds1307_rtc_ids[] = {
	{ .compatible = "dallas,ds1307", .data = ds_1307 },
	{ .compatible = "dallas,ds1337", .data = ds_1337 },
	{ .compatible = "dallas,ds1339", .data = ds_1339 },
	{ .compatible = "dallas,ds1340", .data = ds_1340 },
	{ .compatible = "microchip,mcp7940x", .data = mcp794xx },
	{ .compatible = "microchip,mcp7941x", .data = mcp794xx },
	{ .compatible = "st,m41t11", .data = m41t11 },
	{ }
};

U_BOOT_DRIVER(rtc_ds1307) = {
	.name	= "rtc-ds1307",
	.id	= UCLASS_RTC,
	.probe	= ds1307_probe,
	.of_match = ds1307_rtc_ids,
	.ops	= &ds1307_rtc_ops,
};
#endif /* CONFIG_DM_RTC */
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
1cb8e980 WD	2	/*
	3	* (C) Copyright 2001, 2002, 2003
	4	* Wolfgang Denk, DENX Software Engineering, [email protected].
	5	* Keith Outwater, [email protected]`
	6	* Steven Scholz, [email protected]
1cb8e980 WD	7	*/
	8
	9	/*
	10	* Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
412921d2	11	* DS1307 and DS1338/9 Real Time Clock (RTC).
1cb8e980 WD	12	*
	13	* based on ds1337.c
	14	*/
	15
03de305e	16	#include <config.h>
1cb8e980	17	#include <command.h>
d425d605	18	#include <dm.h>
f7ae49fc	19	#include <log.h>
1cb8e980 WD	20	#include <rtc.h>
	21	#include <i2c.h>
	22
d425d605 CP	23	enum ds_type {
	24	ds_1307,
	25	ds_1337,
f65774e1	26	ds_1339,
d425d605	27	ds_1340,
8dd6803d	28	m41t11,
d425d605 CP	29	mcp794xx,
d425d605 CP	30	};
1cb8e980 WD	31
	32	/*
	33	* RTC register addresses
	34	*/
	35	#define RTC_SEC_REG_ADDR 0x00
	36	#define RTC_MIN_REG_ADDR 0x01
	37	#define RTC_HR_REG_ADDR 0x02
	38	#define RTC_DAY_REG_ADDR 0x03
	39	#define RTC_DATE_REG_ADDR 0x04
	40	#define RTC_MON_REG_ADDR 0x05
	41	#define RTC_YR_REG_ADDR 0x06
	42	#define RTC_CTL_REG_ADDR 0x07
	43
07c65240 MT	44	#define DS1337_CTL_REG_ADDR 0x0e
	45	#define DS1337_STAT_REG_ADDR 0x0f
	46	#define DS1340_STAT_REG_ADDR 0x09
	47
	48	#define RTC_STAT_BIT_OSF 0x80
	49
1cb8e980 WD	50	#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
1cb8e980 WD	51
223c4490	52	/* DS1307-specific bits */
1cb8e980 WD	53	#define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */
	54	#define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */
	55	#define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */
	56	#define RTC_CTL_BIT_OUT 0x80 /* Output Control */
	57
223c4490 CS	58	/* DS1337-specific bits */
	59	#define DS1337_CTL_BIT_RS1 0x08 /* Rate select 1 */
	60	#define DS1337_CTL_BIT_RS2 0x10 /* Rate select 2 */
	61	#define DS1337_CTL_BIT_EOSC 0x80 /* Enable Oscillator */
	62
	63	/* DS1340-specific bits */
	64	#define DS1340_SEC_BIT_EOSC 0x80 /* Enable Oscillator */
	65	#define DS1340_CTL_BIT_OUT 0x80 /* Output Control */
	66
c79e1c1c AF	67	/* MCP7941X-specific bits */
	68	#define MCP7941X_BIT_ST 0x80
	69	#define MCP7941X_BIT_VBATEN 0x08
	70
d425d605 CP	71	#ifndef CONFIG_DM_RTC
d425d605 CP	72
d425d605 CP	73	/---------------------------------------------------------------------/
	74	#undef DEBUG_RTC
	75
	76	#ifdef DEBUG_RTC
	77	#define DEBUGR(fmt, args...) printf(fmt, ##args)
	78	#else
	79	#define DEBUGR(fmt, args...)
	80	#endif
	81	/---------------------------------------------------------------------/
	82
65cc0e2a TR	83	#ifndef CFG_SYS_I2C_RTC_ADDR
65cc0e2a TR	84	# define CFG_SYS_I2C_RTC_ADDR 0x68
d425d605 CP	85	#endif
	86
	87	#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
	88	# error The DS1307 is specified only up to 100kHz!
	89	#endif
	90
1cb8e980 WD	91	static uchar rtc_read (uchar reg);
1cb8e980 WD	92	static void rtc_write (uchar reg, uchar val);
1cb8e980 WD	93
	94	/*
	95	* Get the current time from the RTC
	96	*/
b73a19e1	97	int rtc_get (struct rtc_time *tmp)
1cb8e980	98	{
b73a19e1	99	int rel = 0;
1cb8e980 WD	100	uchar sec, min, hour, mday, wday, mon, year;
1cb8e980 WD	101
c79e1c1c AF	102	#ifdef CONFIG_RTC_MCP79411
	103	read_rtc:
	104	#endif
1cb8e980 WD	105	sec = rtc_read (RTC_SEC_REG_ADDR);
	106	min = rtc_read (RTC_MIN_REG_ADDR);
	107	hour = rtc_read (RTC_HR_REG_ADDR);
	108	wday = rtc_read (RTC_DAY_REG_ADDR);
	109	mday = rtc_read (RTC_DATE_REG_ADDR);
	110	mon = rtc_read (RTC_MON_REG_ADDR);
	111	year = rtc_read (RTC_YR_REG_ADDR);
	112
	113	DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	114	"hr: %02x min: %02x sec: %02x\n",
	115	year, mon, mday, wday, hour, min, sec);
	116
c79e1c1c	117	#ifdef CONFIG_RTC_DS1307
1cb8e980 WD	118	if (sec & RTC_SEC_BIT_CH) {
	119	printf ("### Warning: RTC oscillator has stopped\n");
	120	/* clear the CH flag */
	121	rtc_write (RTC_SEC_REG_ADDR,
	122	rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
b73a19e1	123	rel = -1;
1cb8e980	124	}
c79e1c1c AF	125	#endif
	126
	127	#ifdef CONFIG_RTC_MCP79411
	128	/* make sure that the backup battery is enabled */
	129	if (!(wday & MCP7941X_BIT_VBATEN)) {
	130	rtc_write(RTC_DAY_REG_ADDR,
	131	wday \| MCP7941X_BIT_VBATEN);
	132	}
	133
	134	/* clock halted? turn it on, so clock can tick. */
	135	if (!(sec & MCP7941X_BIT_ST)) {
	136	rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST);
	137	printf("Started RTC\n");
	138	goto read_rtc;
	139	}
	140	#endif
	141
1cb8e980 WD	142	tmp->tm_sec = bcd2bin (sec & 0x7F);
	143	tmp->tm_min = bcd2bin (min & 0x7F);
	144	tmp->tm_hour = bcd2bin (hour & 0x3F);
	145	tmp->tm_mday = bcd2bin (mday & 0x3F);
	146	tmp->tm_mon = bcd2bin (mon & 0x1F);
	147	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	148	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
	149	tmp->tm_yday = 0;
	150	tmp->tm_isdst= 0;
	151
	152	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	153	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	154	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	155
b73a19e1 YT	156	return rel;
1cb8e980 WD	157	}
1cb8e980 WD	158
1cb8e980 WD	159	/*
	160	* Set the RTC
	161	*/
d1e23194	162	int rtc_set (struct rtc_time *tmp)
1cb8e980 WD	163	{
	164	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	165	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	166	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	167
	168	if (tmp->tm_year < 1970 \|\| tmp->tm_year > 2069)
	169	printf("WARNING: year should be between 1970 and 2069!\n");
8bde7f77	170
1cb8e980 WD	171	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
1cb8e980 WD	172	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
c79e1c1c AF	173	#ifdef CONFIG_RTC_MCP79411
	174	rtc_write (RTC_DAY_REG_ADDR,
	175	bin2bcd (tmp->tm_wday + 1) \| MCP7941X_BIT_VBATEN);
	176	#else
1cb8e980	177	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
c79e1c1c	178	#endif
1cb8e980 WD	179	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
	180	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
	181	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
c79e1c1c AF	182	#ifdef CONFIG_RTC_MCP79411
	183	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) \| MCP7941X_BIT_ST);
	184	#else
1cb8e980	185	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
c79e1c1c	186	#endif
d1e23194 JCPV	187
d1e23194 JCPV	188	return 0;
1cb8e980 WD	189	}
1cb8e980 WD	190
1cb8e980	191	/*
8bde7f77 WD	192	* Reset the RTC. We setting the date back to 1970-01-01.
8bde7f77 WD	193	* We also enable the oscillator output on the SQW/OUT pin and program
1cb8e980 WD	194	* it for 32,768 Hz output. Note that according to the datasheet, turning
	195	* on the square wave output increases the current drain on the backup
	196	* battery to something between 480nA and 800nA.
	197	*/
	198	void rtc_reset (void)
	199	{
1cb8e980 WD	200	rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
1cb8e980 WD	201	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE \| RTC_CTL_BIT_RS1 \| RTC_CTL_BIT_RS0);
1cb8e980 WD	202	}
1cb8e980 WD	203
1cb8e980 WD	204	/*
	205	* Helper functions
	206	*/
	207
	208	static
	209	uchar rtc_read (uchar reg)
	210	{
65cc0e2a	211	return (i2c_reg_read (CFG_SYS_I2C_RTC_ADDR, reg));
1cb8e980 WD	212	}
1cb8e980 WD	213
1cb8e980 WD	214	static void rtc_write (uchar reg, uchar val)
1cb8e980 WD	215	{
65cc0e2a	216	i2c_reg_write (CFG_SYS_I2C_RTC_ADDR, reg, val);
1cb8e980	217	}
d425d605	218
d425d605 CP	219	#endif /* !CONFIG_DM_RTC */
	220
	221	#ifdef CONFIG_DM_RTC
	222	static int ds1307_rtc_set(struct udevice dev, const struct rtc_time tm)
	223	{
	224	int ret;
	225	uchar buf[7];
	226	enum ds_type type = dev_get_driver_data(dev);
	227
	228	debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	229	tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	230	tm->tm_hour, tm->tm_min, tm->tm_sec);
	231
	232	if (tm->tm_year < 1970 \|\| tm->tm_year > 2069)
	233	printf("WARNING: year should be between 1970 and 2069!\n");
	234
	235	buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
	236	buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
	237	buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
	238	buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
	239	buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
	240	buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
	241	buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);
	242
	243	if (type == mcp794xx) {
	244	buf[RTC_DAY_REG_ADDR] \|= MCP7941X_BIT_VBATEN;
	245	buf[RTC_SEC_REG_ADDR] \|= MCP7941X_BIT_ST;
	246	}
	247
	248	ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
	249	if (ret < 0)
	250	return ret;
	251
07c65240 MT	252	if (type == ds_1337) {
	253	/* Ensure oscillator is enabled */
	254	dm_i2c_reg_write(dev, DS1337_CTL_REG_ADDR, 0);
	255	}
	256
d425d605 CP	257	return 0;
	258	}
	259
	260	static int ds1307_rtc_get(struct udevice dev, struct rtc_time tm)
	261	{
	262	int ret;
	263	uchar buf[7];
	264	enum ds_type type = dev_get_driver_data(dev);
	265
d425d605 CP	266	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
	267	if (ret < 0)
	268	return ret;
	269
07c65240 MT	270	if (type == ds_1337 \|\| type == ds_1340) {
	271	uint reg = (type == ds_1337) ? DS1337_STAT_REG_ADDR :
	272	DS1340_STAT_REG_ADDR;
	273	int status = dm_i2c_reg_read(dev, reg);
d425d605	274
07c65240 MT	275	if (status >= 0 && (status & RTC_STAT_BIT_OSF)) {
	276	printf("### Warning: RTC oscillator has stopped\n");
	277	/* clear the OSF flag */
	278	dm_i2c_reg_write(dev, reg, status & ~RTC_STAT_BIT_OSF);
d425d605 CP	279	}
	280	}
	281
	282	tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
	283	tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
	284	tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
	285	tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
	286	tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
	287	tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
	288	(bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
	289	1900 : 2000);
	290	tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
	291	tm->tm_yday = 0;
	292	tm->tm_isdst = 0;
	293
	294	debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	295	tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	296	tm->tm_hour, tm->tm_min, tm->tm_sec);
	297
	298	return 0;
	299	}
	300
	301	static int ds1307_rtc_reset(struct udevice *dev)
	302	{
	303	int ret;
223c4490	304	enum ds_type type = dev_get_driver_data(dev);
d425d605	305
223c4490 CS	306	/*
	307	* reset clock/oscillator in the seconds register:
	308	* on DS1307 bit 7 enables Clock Halt (CH),
	309	* on DS1340 bit 7 disables the oscillator (not EOSC)
	310	* on MCP794xx bit 7 enables Start Oscillator (ST)
	311	*/
d425d605 CP	312	ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
	313	if (ret < 0)
	314	return ret;
d425d605	315
223c4490 CS	316	if (type == ds_1307) {
	317	/* Write control register in order to enable square-wave
	318	* output (SQWE) and set a default rate of 32.768kHz (RS1\|RS0).
	319	*/
	320	ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
	321	RTC_CTL_BIT_SQWE \| RTC_CTL_BIT_RS1 \|
	322	RTC_CTL_BIT_RS0);
	323	} else if (type == ds_1337) {
	324	/* Write control register in order to enable oscillator output
	325	* (not EOSC) and set a default rate of 32.768kHz (RS2\|RS1).
	326	*/
07c65240	327	ret = dm_i2c_reg_write(dev, DS1337_CTL_REG_ADDR,
223c4490 CS	328	DS1337_CTL_BIT_RS2 \| DS1337_CTL_BIT_RS1);
	329	} else if (type == ds_1340 \|\| type == mcp794xx \|\| type == m41t11) {
	330	/* Reset clock calibration, frequency test and output level. */
	331	ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, 0x00);
	332	}
	333
	334	return ret;
d425d605 CP	335	}
	336
	337	static int ds1307_probe(struct udevice *dev)
	338	{
	339	i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS \|
	340	DM_I2C_CHIP_WR_ADDRESS);
	341
	342	return 0;
	343	}
	344
	345	static const struct rtc_ops ds1307_rtc_ops = {
	346	.get = ds1307_rtc_get,
	347	.set = ds1307_rtc_set,
	348	.reset = ds1307_rtc_reset,
	349	};
	350
	351	static const struct udevice_id ds1307_rtc_ids[] = {
	352	{ .compatible = "dallas,ds1307", .data = ds_1307 },
	353	{ .compatible = "dallas,ds1337", .data = ds_1337 },
f65774e1	354	{ .compatible = "dallas,ds1339", .data = ds_1339 },
d425d605	355	{ .compatible = "dallas,ds1340", .data = ds_1340 },
48c144f8	356	{ .compatible = "microchip,mcp7940x", .data = mcp794xx },
d425d605	357	{ .compatible = "microchip,mcp7941x", .data = mcp794xx },
8dd6803d	358	{ .compatible = "st,m41t11", .data = m41t11 },
d425d605 CP	359	{ }
	360	};
	361
	362	U_BOOT_DRIVER(rtc_ds1307) = {
	363	.name = "rtc-ds1307",
	364	.id = UCLASS_RTC,
	365	.probe = ds1307_probe,
	366	.of_match = ds1307_rtc_ids,
	367	.ops = &ds1307_rtc_ops,
	368	};
	369	#endif /* CONFIG_DM_RTC */