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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
750326e5 PYC |
2 | /* |
3 | * Faraday FTMAC100 Ethernet | |
4 | * | |
5 | * (C) Copyright 2009 Faraday Technology | |
6 | * Po-Yu Chuang <[email protected]> | |
750326e5 PYC |
7 | */ |
8 | ||
9 | #include <config.h> | |
1eb69ae4 | 10 | #include <cpu_func.h> |
7b51b576 | 11 | #include <env.h> |
750326e5 PYC |
12 | #include <malloc.h> |
13 | #include <net.h> | |
add396d6 SA |
14 | #include <phy.h> |
15 | #include <miiphy.h> | |
16 | #include <dm/device_compat.h> | |
401d1c4f | 17 | #include <asm/global_data.h> |
c05ed00a | 18 | #include <linux/delay.h> |
be71a179 | 19 | #include <linux/io.h> |
add396d6 | 20 | #include <linux/iopoll.h> |
750326e5 PYC |
21 | |
22 | #include "ftmac100.h" | |
be71a179 | 23 | #include <dm.h> |
5afc87ea | 24 | |
be71a179 | 25 | DECLARE_GLOBAL_DATA_PTR; |
5afc87ea | 26 | |
750326e5 PYC |
27 | #define ETH_ZLEN 60 |
28 | ||
add396d6 SA |
29 | /* Timeout for a mdio read/write operation */ |
30 | #define FTMAC100_MDIO_TIMEOUT_USEC 10000 | |
31 | ||
750326e5 | 32 | struct ftmac100_data { |
6f6e6e09 PYC |
33 | struct ftmac100_txdes txdes[1]; |
34 | struct ftmac100_rxdes rxdes[PKTBUFSRX]; | |
750326e5 | 35 | int rx_index; |
be71a179 | 36 | const char *name; |
9628c3e8 | 37 | struct ftmac100 *ftmac100; |
add396d6 | 38 | struct mii_dev *bus; |
750326e5 PYC |
39 | }; |
40 | ||
41 | /* | |
42 | * Reset MAC | |
43 | */ | |
be71a179 | 44 | static void ftmac100_reset(struct ftmac100_data *priv) |
750326e5 | 45 | { |
9628c3e8 | 46 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 PYC |
47 | |
48 | debug ("%s()\n", __func__); | |
49 | ||
50 | writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr); | |
51 | ||
52 | while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST) | |
1341494c | 53 | mdelay(1); |
54 | /* | |
55 | * When soft reset complete, write mac address immediately maybe fail somehow | |
56 | * Wait for a while can avoid this problem | |
57 | */ | |
58 | mdelay(1); | |
750326e5 PYC |
59 | } |
60 | ||
61 | /* | |
62 | * Set MAC address | |
63 | */ | |
be71a179 | 64 | static void ftmac100_set_mac(struct ftmac100_data *priv , |
65 | const unsigned char *mac) | |
750326e5 | 66 | { |
9628c3e8 | 67 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 PYC |
68 | unsigned int maddr = mac[0] << 8 | mac[1]; |
69 | unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; | |
70 | ||
71 | debug ("%s(%x %x)\n", __func__, maddr, laddr); | |
72 | ||
73 | writel (maddr, &ftmac100->mac_madr); | |
74 | writel (laddr, &ftmac100->mac_ladr); | |
75 | } | |
76 | ||
750326e5 | 77 | /* |
be71a179 | 78 | * Disable MAC |
750326e5 | 79 | */ |
be71a179 | 80 | static void _ftmac100_halt(struct ftmac100_data *priv) |
750326e5 | 81 | { |
9628c3e8 | 82 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 | 83 | debug ("%s()\n", __func__); |
750326e5 PYC |
84 | writel (0, &ftmac100->maccr); |
85 | } | |
86 | ||
be71a179 | 87 | /* |
88 | * Initialize MAC | |
89 | */ | |
90 | static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6]) | |
750326e5 | 91 | { |
9628c3e8 | 92 | struct ftmac100 *ftmac100 = priv->ftmac100; |
6f6e6e09 PYC |
93 | struct ftmac100_txdes *txdes = priv->txdes; |
94 | struct ftmac100_rxdes *rxdes = priv->rxdes; | |
750326e5 PYC |
95 | unsigned int maccr; |
96 | int i; | |
750326e5 PYC |
97 | debug ("%s()\n", __func__); |
98 | ||
be71a179 | 99 | ftmac100_reset(priv); |
750326e5 PYC |
100 | |
101 | /* set the ethernet address */ | |
be71a179 | 102 | ftmac100_set_mac(priv, enetaddr); |
750326e5 | 103 | |
750326e5 PYC |
104 | /* disable all interrupts */ |
105 | ||
106 | writel (0, &ftmac100->imr); | |
107 | ||
108 | /* initialize descriptors */ | |
109 | ||
110 | priv->rx_index = 0; | |
111 | ||
112 | txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR; | |
113 | rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR; | |
114 | ||
115 | for (i = 0; i < PKTBUFSRX; i++) { | |
116 | /* RXBUF_BADR */ | |
28b52a6f | 117 | rxdes[i].rxdes2 = (unsigned int)(unsigned long)net_rx_packets[i]; |
750326e5 PYC |
118 | rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); |
119 | rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; | |
120 | } | |
121 | ||
122 | /* transmit ring */ | |
123 | ||
28b52a6f | 124 | writel ((unsigned long)txdes, &ftmac100->txr_badr); |
750326e5 PYC |
125 | |
126 | /* receive ring */ | |
127 | ||
28b52a6f | 128 | writel ((unsigned long)rxdes, &ftmac100->rxr_badr); |
750326e5 PYC |
129 | |
130 | /* poll receive descriptor automatically */ | |
131 | ||
132 | writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc); | |
133 | ||
134 | /* enable transmitter, receiver */ | |
135 | ||
136 | maccr = FTMAC100_MACCR_XMT_EN | | |
137 | FTMAC100_MACCR_RCV_EN | | |
138 | FTMAC100_MACCR_XDMA_EN | | |
139 | FTMAC100_MACCR_RDMA_EN | | |
140 | FTMAC100_MACCR_CRC_APD | | |
141 | FTMAC100_MACCR_ENRX_IN_HALFTX | | |
142 | FTMAC100_MACCR_RX_RUNT | | |
143 | FTMAC100_MACCR_RX_BROADPKT; | |
144 | ||
145 | writel (maccr, &ftmac100->maccr); | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | /* | |
be71a179 | 151 | * Free receiving buffer |
750326e5 | 152 | */ |
be71a179 | 153 | static int _ftmac100_free_pkt(struct ftmac100_data *priv) |
154 | { | |
155 | struct ftmac100_rxdes *curr_des; | |
156 | curr_des = &priv->rxdes[priv->rx_index]; | |
157 | /* release buffer to DMA */ | |
158 | curr_des->rxdes0 |= FTMAC100_RXDES0_RXDMA_OWN; | |
159 | priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX; | |
160 | return 0; | |
161 | } | |
162 | ||
163 | /* | |
164 | * Receive a data block via Ethernet | |
165 | */ | |
166 | static int __ftmac100_recv(struct ftmac100_data *priv) | |
750326e5 | 167 | { |
6f6e6e09 | 168 | struct ftmac100_rxdes *curr_des; |
750326e5 PYC |
169 | unsigned short rxlen; |
170 | ||
171 | curr_des = &priv->rxdes[priv->rx_index]; | |
750326e5 | 172 | if (curr_des->rxdes0 & FTMAC100_RXDES0_RXDMA_OWN) |
be71a179 | 173 | return 0; |
750326e5 PYC |
174 | |
175 | if (curr_des->rxdes0 & (FTMAC100_RXDES0_RX_ERR | | |
176 | FTMAC100_RXDES0_CRC_ERR | | |
177 | FTMAC100_RXDES0_FTL | | |
178 | FTMAC100_RXDES0_RUNT | | |
179 | FTMAC100_RXDES0_RX_ODD_NB)) { | |
be71a179 | 180 | return 0; |
750326e5 PYC |
181 | } |
182 | ||
183 | rxlen = FTMAC100_RXDES0_RFL (curr_des->rxdes0); | |
ce4e2370 | 184 | invalidate_dcache_range(curr_des->rxdes2,curr_des->rxdes2+rxlen); |
750326e5 PYC |
185 | debug ("%s(): RX buffer %d, %x received\n", |
186 | __func__, priv->rx_index, rxlen); | |
187 | ||
be71a179 | 188 | return rxlen; |
750326e5 PYC |
189 | } |
190 | ||
191 | /* | |
192 | * Send a data block via Ethernet | |
193 | */ | |
be71a179 | 194 | static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length) |
750326e5 | 195 | { |
9628c3e8 | 196 | struct ftmac100 *ftmac100 = priv->ftmac100; |
6f6e6e09 | 197 | struct ftmac100_txdes *curr_des = priv->txdes; |
8d8fd5b6 | 198 | ulong start; |
750326e5 PYC |
199 | |
200 | if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { | |
201 | debug ("%s(): no TX descriptor available\n", __func__); | |
202 | return -1; | |
203 | } | |
204 | ||
28b52a6f | 205 | debug ("%s(%lx, %x)\n", __func__, (unsigned long)packet, length); |
750326e5 PYC |
206 | |
207 | length = (length < ETH_ZLEN) ? ETH_ZLEN : length; | |
208 | ||
209 | /* initiate a transmit sequence */ | |
210 | ||
28b52a6f RC |
211 | flush_dcache_range((unsigned long)packet,(unsigned long)packet+length); |
212 | curr_des->txdes2 = (unsigned int)(unsigned long)packet; /* TXBUF_BADR */ | |
750326e5 PYC |
213 | |
214 | curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; | |
215 | curr_des->txdes1 |= FTMAC100_TXDES1_FTS | | |
216 | FTMAC100_TXDES1_LTS | | |
217 | FTMAC100_TXDES1_TXBUF_SIZE (length); | |
218 | ||
219 | curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN; | |
220 | ||
221 | /* start transmit */ | |
222 | ||
223 | writel (1, &ftmac100->txpd); | |
224 | ||
225 | /* wait for transfer to succeed */ | |
226 | ||
8d8fd5b6 | 227 | start = get_timer(0); |
750326e5 | 228 | while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { |
8d8fd5b6 | 229 | if (get_timer(start) >= 5) { |
750326e5 PYC |
230 | debug ("%s(): timed out\n", __func__); |
231 | return -1; | |
232 | } | |
233 | } | |
234 | ||
235 | debug ("%s(): packet sent\n", __func__); | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
be71a179 | 240 | static int ftmac100_start(struct udevice *dev) |
241 | { | |
c69cda25 | 242 | struct eth_pdata *plat = dev_get_plat(dev); |
be71a179 | 243 | struct ftmac100_data *priv = dev_get_priv(dev); |
244 | ||
245 | return _ftmac100_init(priv, plat->enetaddr); | |
246 | } | |
247 | ||
248 | static void ftmac100_stop(struct udevice *dev) | |
249 | { | |
250 | struct ftmac100_data *priv = dev_get_priv(dev); | |
251 | _ftmac100_halt(priv); | |
252 | } | |
253 | ||
254 | static int ftmac100_send(struct udevice *dev, void *packet, int length) | |
255 | { | |
256 | struct ftmac100_data *priv = dev_get_priv(dev); | |
257 | int ret; | |
258 | ret = _ftmac100_send(priv , packet , length); | |
259 | return ret ? 0 : -ETIMEDOUT; | |
260 | } | |
261 | ||
262 | static int ftmac100_recv(struct udevice *dev, int flags, uchar **packetp) | |
263 | { | |
264 | struct ftmac100_data *priv = dev_get_priv(dev); | |
265 | struct ftmac100_rxdes *curr_des; | |
266 | curr_des = &priv->rxdes[priv->rx_index]; | |
267 | int len; | |
268 | len = __ftmac100_recv(priv); | |
269 | if (len) | |
28b52a6f | 270 | *packetp = (uchar *)(unsigned long)curr_des->rxdes2; |
be71a179 | 271 | |
272 | return len ? len : -EAGAIN; | |
273 | } | |
274 | ||
275 | static int ftmac100_free_pkt(struct udevice *dev, uchar *packet, int length) | |
276 | { | |
277 | struct ftmac100_data *priv = dev_get_priv(dev); | |
278 | _ftmac100_free_pkt(priv); | |
279 | return 0; | |
280 | } | |
281 | ||
282 | int ftmac100_read_rom_hwaddr(struct udevice *dev) | |
283 | { | |
c69cda25 | 284 | struct eth_pdata *pdata = dev_get_plat(dev); |
35affd7a | 285 | eth_env_get_enetaddr("ethaddr", pdata->enetaddr); |
be71a179 | 286 | return 0; |
287 | } | |
288 | ||
289 | static const char *dtbmacaddr(u32 ifno) | |
290 | { | |
291 | int node, len; | |
292 | char enet[16]; | |
293 | const char *mac; | |
294 | const char *path; | |
295 | if (gd->fdt_blob == NULL) { | |
296 | printf("%s: don't have a valid gd->fdt_blob!\n", __func__); | |
297 | return NULL; | |
298 | } | |
299 | node = fdt_path_offset(gd->fdt_blob, "/aliases"); | |
300 | if (node < 0) | |
301 | return NULL; | |
302 | ||
303 | sprintf(enet, "ethernet%d", ifno); | |
304 | path = fdt_getprop(gd->fdt_blob, node, enet, NULL); | |
305 | if (!path) { | |
306 | printf("no alias for %s\n", enet); | |
307 | return NULL; | |
308 | } | |
309 | node = fdt_path_offset(gd->fdt_blob, path); | |
310 | mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len); | |
311 | if (mac && is_valid_ethaddr((u8 *)mac)) | |
312 | return mac; | |
313 | ||
314 | return NULL; | |
315 | } | |
316 | ||
d1998a9f | 317 | static int ftmac100_of_to_plat(struct udevice *dev) |
be71a179 | 318 | { |
319 | struct ftmac100_data *priv = dev_get_priv(dev); | |
c69cda25 | 320 | struct eth_pdata *pdata = dev_get_plat(dev); |
be71a179 | 321 | const char *mac; |
2548493a | 322 | pdata->iobase = dev_read_addr(dev); |
9628c3e8 | 323 | priv->ftmac100 = phys_to_virt(pdata->iobase); |
be71a179 | 324 | mac = dtbmacaddr(0); |
325 | if (mac) | |
326 | memcpy(pdata->enetaddr , mac , 6); | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
add396d6 SA |
331 | /* |
332 | * struct mii_bus functions | |
333 | */ | |
334 | static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad, | |
335 | int reg) | |
336 | { | |
337 | struct ftmac100_data *priv = bus->priv; | |
338 | struct ftmac100 *ftmac100 = priv->ftmac100; | |
339 | int phycr = FTMAC100_PHYCR_PHYAD(addr) | | |
340 | FTMAC100_PHYCR_REGAD(reg) | | |
341 | FTMAC100_PHYCR_MIIRD; | |
342 | int ret; | |
343 | ||
344 | writel(phycr, &ftmac100->phycr); | |
345 | ||
346 | ret = readl_poll_timeout(&ftmac100->phycr, phycr, | |
347 | !(phycr & FTMAC100_PHYCR_MIIRD), | |
348 | FTMAC100_MDIO_TIMEOUT_USEC); | |
349 | if (ret) | |
350 | pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n", | |
351 | bus->name, addr, reg); | |
352 | else | |
353 | ret = phycr & FTMAC100_PHYCR_MIIRDATA; | |
354 | ||
355 | return ret; | |
356 | } | |
357 | ||
358 | static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad, | |
359 | int reg, u16 value) | |
360 | { | |
361 | struct ftmac100_data *priv = bus->priv; | |
362 | struct ftmac100 *ftmac100 = priv->ftmac100; | |
363 | int phycr = FTMAC100_PHYCR_PHYAD(addr) | | |
364 | FTMAC100_PHYCR_REGAD(reg) | | |
365 | FTMAC100_PHYCR_MIIWR; | |
366 | int ret; | |
367 | ||
368 | writel(value, &ftmac100->phywdata); | |
369 | writel(phycr, &ftmac100->phycr); | |
370 | ||
371 | ret = readl_poll_timeout(&ftmac100->phycr, phycr, | |
372 | !(phycr & FTMAC100_PHYCR_MIIWR), | |
373 | FTMAC100_MDIO_TIMEOUT_USEC); | |
374 | if (ret) | |
375 | pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n", | |
376 | bus->name, addr, reg); | |
377 | ||
378 | return ret; | |
379 | } | |
380 | ||
381 | static int ftmac100_mdio_init(struct udevice *dev) | |
382 | { | |
383 | struct ftmac100_data *priv = dev_get_priv(dev); | |
384 | struct mii_dev *bus; | |
385 | int ret; | |
386 | ||
387 | bus = mdio_alloc(); | |
388 | if (!bus) | |
389 | return -ENOMEM; | |
390 | ||
391 | bus->read = ftmac100_mdio_read; | |
392 | bus->write = ftmac100_mdio_write; | |
393 | bus->priv = priv; | |
394 | ||
395 | ret = mdio_register_seq(bus, dev_seq(dev)); | |
396 | if (ret) { | |
397 | mdio_free(bus); | |
398 | return ret; | |
399 | } | |
400 | ||
401 | priv->bus = bus; | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
be71a179 | 406 | static int ftmac100_probe(struct udevice *dev) |
407 | { | |
408 | struct ftmac100_data *priv = dev_get_priv(dev); | |
409 | priv->name = dev->name; | |
add396d6 SA |
410 | int ret = 0; |
411 | ||
412 | ret = ftmac100_mdio_init(dev); | |
413 | if (ret) { | |
414 | dev_err(dev, "Failed to initialize mdiobus: %d\n", ret); | |
415 | goto out; | |
416 | } | |
417 | ||
418 | out: | |
419 | return ret; | |
420 | } | |
421 | ||
422 | static int ftmac100_remove(struct udevice *dev) | |
423 | { | |
424 | struct ftmac100_data *priv = dev_get_priv(dev); | |
425 | ||
426 | mdio_unregister(priv->bus); | |
427 | mdio_free(priv->bus); | |
428 | ||
be71a179 | 429 | return 0; |
430 | } | |
431 | ||
432 | static int ftmac100_bind(struct udevice *dev) | |
433 | { | |
434 | return device_set_name(dev, dev->name); | |
435 | } | |
436 | ||
437 | static const struct eth_ops ftmac100_ops = { | |
438 | .start = ftmac100_start, | |
439 | .send = ftmac100_send, | |
440 | .recv = ftmac100_recv, | |
441 | .stop = ftmac100_stop, | |
442 | .free_pkt = ftmac100_free_pkt, | |
443 | }; | |
444 | ||
445 | static const struct udevice_id ftmac100_ids[] = { | |
446 | { .compatible = "andestech,atmac100" }, | |
447 | { } | |
448 | }; | |
449 | ||
450 | U_BOOT_DRIVER(ftmac100) = { | |
e9a1d8bf | 451 | .name = "ftmac100", |
be71a179 | 452 | .id = UCLASS_ETH, |
453 | .of_match = ftmac100_ids, | |
454 | .bind = ftmac100_bind, | |
d1998a9f | 455 | .of_to_plat = ftmac100_of_to_plat, |
be71a179 | 456 | .probe = ftmac100_probe, |
add396d6 | 457 | .remove = ftmac100_remove, |
be71a179 | 458 | .ops = &ftmac100_ops, |
41575d8e | 459 | .priv_auto = sizeof(struct ftmac100_data), |
caa4daa2 | 460 | .plat_auto = sizeof(struct eth_pdata), |
be71a179 | 461 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
462 | }; |