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89973f8a BW |
1 | /* |
2 | * (C) Copyright 2008 | |
3 | * Benjamin Warren, [email protected] | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
ae0b05df | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
89973f8a BW |
16 | * GNU General Public License for more details. |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * netdev.h - definitions an prototypes for network devices | |
26 | */ | |
27 | ||
28 | #ifndef _NETDEV_H_ | |
29 | #define _NETDEV_H_ | |
30 | ||
31 | /* | |
32 | * Board and CPU-specific initialization functions | |
33 | * board_eth_init() has highest priority. cpu_eth_init() only | |
34 | * gets called if board_eth_init() isn't instantiated or fails. | |
35 | * Return values: | |
36 | * 0: success | |
37 | * -1: failure | |
38 | */ | |
39 | ||
40 | int board_eth_init(bd_t *bis); | |
41 | int cpu_eth_init(bd_t *bis); | |
42 | ||
43 | /* Driver initialization prototypes */ | |
c960b13e | 44 | int altera_tse_initialize(u8 dev_num, int mac_base, |
b962ac79 JF |
45 | int sgdma_rx_base, int sgdma_tx_base, |
46 | u32 sgdma_desc_base, u32 sgdma_desc_size); | |
c041e9d2 | 47 | int at91emac_register(bd_t *bis, unsigned long iobase); |
bd6ce9d1 WD |
48 | int au1x00_enet_initialize(bd_t*); |
49 | int ax88180_initialize(bd_t *bis); | |
89973f8a | 50 | int bfin_EMAC_initialize(bd_t *bis); |
efdd7319 | 51 | int calxedaxgmac_initialize(u32 id, ulong base_addr); |
b1c0eaac | 52 | int cs8900_initialize(u8 dev_num, int base_addr); |
8453587e | 53 | int davinci_emac_initialize(void); |
bd6ce9d1 | 54 | int dc21x4x_initialize(bd_t *bis); |
9afc1af0 | 55 | int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface); |
bd6ce9d1 | 56 | int dm9000_initialize(bd_t *bis); |
62cbc408 | 57 | int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); |
ad3381cf | 58 | int e1000_initialize(bd_t *bis); |
10efa024 | 59 | int eepro100_initialize(bd_t *bis); |
a61a8196 RM |
60 | int enc28j60_initialize(unsigned int bus, unsigned int cs, |
61 | unsigned int max_hz, unsigned int mode); | |
594d57d0 | 62 | int ep93xx_eth_initialize(u8 dev_num, int base_addr); |
164846ee | 63 | int eth_3com_initialize (bd_t * bis); |
bd6ce9d1 | 64 | int ethoc_initialize(u8 dev_num, int base_addr); |
3456a148 | 65 | int fec_initialize (bd_t *bis); |
bd6ce9d1 | 66 | int fecmxc_initialize(bd_t *bis); |
9e27e9dc | 67 | int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); |
b3dbf4a5 | 68 | int ftgmac100_initialize(bd_t *bits); |
750326e5 | 69 | int ftmac100_initialize(bd_t *bits); |
89973f8a | 70 | int greth_initialize(bd_t *bis); |
6aca145e | 71 | void gt6426x_eth_initialize(bd_t *bis); |
8218bd2a | 72 | int inca_switch_initialize(bd_t *bis); |
bd6ce9d1 | 73 | int ks8695_eth_initialize(void); |
b7ad4109 | 74 | int lan91c96_initialize(u8 dev_num, int base_addr); |
89973f8a BW |
75 | int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); |
76 | int mcdmafec_initialize(bd_t *bis); | |
77 | int mcffec_initialize(bd_t *bis); | |
a0aad08f | 78 | int mpc512x_fec_initialize(bd_t *bis); |
e1d7480b | 79 | int mpc5xxx_fec_initialize(bd_t *bis); |
a9bec96d | 80 | int mpc8220_fec_initialize(bd_t *bis); |
ba705b5b | 81 | int mpc82xx_scc_enet_initialize(bd_t *bis); |
d44265ad | 82 | int mvgbe_initialize(bd_t *bis); |
b902b8dd | 83 | int natsemi_initialize(bd_t *bis); |
d0201692 | 84 | int ne2k_register(void); |
cc94074e | 85 | int npe_initialize(bd_t *bis); |
19403633 | 86 | int ns8382x_initialize(bd_t *bis); |
e3090534 | 87 | int pcnet_initialize(bd_t *bis); |
4fce2ace | 88 | int plb2800_eth_initialize(bd_t *bis); |
25a85906 | 89 | int ppc_4xx_eth_initialize (bd_t *bis); |
0b252f50 | 90 | int rtl8139_initialize(bd_t *bis); |
02d69891 | 91 | int rtl8169_initialize(bd_t *bis); |
9eb79bd8 | 92 | int scc_initialize(bd_t *bis); |
bd6ce9d1 | 93 | int sh_eth_initialize(bd_t *bis); |
89973f8a | 94 | int skge_initialize(bd_t *bis); |
7194ab80 | 95 | int smc91111_initialize(u8 dev_num, int base_addr); |
bd6ce9d1 | 96 | int smc911x_initialize(u8 dev_num, int base_addr); |
ccdd12f8 | 97 | int tsi108_eth_initialize(bd_t *bis); |
2b5243fc | 98 | int uec_standard_init(bd_t *bis); |
89973f8a | 99 | int uli526x_initialize(bd_t *bis); |
79788bb1 | 100 | int armada100_fec_register(unsigned long base_addr); |
4f1ec4c1 MS |
101 | int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, |
102 | unsigned long dma_addr); | |
c1044a1e MS |
103 | int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, |
104 | int txpp, int rxpp); | |
df482650 SL |
105 | int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, |
106 | unsigned long ctrl_addr); | |
185f7d9a | 107 | int zynq_gem_initialize(bd_t *bis, int base_addr); |
df482650 SL |
108 | /* |
109 | * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface | |
110 | * exported by a public hader file, we need a global definition at this point. | |
111 | */ | |
112 | #if defined(CONFIG_XILINX_LL_TEMAC) | |
113 | #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ | |
114 | #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ | |
115 | #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ | |
116 | #endif | |
89973f8a BW |
117 | |
118 | /* Boards with PCI network controllers can call this from their board_eth_init() | |
119 | * function to initialize whatever's on board. | |
120 | * Return value is total # of devices found */ | |
121 | ||
122 | static inline int pci_eth_init(bd_t *bis) | |
123 | { | |
124 | int num = 0; | |
e3090534 | 125 | |
10efa024 BW |
126 | #ifdef CONFIG_PCI |
127 | ||
128 | #ifdef CONFIG_EEPRO100 | |
129 | num += eepro100_initialize(bis); | |
130 | #endif | |
8ca0b3f9 BW |
131 | #ifdef CONFIG_TULIP |
132 | num += dc21x4x_initialize(bis); | |
133 | #endif | |
ad3381cf BW |
134 | #ifdef CONFIG_E1000 |
135 | num += e1000_initialize(bis); | |
136 | #endif | |
e3090534 BW |
137 | #ifdef CONFIG_PCNET |
138 | num += pcnet_initialize(bis); | |
139 | #endif | |
b902b8dd BW |
140 | #ifdef CONFIG_NATSEMI |
141 | num += natsemi_initialize(bis); | |
142 | #endif | |
19403633 BW |
143 | #ifdef CONFIG_NS8382X |
144 | num += ns8382x_initialize(bis); | |
145 | #endif | |
0b252f50 BW |
146 | #if defined(CONFIG_RTL8139) |
147 | num += rtl8139_initialize(bis); | |
148 | #endif | |
02d69891 BW |
149 | #if defined(CONFIG_RTL8169) |
150 | num += rtl8169_initialize(bis); | |
151 | #endif | |
b11f664f | 152 | #if defined(CONFIG_ULI526X) |
89973f8a BW |
153 | num += uli526x_initialize(bis); |
154 | #endif | |
10efa024 BW |
155 | |
156 | #endif /* CONFIG_PCI */ | |
89973f8a BW |
157 | return num; |
158 | } | |
159 | ||
6f51deb7 PW |
160 | /* |
161 | * Boards with mv88e61xx switch can use this by defining | |
162 | * CONFIG_MV88E61XX_SWITCH in respective board configheader file | |
163 | * the stuct and enums here are used to specify switch configuration params | |
164 | */ | |
165 | #if defined(CONFIG_MV88E61XX_SWITCH) | |
166 | enum mv88e61xx_cfg_vlan { | |
167 | MV88E61XX_VLANCFG_DEFAULT, | |
168 | MV88E61XX_VLANCFG_ROUTER | |
169 | }; | |
170 | ||
171 | enum mv88e61xx_cfg_mdip { | |
172 | MV88E61XX_MDIP_NOCHANGE, | |
173 | MV88E61XX_MDIP_REVERSE | |
174 | }; | |
175 | ||
176 | enum mv88e61xx_cfg_ledinit { | |
177 | MV88E61XX_LED_INIT_DIS, | |
178 | MV88E61XX_LED_INIT_EN | |
179 | }; | |
180 | ||
181 | enum mv88e61xx_cfg_rgmiid { | |
182 | MV88E61XX_RGMII_DELAY_DIS, | |
183 | MV88E61XX_RGMII_DELAY_EN | |
184 | }; | |
185 | ||
186 | enum mv88e61xx_cfg_prtstt { | |
187 | MV88E61XX_PORTSTT_DISABLED, | |
188 | MV88E61XX_PORTSTT_BLOCKING, | |
189 | MV88E61XX_PORTSTT_LEARNING, | |
190 | MV88E61XX_PORTSTT_FORWARDING | |
191 | }; | |
192 | ||
193 | struct mv88e61xx_config { | |
194 | char *name; | |
195 | enum mv88e61xx_cfg_vlan vlancfg; | |
196 | enum mv88e61xx_cfg_rgmiid rgmii_delay; | |
197 | enum mv88e61xx_cfg_prtstt portstate; | |
198 | enum mv88e61xx_cfg_ledinit led_init; | |
199 | enum mv88e61xx_cfg_mdip mdip; | |
200 | u32 ports_enabled; | |
201 | u8 cpuport; | |
202 | }; | |
203 | ||
204 | int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); | |
205 | #endif /* CONFIG_MV88E61XX_SWITCH */ | |
206 | ||
2e5f4421 MV |
207 | /* |
208 | * Allow FEC to fine-tune MII configuration on boards which require this. | |
209 | */ | |
210 | int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); | |
211 | ||
89973f8a | 212 | #endif /* _NETDEV_H_ */ |