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Commit | Line | Data |
---|---|---|
55afd2d8 DG |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_K3=y | |
3 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
4 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 | |
6 | CONFIG_NR_DRAM_BANKS=2 | |
7 | CONFIG_SOC_K3_AM642=y | |
8 | CONFIG_TARGET_AM642_A53_EVM=y | |
9 | CONFIG_ENV_SIZE=0x20000 | |
10 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 | |
11 | CONFIG_SPL_DM_SPI=y | |
2bba7807 | 12 | CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" |
55afd2d8 DG |
13 | CONFIG_SPL_TEXT_BASE=0x80080000 |
14 | CONFIG_SPL_MMC_SUPPORT=y | |
15 | CONFIG_SPL_SERIAL_SUPPORT=y | |
16 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | |
17 | CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
18 | CONFIG_SPL_FS_FAT=y | |
19 | CONFIG_SPL_LIBDISK_SUPPORT=y | |
20 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
21 | CONFIG_SPL_SPI_SUPPORT=y | |
55afd2d8 DG |
22 | CONFIG_DISTRO_DEFAULTS=y |
23 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set | |
24 | CONFIG_SPL_LOAD_FIT=y | |
25 | CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern" | |
7ecca0c4 | 26 | CONFIG_BOARD_LATE_INIT=y |
55afd2d8 DG |
27 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
28 | CONFIG_SPL_STACK_R=y | |
29 | CONFIG_SPL_SEPARATE_BSS=y | |
30 | CONFIG_SPL_DMA=y | |
e0e5374b | 31 | CONFIG_SPL_I2C_SUPPORT=y |
55afd2d8 DG |
32 | CONFIG_SPL_DM_MAILBOX=y |
33 | CONFIG_SPL_DM_SPI_FLASH=y | |
34 | CONFIG_SPL_POWER_DOMAIN=y | |
35 | CONFIG_SPL_RAM_SUPPORT=y | |
36 | CONFIG_SPL_RAM_DEVICE=y | |
37 | CONFIG_SPL_SPI_LOAD=y | |
38 | CONFIG_SPL_YMODEM_SUPPORT=y | |
39 | CONFIG_CMD_ASKENV=y | |
7ecca0c4 | 40 | CONFIG_CMD_I2C=y |
55afd2d8 DG |
41 | CONFIG_CMD_MMC=y |
42 | CONFIG_CMD_TIME=y | |
43 | CONFIG_OF_CONTROL=y | |
44 | CONFIG_SPL_OF_CONTROL=y | |
e0e5374b LV |
45 | CONFIG_OF_LIST="k3-am642-evm k3-am642-sk" |
46 | CONFIG_MULTI_DTB_FIT=y | |
55afd2d8 DG |
47 | CONFIG_SPL_MULTI_DTB_FIT=y |
48 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
49 | CONFIG_ENV_IS_NOWHERE=y | |
50 | CONFIG_ENV_IS_IN_FAT=y | |
51 | CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" | |
52 | CONFIG_NET_RANDOM_ETHADDR=y | |
53 | CONFIG_DM=y | |
54 | CONFIG_SPL_DM=y | |
55 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
56 | CONFIG_REGMAP=y | |
57 | CONFIG_SPL_REGMAP=y | |
58 | CONFIG_SPL_OF_TRANSLATE=y | |
59 | CONFIG_CLK=y | |
60 | CONFIG_SPL_CLK=y | |
61 | CONFIG_CLK_TI_SCI=y | |
62 | CONFIG_DMA_CHANNELS=y | |
63 | CONFIG_TI_K3_NAVSS_UDMA=y | |
64 | CONFIG_TI_SCI_PROTOCOL=y | |
7ecca0c4 LV |
65 | CONFIG_DM_I2C=y |
66 | CONFIG_SYS_I2C_OMAP24XX=y | |
55afd2d8 DG |
67 | CONFIG_DM_MAILBOX=y |
68 | CONFIG_K3_SEC_PROXY=y | |
55afd2d8 DG |
69 | CONFIG_MMC_SDHCI=y |
70 | CONFIG_MMC_SDHCI_ADMA=y | |
71 | CONFIG_SPL_MMC_SDHCI_ADMA=y | |
72 | CONFIG_MMC_SDHCI_AM654=y | |
73 | CONFIG_DM_SPI_FLASH=y | |
74 | CONFIG_SF_DEFAULT_MODE=0 | |
75 | CONFIG_SPI_FLASH_SPANSION=y | |
76 | CONFIG_SPI_FLASH_STMICRO=y | |
df3fc620 | 77 | CONFIG_PHY_TI_DP83867=y |
55afd2d8 DG |
78 | CONFIG_PHY_FIXED=y |
79 | CONFIG_DM_ETH=y | |
80 | CONFIG_TI_AM65_CPSW_NUSS=y | |
81 | CONFIG_PINCTRL=y | |
82 | CONFIG_SPL_PINCTRL=y | |
83 | CONFIG_PINCTRL_SINGLE=y | |
84 | CONFIG_POWER_DOMAIN=y | |
85 | CONFIG_TI_SCI_POWER_DOMAIN=y | |
86 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
87 | CONFIG_REMOTEPROC_TI_K3_ARM64=y | |
88 | CONFIG_DM_RESET=y | |
89 | CONFIG_RESET_TI_SCI=y | |
90 | CONFIG_DM_SERIAL=y | |
d5a7e480 LV |
91 | CONFIG_SOC_DEVICE=y |
92 | CONFIG_SOC_DEVICE_TI_K3=y | |
55afd2d8 DG |
93 | CONFIG_SOC_TI=y |
94 | CONFIG_SPI=y | |
95 | CONFIG_DM_SPI=y | |
96 | CONFIG_CADENCE_QSPI=y | |
97 | CONFIG_SYSRESET=y | |
98 | CONFIG_SPL_SYSRESET=y | |
99 | CONFIG_SYSRESET_TI_SCI=y | |
100 | CONFIG_TIMER=y | |
101 | CONFIG_SPL_TIMER=y | |
102 | CONFIG_OMAP_TIMER=y | |
103 | CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 |