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Commit | Line | Data |
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81385818 MY |
1 | menu "Clock" |
2 | ||
f26c8a8e SG |
3 | config CLK |
4 | bool "Enable clock driver support" | |
5 | depends on DM | |
6 | help | |
7 | This allows drivers to be provided for clock generators, including | |
8 | oscillators and PLLs. Devices can use a common clock API to request | |
9 | a particular clock rate and check on available clocks. Clocks can | |
10 | feed into other clocks in a tree structure, with multiplexers to | |
11 | choose the source for each clock. | |
12 | ||
05435891 | 13 | config SPL_CLK |
f26c8a8e | 14 | bool "Enable clock support in SPL" |
0712b672 | 15 | depends on CLK && SPL && SPL_DM |
f26c8a8e SG |
16 | help |
17 | The clock subsystem adds a small amount of overhead to the image. | |
18 | If this is acceptable and you have a need to use clock drivers in | |
19 | SPL, enable this option. It might provide a cleaner interface to | |
20 | setting up clocks within SPL, and allows the same drivers to be | |
21 | used as U-Boot proper. | |
81385818 | 22 | |
7c819e7f PT |
23 | config TPL_CLK |
24 | bool "Enable clock support in TPL" | |
25 | depends on CLK && TPL_DM | |
26 | help | |
27 | The clock subsystem adds a small amount of overhead to the image. | |
28 | If this is acceptable and you have a need to use clock drivers in | |
29 | SPL, enable this option. It might provide a cleaner interface to | |
30 | setting up clocks within TPL, and allows the same drivers to be | |
31 | used as U-Boot proper. | |
32 | ||
5357eb95 ÁFR |
33 | config CLK_BCM6345 |
34 | bool "Clock controller driver for BCM6345" | |
35 | depends on CLK && ARCH_BMIPS | |
36 | default y | |
37 | help | |
38 | This clock driver adds support for enabling and disabling peripheral | |
39 | clocks on BCM6345 SoCs. HW has no rate changing capabilities. | |
40 | ||
dd7c7494 PB |
41 | config CLK_BOSTON |
42 | def_bool y if TARGET_BOSTON | |
43 | depends on CLK | |
44 | select REGMAP | |
45 | select SYSCON | |
46 | help | |
47 | Enable this to support the clocks | |
48 | ||
1d7993d1 LM |
49 | config SPL_CLK_CCF |
50 | bool "SPL Common Clock Framework [CCF] support " | |
a074667d | 51 | depends on SPL |
1d7993d1 LM |
52 | help |
53 | Enable this option if you want to (re-)use the Linux kernel's Common | |
54 | Clock Framework [CCF] code in U-Boot's SPL. | |
55 | ||
00097635 PF |
56 | config SPL_CLK_COMPOSITE_CCF |
57 | bool "SPL Common Clock Framework [CCF] composite clk support " | |
58 | depends on SPL_CLK_CCF | |
59 | help | |
60 | Enable this option if you want to (re-)use the Linux kernel's Common | |
61 | Clock Framework [CCF] composite code in U-Boot's SPL. | |
62 | ||
1d7993d1 LM |
63 | config CLK_CCF |
64 | bool "Common Clock Framework [CCF] support " | |
1d7993d1 LM |
65 | help |
66 | Enable this option if you want to (re-)use the Linux kernel's Common | |
67 | Clock Framework [CCF] code in U-Boot's clock driver. | |
68 | ||
00097635 PF |
69 | config CLK_COMPOSITE_CCF |
70 | bool "Common Clock Framework [CCF] composite clk support " | |
71 | depends on CLK_CCF | |
72 | help | |
73 | Enable this option if you want to (re-)use the Linux kernel's Common | |
74 | Clock Framework [CCF] composite code in U-Boot's clock driver. | |
75 | ||
b4d00b25 SG |
76 | config CLK_INTEL |
77 | bool "Enable clock driver for Intel x86" | |
78 | depends on CLK && X86 | |
79 | help | |
80 | This provides very basic support for clocks on Intel SoCs. The driver | |
81 | is barely used at present but could be expanded as needs arise. | |
82 | Much clock configuration in U-Boot is either set up by the FSP, or | |
83 | set up by U-Boot itself but only statically. Thus the driver does not | |
84 | support changing clock rates, only querying them. | |
85 | ||
b113c9b5 SR |
86 | config CLK_OCTEON |
87 | bool "Clock controller driver for Marvell MIPS Octeon" | |
88 | depends on CLK && ARCH_OCTEON | |
89 | default y | |
90 | help | |
91 | Enable this to support the clocks on Octeon MIPS platforms. | |
92 | ||
f264e235 PC |
93 | config CLK_STM32F |
94 | bool "Enable clock driver support for STM32F family" | |
95 | depends on CLK && (STM32F7 || STM32F4) | |
96 | default y | |
97 | help | |
98 | This clock driver adds support for RCC clock management | |
99 | for STM32F4 and STM32F7 SoCs. | |
100 | ||
e80dac0a | 101 | config CLK_HSDK |
80a7674e EP |
102 | bool "Enable cgu clock driver for HSDK boards" |
103 | depends on CLK && TARGET_HSDK | |
e80dac0a | 104 | help |
80a7674e EP |
105 | Enable this to support the cgu clocks on Synopsys ARC HSDK and |
106 | Synopsys ARC HSDK-4xD boards | |
e80dac0a | 107 | |
95105089 SDPP |
108 | config CLK_VERSAL |
109 | bool "Enable clock driver support for Versal" | |
110 | depends on ARCH_VERSAL | |
111 | select ZYNQMP_FIRMWARE | |
112 | help | |
113 | This clock driver adds support for clock realted settings for | |
114 | Versal platform. | |
115 | ||
a71e907c LD |
116 | config CLK_VEXPRESS_OSC |
117 | bool "Enable driver for Arm Versatile Express OSC clock generators" | |
118 | depends on CLK && VEXPRESS_CONFIG | |
119 | help | |
120 | This clock driver adds support for clock generators present on | |
121 | Arm Versatile Express platforms. | |
122 | ||
3a64b253 SH |
123 | config CLK_ZYNQ |
124 | bool "Enable clock driver support for Zynq" | |
125 | depends on CLK && ARCH_ZYNQ | |
126 | default y | |
127 | help | |
cd9aafc0 | 128 | This clock driver adds support for clock related settings for |
3a64b253 SH |
129 | Zynq platform. |
130 | ||
2b157d81 Z |
131 | config CLK_XLNX_CLKWZRD |
132 | bool "Xilinx Clocking Wizard" | |
133 | depends on CLK | |
134 | help | |
135 | Support for the Xilinx Clocking Wizard IP core clock generator. | |
136 | The wizard support for dynamically reconfiguring the clocking | |
137 | primitives for Multiply, Divide, Phase Shift/Offset, or Duty | |
138 | Cycle. Limited by U-Boot clk uclass without set_phase API and | |
139 | set_duty_cycle API, this driver only supports set_rate to modify | |
140 | the frequency. | |
141 | ||
128ec1fe SDPP |
142 | config CLK_ZYNQMP |
143 | bool "Enable clock driver support for ZynqMP" | |
144 | depends on ARCH_ZYNQMP | |
14723ed5 | 145 | select ZYNQMP_FIRMWARE |
128ec1fe SDPP |
146 | help |
147 | This clock driver adds support for clock realted settings for | |
148 | ZynqMP platform. | |
149 | ||
a6151916 PD |
150 | config CLK_STM32MP1 |
151 | bool "Enable RCC clock driver for STM32MP1" | |
152 | depends on ARCH_STM32MP && CLK | |
153 | default y | |
154 | help | |
155 | Enable the STM32 clock (RCC) driver. Enable support for | |
156 | manipulating STM32MP1's on-SoC clocks. | |
157 | ||
260777fc TK |
158 | config CLK_CDCE9XX |
159 | bool "Enable CDCD9XX clock driver" | |
160 | depends on CLK | |
161 | help | |
162 | Enable the clock synthesizer driver for CDCE913/925/937/949 | |
163 | series of chips. | |
164 | ||
60388844 EC |
165 | config CLK_SCMI |
166 | bool "Enable SCMI clock driver" | |
167 | depends on SCMI_FIRMWARE | |
168 | help | |
169 | Enable this option if you want to support clock devices exposed | |
170 | by a SCMI agent based on SCMI clock protocol communication | |
171 | with a SCMI server. | |
172 | ||
d04c79d2 | 173 | source "drivers/clk/analogbits/Kconfig" |
9e5935c0 | 174 | source "drivers/clk/at91/Kconfig" |
cf682257 | 175 | source "drivers/clk/exynos/Kconfig" |
f77d4410 | 176 | source "drivers/clk/imx/Kconfig" |
019ef9a3 | 177 | source "drivers/clk/kendryte/Kconfig" |
f5abfed8 | 178 | source "drivers/clk/meson/Kconfig" |
2f27c921 | 179 | source "drivers/clk/microchip/Kconfig" |
82a248df | 180 | source "drivers/clk/mvebu/Kconfig" |
ae485b54 | 181 | source "drivers/clk/owl/Kconfig" |
cf682257 | 182 | source "drivers/clk/renesas/Kconfig" |
0d47bc70 | 183 | source "drivers/clk/sunxi/Kconfig" |
c40b6df8 | 184 | source "drivers/clk/sifive/Kconfig" |
cf682257 | 185 | source "drivers/clk/tegra/Kconfig" |
d09f063a | 186 | source "drivers/clk/ti/Kconfig" |
cf682257 | 187 | source "drivers/clk/uniphier/Kconfig" |
48264d9b | 188 | |
f0bcbe6c MS |
189 | config ICS8N3QV01 |
190 | bool "Enable ICS8N3QV01 VCXO driver" | |
191 | depends on CLK | |
192 | help | |
193 | Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled | |
194 | Crystal Oscillator). The output frequency can be programmed via an | |
195 | I2C interface. | |
196 | ||
07d538d2 MS |
197 | config CLK_MPC83XX |
198 | bool "Enable MPC83xx clock driver" | |
199 | depends on CLK | |
200 | help | |
201 | Support for the clock driver of the MPC83xx series of SoCs. | |
202 | ||
87e460c3 LM |
203 | config SANDBOX_CLK_CCF |
204 | bool "Sandbox Common Clock Framework [CCF] support " | |
205 | depends on SANDBOX | |
206 | select CLK_CCF | |
207 | help | |
208 | Enable this option if you want to test the Linux kernel's Common | |
209 | Clock Framework [CCF] code in U-Boot's Sandbox clock driver. | |
210 | ||
81385818 | 211 | endmenu |