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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
76dd9b6a RS |
2 | /* |
3 | * Copyright (C) 2013 Samsung Electronics | |
4 | * | |
8e4ab1d5 | 5 | * Configuration settings for the SAMSUNG SMDK5420 board. |
76dd9b6a RS |
6 | */ |
7 | ||
8e4ab1d5 AS |
8 | #ifndef __CONFIG_SMDK5420_H |
9 | #define __CONFIG_SMDK5420_H | |
76dd9b6a | 10 | |
87033d4d | 11 | #include <configs/exynos5420-common.h> |
bf637ea5 SG |
12 | #include <configs/exynos5-dt-common.h> |
13 | #include <configs/exynos5-common.h> | |
14 | ||
ea743e65 SG |
15 | #undef CONFIG_EXYNOS_FB |
16 | #undef CONFIG_EXYNOS_DP | |
17 | ||
76dd9b6a RS |
18 | #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ |
19 | ||
43900da8 | 20 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
43900da8 | 21 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) |
76dd9b6a | 22 | |
66223787 | 23 | /* USB */ |
66223787 SS |
24 | #define CONFIG_USB_XHCI_EXYNOS |
25 | ||
43581c83 | 26 | /* DRAM Memory Banks */ |
43581c83 AS |
27 | #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ |
28 | ||
8e4ab1d5 | 29 | #endif /* __CONFIG_SMDK5420_H */ |