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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
f60df20a MY |
2 | /* |
3 | * (C) Copyright 2015 Miao Yan <[email protected]> | |
f60df20a MY |
4 | */ |
5 | ||
6 | #ifndef __FW_CFG__ | |
7 | #define __FW_CFG__ | |
8 | ||
25757220 MY |
9 | #include <linux/list.h> |
10 | ||
f60df20a MY |
11 | enum qemu_fwcfg_items { |
12 | FW_CFG_SIGNATURE = 0x00, | |
13 | FW_CFG_ID = 0x01, | |
14 | FW_CFG_UUID = 0x02, | |
15 | FW_CFG_RAM_SIZE = 0x03, | |
16 | FW_CFG_NOGRAPHIC = 0x04, | |
17 | FW_CFG_NB_CPUS = 0x05, | |
18 | FW_CFG_MACHINE_ID = 0x06, | |
19 | FW_CFG_KERNEL_ADDR = 0x07, | |
20 | FW_CFG_KERNEL_SIZE = 0x08, | |
21 | FW_CFG_KERNEL_CMDLINE = 0x09, | |
22 | FW_CFG_INITRD_ADDR = 0x0a, | |
23 | FW_CFG_INITRD_SIZE = 0x0b, | |
24 | FW_CFG_BOOT_DEVICE = 0x0c, | |
25 | FW_CFG_NUMA = 0x0d, | |
26 | FW_CFG_BOOT_MENU = 0x0e, | |
27 | FW_CFG_MAX_CPUS = 0x0f, | |
28 | FW_CFG_KERNEL_ENTRY = 0x10, | |
29 | FW_CFG_KERNEL_DATA = 0x11, | |
30 | FW_CFG_INITRD_DATA = 0x12, | |
31 | FW_CFG_CMDLINE_ADDR = 0x13, | |
32 | FW_CFG_CMDLINE_SIZE = 0x14, | |
33 | FW_CFG_CMDLINE_DATA = 0x15, | |
34 | FW_CFG_SETUP_ADDR = 0x16, | |
35 | FW_CFG_SETUP_SIZE = 0x17, | |
36 | FW_CFG_SETUP_DATA = 0x18, | |
37 | FW_CFG_FILE_DIR = 0x19, | |
38 | FW_CFG_FILE_FIRST = 0x20, | |
39 | FW_CFG_WRITE_CHANNEL = 0x4000, | |
40 | FW_CFG_ARCH_LOCAL = 0x8000, | |
41 | FW_CFG_INVALID = 0xffff, | |
42 | }; | |
43 | ||
fa287b15 MY |
44 | enum { |
45 | BIOS_LINKER_LOADER_COMMAND_ALLOCATE = 0x1, | |
46 | BIOS_LINKER_LOADER_COMMAND_ADD_POINTER = 0x2, | |
47 | BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM = 0x3, | |
48 | }; | |
49 | ||
50 | enum { | |
51 | BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH = 0x1, | |
52 | BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG = 0x2, | |
53 | }; | |
54 | ||
f60df20a MY |
55 | #define FW_CFG_FILE_SLOTS 0x10 |
56 | #define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS) | |
57 | #define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL) | |
58 | ||
59 | #define FW_CFG_MAX_FILE_PATH 56 | |
fa287b15 | 60 | #define BIOS_LINKER_LOADER_FILESZ FW_CFG_MAX_FILE_PATH |
f60df20a MY |
61 | |
62 | #define QEMU_FW_CFG_SIGNATURE (('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U') | |
63 | ||
64 | #define FW_CFG_DMA_ERROR (1 << 0) | |
65 | #define FW_CFG_DMA_READ (1 << 1) | |
66 | #define FW_CFG_DMA_SKIP (1 << 2) | |
67 | #define FW_CFG_DMA_SELECT (1 << 3) | |
68 | ||
69 | #define FW_CFG_DMA_ENABLED (1 << 1) | |
70 | ||
71 | struct fw_cfg_file { | |
72 | __be32 size; | |
73 | __be16 select; | |
74 | __be16 reserved; | |
75 | char name[FW_CFG_MAX_FILE_PATH]; | |
76 | }; | |
77 | ||
25757220 MY |
78 | struct fw_file { |
79 | struct fw_cfg_file cfg; /* firmware file information */ | |
80 | unsigned long addr; /* firmware file in-memory address */ | |
81 | struct list_head list; /* list node to link to fw_list */ | |
f60df20a MY |
82 | }; |
83 | ||
099b2196 MY |
84 | struct fw_cfg_file_iter { |
85 | struct list_head *entry; /* structure to iterate file list */ | |
86 | }; | |
87 | ||
f60df20a MY |
88 | struct fw_cfg_dma_access { |
89 | __be32 control; | |
90 | __be32 length; | |
91 | __be64 address; | |
92 | }; | |
93 | ||
2e82e745 MY |
94 | struct fw_cfg_arch_ops { |
95 | void (*arch_read_pio)(uint16_t selector, uint32_t size, | |
96 | void *address); | |
97 | void (*arch_read_dma)(struct fw_cfg_dma_access *dma); | |
98 | }; | |
99 | ||
fa287b15 MY |
100 | struct bios_linker_entry { |
101 | __le32 command; | |
102 | union { | |
103 | /* | |
104 | * COMMAND_ALLOCATE - allocate a table from @alloc.file | |
105 | * subject to @alloc.align alignment (must be power of 2) | |
106 | * and @alloc.zone (can be HIGH or FSEG) requirements. | |
107 | * | |
108 | * Must appear exactly once for each file, and before | |
109 | * this file is referenced by any other command. | |
110 | */ | |
111 | struct { | |
112 | char file[BIOS_LINKER_LOADER_FILESZ]; | |
113 | __le32 align; | |
114 | uint8_t zone; | |
115 | } alloc; | |
116 | ||
117 | /* | |
118 | * COMMAND_ADD_POINTER - patch the table (originating from | |
119 | * @dest_file) at @pointer.offset, by adding a pointer to the | |
120 | * table originating from @src_file. 1,2,4 or 8 byte unsigned | |
121 | * addition is used depending on @pointer.size. | |
122 | */ | |
123 | struct { | |
124 | char dest_file[BIOS_LINKER_LOADER_FILESZ]; | |
125 | char src_file[BIOS_LINKER_LOADER_FILESZ]; | |
126 | __le32 offset; | |
127 | uint8_t size; | |
128 | } pointer; | |
129 | ||
130 | /* | |
131 | * COMMAND_ADD_CHECKSUM - calculate checksum of the range | |
132 | * specified by @cksum_start and @cksum_length fields, | |
133 | * and then add the value at @cksum.offset. | |
134 | * Checksum simply sums -X for each byte X in the range | |
135 | * using 8-bit math. | |
136 | */ | |
137 | struct { | |
138 | char file[BIOS_LINKER_LOADER_FILESZ]; | |
139 | __le32 offset; | |
140 | __le32 start; | |
141 | __le32 length; | |
142 | } cksum; | |
143 | ||
144 | /* padding */ | |
145 | char pad[124]; | |
146 | }; | |
147 | } __packed; | |
148 | ||
f60df20a MY |
149 | /** |
150 | * Initialize QEMU fw_cfg interface | |
2e82e745 MY |
151 | * |
152 | * @ops: arch specific read operations | |
f60df20a | 153 | */ |
2e82e745 | 154 | void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops); |
f60df20a | 155 | |
dd6f3abb TR |
156 | void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address); |
157 | int qemu_fwcfg_read_firmware_list(void); | |
158 | struct fw_file *qemu_fwcfg_find_file(const char *name); | |
dd6f3abb | 159 | |
f60df20a MY |
160 | /** |
161 | * Get system cpu number | |
162 | * | |
163 | * @return: cpu number in system | |
164 | */ | |
165 | int qemu_fwcfg_online_cpus(void); | |
166 | ||
099b2196 MY |
167 | /* helper functions to iterate firmware file list */ |
168 | struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter); | |
169 | struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter); | |
170 | bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter); | |
171 | ||
d3ad0623 MY |
172 | bool qemu_fwcfg_present(void); |
173 | bool qemu_fwcfg_dma_present(void); | |
174 | ||
f60df20a | 175 | #endif |