]>
Commit | Line | Data |
---|---|---|
47197682 | 1 | CONFIG_ARM=y |
a2ac2b96 TR |
2 | CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y |
3 | CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y | |
47197682 HS |
4 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
5 | # CONFIG_SPL_USE_ARCH_MEMSET is not set | |
6 | CONFIG_ARCH_ROCKCHIP=y | |
98463903 | 7 | CONFIG_TEXT_BASE=0x60000000 |
47197682 | 8 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
554e5514 | 9 | CONFIG_NR_DRAM_BANKS=1 |
fcb5117d TR |
10 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
11 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 | |
c960c0fd | 12 | CONFIG_SF_DEFAULT_SPEED=20000000 |
052170c6 | 13 | CONFIG_ENV_OFFSET=0x3F8000 |
2bba7807 | 14 | CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" |
c5a6e9f8 | 15 | CONFIG_SPL_TEXT_BASE=0x10080800 |
47197682 | 16 | CONFIG_ROCKCHIP_RK3188=y |
54562045 | 17 | # CONFIG_ROCKCHIP_STIMER is not set |
47197682 | 18 | CONFIG_TARGET_ROCK=y |
d168bcb6 | 19 | CONFIG_SPL_STACK_R_ADDR=0x60080000 |
fcb5117d | 20 | CONFIG_SPL_STACK=0x10087fff |
18e791c4 TR |
21 | CONFIG_SPL_STACK_R=y |
22 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | |
358b6a20 TR |
23 | CONFIG_DEBUG_UART_BASE=0x20064000 |
24 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
49c8ef0e | 25 | CONFIG_SYS_LOAD_ADDR=0x60800800 |
d46e86d2 | 26 | CONFIG_DEBUG_UART=y |
37304aaf | 27 | CONFIG_USE_PREBOOT=y |
a2a5053a | 28 | CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" |
47197682 | 29 | # CONFIG_DISPLAY_CPUINFO is not set |
78eba69d | 30 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
ca8a329a TR |
31 | CONFIG_SPL_MAX_SIZE=0x7800 |
32 | CONFIG_SPL_PAD_TO=0x7f8000 | |
9b5f9aeb | 33 | CONFIG_SPL_NO_BSS_LIMIT=y |
f113d7d3 | 34 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
88663126 | 35 | CONFIG_CMD_I2C=y |
47197682 | 36 | CONFIG_CMD_MMC=y |
47197682 | 37 | CONFIG_CMD_SPI=y |
47197682 HS |
38 | # CONFIG_CMD_SETEXPR is not set |
39 | CONFIG_CMD_CACHE=y | |
40 | CONFIG_CMD_TIME=y | |
41 | CONFIG_CMD_REGULATOR=y | |
42 | CONFIG_SPL_OF_CONTROL=y | |
43 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | |
44 | CONFIG_SPL_OF_PLATDATA=y | |
5dc4dfd2 | 45 | CONFIG_ENV_IS_IN_MMC=y |
8d8ee47e | 46 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
47197682 HS |
47 | CONFIG_REGMAP=y |
48 | CONFIG_SYSCON=y | |
49 | # CONFIG_SPL_SIMPLE_BUS is not set | |
50 | CONFIG_CLK=y | |
51 | CONFIG_ROCKCHIP_GPIO=y | |
52 | CONFIG_SYS_I2C_ROCKCHIP=y | |
53 | CONFIG_LED=y | |
54 | CONFIG_MMC_DW=y | |
55 | CONFIG_MMC_DW_ROCKCHIP=y | |
56 | CONFIG_PINCTRL=y | |
47197682 HS |
57 | CONFIG_DM_PMIC=y |
58 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
59 | CONFIG_PMIC_ACT8846=y | |
60 | CONFIG_REGULATOR_ACT8846=y | |
61 | CONFIG_DM_REGULATOR_FIXED=y | |
62 | CONFIG_RAM=y | |
47197682 | 63 | CONFIG_DEBUG_UART_SHIFT=2 |
9591b635 | 64 | CONFIG_SYS_NS16550_MEM32=y |
f76750d1 | 65 | CONFIG_ROCKCHIP_SERIAL=y |
47197682 | 66 | CONFIG_SYSRESET=y |
37dc72f5 TR |
67 | CONFIG_TIMER=y |
68 | CONFIG_SPL_TIMER=y | |
69 | CONFIG_ROCKCHIP_TIMER=y | |
6574864d AF |
70 | CONFIG_USB=y |
71 | CONFIG_ROCKCHIP_USB2_PHY=y | |
42fb448a | 72 | CONFIG_RANDOM_UUID=y |
47197682 HS |
73 | CONFIG_SPL_TINY_MEMSET=y |
74 | CONFIG_CMD_DHRYSTONE=y | |
75 | CONFIG_ERRNO_STR=y |