projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| dac3c6f6 CL |
1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* | |
| 3 | * CMPC885 Device Tree Source | |
| 4 | * | |
| 5 | * Copyright 2020 CS Group | |
| 6 | * | |
| 7 | */ | |
| 8 | ||
| 9 | /dts-v1/; | |
| 10 | ||
| 11 | / { | |
| 12 | model = "CMPC885"; | |
| 13 | compatible = "fsl, cmpc885", "fsl,mod885"; | |
| 14 | #address-cells = <1>; | |
| 15 | #size-cells = <1>; | |
| 16 | ||
| 17 | chosen { | |
| 18 | stdout-path = &SERIAL; | |
| 19 | }; | |
| 20 | ||
| dac3c6f6 CL |
21 | SERIAL: serial { |
| 22 | compatible = "fsl,pq1-smc"; | |
| 23 | }; | |
| 24 | ||
| 25 | FEC1: fec@0 { | |
| 26 | compatible = "fsl,pq1-fec1"; | |
| 27 | }; | |
| 28 | ||
| 29 | FEC2: fec@1 { | |
| 30 | compatible = "fsl,pq1-fec2"; | |
| 31 | }; | |
| 32 | ||
| 33 | soc: immr@ff000000 { | |
| 34 | #address-cells = <1>; | |
| 35 | #size-cells = <1>; | |
| 36 | device-type = "soc"; | |
| 37 | compatible = "simple-bus"; | |
| 38 | ranges = <0 0xff000000 0x4000>; | |
| 39 | reg = <0xff000000 0x00000200>; | |
| 40 | ||
| 26e8ebcd CL |
41 | WDT: watchdog@0 { |
| 42 | compatible = "fsl,pq1-wdt"; | |
| 43 | reg = <0x0 0x10>; | |
| 44 | timeout-sec = <2>; | |
| 45 | hw_margin_ms = <1000>; | |
| 46 | }; | |
| 47 | ||
| dac3c6f6 CL |
48 | CPM1_PIO_B: gpio-controller@ab8 { |
| 49 | #gpio-cells = <2>; | |
| 50 | compatible = "fsl,cpm1-pario-bank-b"; | |
| 51 | reg = <0xab8 0x10>; | |
| 52 | gpio-controller; | |
| 53 | }; | |
| 54 | ||
| 55 | CPM1_PIO_D: gpio-controller@970 { | |
| 56 | #gpio-cells = <2>; | |
| 57 | compatible = "fsl,cpm1-pario-bank-d"; | |
| 58 | reg = <0x970 0x10>; | |
| 59 | gpio-controller; | |
| 60 | }; | |
| 61 | ||
| 62 | CPM1_PIO_A: gpio-controller@950 { | |
| 63 | #gpio-cells = <2>; | |
| 64 | compatible = "fsl,cpm1-pario-bank-a"; | |
| 65 | reg = <0x950 0x10>; | |
| 66 | gpio-controller; | |
| 67 | }; | |
| 68 | ||
| 69 | CPM1_PIO_C: gpio-controller@960 { | |
| 70 | #gpio-cells = <2>; | |
| 71 | compatible = "fsl,cpm1-pario-bank-c"; | |
| 72 | reg = <0x960 0x10>; | |
| 73 | gpio-controller; | |
| 74 | }; | |
| 75 | ||
| 76 | CPM1_PIO_E: gpio-controller@ac8 { | |
| 77 | #gpio-cells = <2>; | |
| 78 | compatible = "fsl,cpm1-pario-bank-e"; | |
| 79 | reg = <0xac8 0x18>; | |
| 80 | gpio-controller; | |
| 81 | }; | |
| 82 | ||
| 83 | spi: spi@aa0 { | |
| 84 | status = "okay"; | |
| 85 | #address-cells = <1>; | |
| 86 | #size-cells = <1>; | |
| 87 | cell-index = <0>; | |
| 88 | compatible = "fsl,mpc8xx-spi"; | |
| 89 | gpios = <&CPM1_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */ | |
| 90 | ||
| 91 | eeprom@0 { | |
| 92 | cell-index = <1>; | |
| 93 | }; | |
| 94 | }; | |
| 95 | }; | |
| 96 | }; |