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1f045217 WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | * The original I2C interface was | |
24 | * (C) 2000 by Paolo Scaffardi ([email protected]) | |
25 | * AIRVENT SAM s.p.a - RIMINI(ITALY) | |
26 | * but has been changed substantially. | |
27 | */ | |
28 | ||
29 | #ifndef _I2C_H_ | |
30 | #define _I2C_H_ | |
31 | ||
32 | /* | |
33 | * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING | |
34 | * | |
35 | * The implementation MUST NOT use static or global variables if the | |
36 | * I2C routines are used to read SDRAM configuration information | |
37 | * because this is done before the memories are initialized. Limited | |
38 | * use of stack-based variables are OK (the initial stack size is | |
39 | * limited). | |
40 | * | |
41 | * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING | |
42 | */ | |
43 | ||
44 | /* | |
45 | * Configuration items. | |
46 | */ | |
47 | #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ | |
48 | ||
79b2d0bb | 49 | #if defined(CONFIG_I2C_MULTI_BUS) |
dc71b248 | 50 | #if !defined(CONFIG_SYS_MAX_I2C_BUS) |
6d0f6bcf | 51 | #define CONFIG_SYS_MAX_I2C_BUS 2 |
dc71b248 | 52 | #endif |
79b2d0bb SR |
53 | #define I2C_GET_BUS() i2c_get_bus_num() |
54 | #define I2C_SET_BUS(a) i2c_set_bus_num(a) | |
55 | #else | |
6d0f6bcf | 56 | #define CONFIG_SYS_MAX_I2C_BUS 1 |
79b2d0bb SR |
57 | #define I2C_GET_BUS() 0 |
58 | #define I2C_SET_BUS(a) | |
59 | #endif | |
60 | ||
8c12045a | 61 | /* define the I2C bus number for RTC and DTT if not already done */ |
6d0f6bcf JCPV |
62 | #if !defined(CONFIG_SYS_RTC_BUS_NUM) |
63 | #define CONFIG_SYS_RTC_BUS_NUM 0 | |
8c12045a | 64 | #endif |
6d0f6bcf JCPV |
65 | #if !defined(CONFIG_SYS_DTT_BUS_NUM) |
66 | #define CONFIG_SYS_DTT_BUS_NUM 0 | |
8c12045a | 67 | #endif |
6d0f6bcf JCPV |
68 | #if !defined(CONFIG_SYS_SPD_BUS_NUM) |
69 | #define CONFIG_SYS_SPD_BUS_NUM 0 | |
d8a8ea5c | 70 | #endif |
8c12045a | 71 | |
98aed379 HS |
72 | #ifndef I2C_SOFT_DECLARATIONS |
73 | # if defined(CONFIG_MPC8260) | |
6d0f6bcf | 74 | # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); |
98aed379 | 75 | # elif defined(CONFIG_8xx) |
6d0f6bcf | 76 | # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
0cf0b931 JS |
77 | |
78 | # elif (defined(CONFIG_AT91RM9200) || \ | |
79 | defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ | |
80 | defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY) | |
81 | # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; | |
98aed379 HS |
82 | # else |
83 | # define I2C_SOFT_DECLARATIONS | |
84 | # endif | |
85 | #endif | |
ecf5f077 TT |
86 | |
87 | #ifdef CONFIG_8xx | |
9c90a2c8 | 88 | /* Set default value for the I2C bus speed on 8xx. In the |
ecf5f077 TT |
89 | * future, we'll define these in all 8xx board config files. |
90 | */ | |
91 | #ifndef CONFIG_SYS_I2C_SPEED | |
92 | #define CONFIG_SYS_I2C_SPEED 50000 | |
93 | #endif | |
9c90a2c8 | 94 | #endif |
ecf5f077 | 95 | |
9c90a2c8 PT |
96 | /* |
97 | * Many boards/controllers/drivers don't support an I2C slave interface so | |
98 | * provide a default slave address for them for use in common code. A real | |
99 | * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does | |
100 | * support a slave interface. | |
101 | */ | |
ecf5f077 | 102 | #ifndef CONFIG_SYS_I2C_SLAVE |
9c90a2c8 | 103 | #define CONFIG_SYS_I2C_SLAVE 0xfe |
ecf5f077 TT |
104 | #endif |
105 | ||
1f045217 WD |
106 | /* |
107 | * Initialization, must be called once on start up, may be called | |
108 | * repeatedly to change the speed and slave addresses. | |
109 | */ | |
110 | void i2c_init(int speed, int slaveaddr); | |
6d0f6bcf | 111 | #ifdef CONFIG_SYS_I2C_INIT_BOARD |
06d01dbe WD |
112 | void i2c_init_board(void); |
113 | #endif | |
26a33504 RR |
114 | #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT |
115 | void i2c_board_late_init(void); | |
116 | #endif | |
1f045217 | 117 | |
67b23a32 HS |
118 | #if defined(CONFIG_I2C_MUX) |
119 | ||
120 | typedef struct _mux { | |
121 | uchar chip; | |
122 | uchar channel; | |
123 | char *name; | |
124 | struct _mux *next; | |
125 | } I2C_MUX; | |
126 | ||
127 | typedef struct _mux_device { | |
128 | int busid; | |
129 | I2C_MUX *mux; /* List of muxes, to reach the device */ | |
130 | struct _mux_device *next; | |
131 | } I2C_MUX_DEVICE; | |
132 | ||
67b23a32 HS |
133 | I2C_MUX_DEVICE *i2c_mux_search_device(int id); |
134 | I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf); | |
135 | int i2x_mux_select_mux(int bus); | |
136 | int i2c_mux_ident_muxstring_f (uchar *buf); | |
137 | #endif | |
138 | ||
1f045217 WD |
139 | /* |
140 | * Probe the given I2C chip address. Returns 0 if a chip responded, | |
141 | * not 0 on failure. | |
142 | */ | |
143 | int i2c_probe(uchar chip); | |
144 | ||
145 | /* | |
146 | * Read/Write interface: | |
147 | * chip: I2C chip address, range 0..127 | |
148 | * addr: Memory (register) address within the chip | |
149 | * alen: Number of bytes to use for addr (typically 1, 2 for larger | |
150 | * memories, 0 for register type devices with only one | |
151 | * register) | |
152 | * buffer: Where to read/write the data | |
153 | * len: How many bytes to read/write | |
154 | * | |
155 | * Returns: 0 on success, not 0 on failure | |
156 | */ | |
157 | int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); | |
158 | int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); | |
159 | ||
160 | /* | |
161 | * Utility routines to read/write registers. | |
162 | */ | |
ecf5f077 TT |
163 | static inline u8 i2c_reg_read(u8 addr, u8 reg) |
164 | { | |
165 | u8 buf; | |
166 | ||
167 | #ifdef CONFIG_8xx | |
168 | /* MPC8xx needs this. Maybe one day we can get rid of it. */ | |
169 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
170 | #endif | |
171 | ||
172 | #ifdef DEBUG | |
173 | printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); | |
174 | #endif | |
175 | ||
ecf5f077 | 176 | i2c_read(addr, reg, 1, &buf, 1); |
ecf5f077 TT |
177 | |
178 | return buf; | |
179 | } | |
180 | ||
181 | static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) | |
182 | { | |
183 | #ifdef CONFIG_8xx | |
184 | /* MPC8xx needs this. Maybe one day we can get rid of it. */ | |
185 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
186 | #endif | |
187 | ||
188 | #ifdef DEBUG | |
189 | printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", | |
190 | __func__, addr, reg, val); | |
191 | #endif | |
192 | ||
ecf5f077 | 193 | i2c_write(addr, reg, 1, &val, 1); |
ecf5f077 | 194 | } |
1f045217 | 195 | |
bb99ad6d BW |
196 | /* |
197 | * Functions for setting the current I2C bus and its speed | |
198 | */ | |
199 | ||
200 | /* | |
201 | * i2c_set_bus_num: | |
202 | * | |
203 | * Change the active I2C bus. Subsequent read/write calls will | |
204 | * go to this one. | |
205 | * | |
53677ef1 | 206 | * bus - bus index, zero based |
bb99ad6d | 207 | * |
53677ef1 | 208 | * Returns: 0 on success, not 0 on failure |
bb99ad6d BW |
209 | * |
210 | */ | |
9ca880a2 | 211 | int i2c_set_bus_num(unsigned int bus); |
bb99ad6d BW |
212 | |
213 | /* | |
214 | * i2c_get_bus_num: | |
215 | * | |
216 | * Returns index of currently active I2C bus. Zero-based. | |
217 | */ | |
218 | ||
9ca880a2 | 219 | unsigned int i2c_get_bus_num(void); |
bb99ad6d BW |
220 | |
221 | /* | |
222 | * i2c_set_bus_speed: | |
223 | * | |
224 | * Change the speed of the active I2C bus | |
225 | * | |
53677ef1 | 226 | * speed - bus speed in Hz |
bb99ad6d | 227 | * |
53677ef1 | 228 | * Returns: 0 on success, not 0 on failure |
bb99ad6d BW |
229 | * |
230 | */ | |
9ca880a2 | 231 | int i2c_set_bus_speed(unsigned int); |
bb99ad6d BW |
232 | |
233 | /* | |
234 | * i2c_get_bus_speed: | |
235 | * | |
236 | * Returns speed of currently active I2C bus in Hz | |
237 | */ | |
238 | ||
9ca880a2 | 239 | unsigned int i2c_get_bus_speed(void); |
bb99ad6d | 240 | |
1f045217 | 241 | #endif /* _I2C_H_ */ |