[J-u-boot.git] / board / cobra5272 / flash.c

/*
 * (C) Copyright 2000-2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>

#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
#define FLASH_BANK_SIZE 0x200000

flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];

void flash_print_info (flash_info_t * info)
{
	int i;

	switch (info->flash_id & FLASH_VENDMASK) {
	case (AMD_MANUFACT & FLASH_VENDMASK):
		printf ("AMD: ");
		break;
	default:
		printf ("Unknown Vendor ");
		break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case (AMD_ID_PL160CB & FLASH_TYPEMASK):
		printf ("AM29PL160CB (16Mbit)\n");
		break;
	default:
		printf ("Unknown Chip Type\n");
		goto Done;
		break;
	}

	printf ("  Size: %ld MB in %d Sectors\n",
		info->size >> 20, info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; i++) {
		if ((i % 5) == 0) {
			printf ("\n   ");
		}
		printf (" %08lX%s", info->start[i],
			info->protect[i] ? " (RO)" : "     ");
	}
	printf ("\n");

Done:
	return;
}


unsigned long flash_init (void)
{
	int i, j;
	ulong size = 0;

	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
		ulong flashbase = 0;

		flash_info[i].flash_id =
			(AMD_MANUFACT & FLASH_VENDMASK) |
			(AMD_ID_PL160CB & FLASH_TYPEMASK);
		flash_info[i].size = FLASH_BANK_SIZE;
		flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
		memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
		if (i == 0)
			flashbase = PHYS_FLASH_1;
		else
			panic ("configured to many flash banks!\n");

		for (j = 0; j < flash_info[i].sector_count; j++) {
			if (j == 0) {
				/* 1st is 16 KiB */
				flash_info[i].start[j] = flashbase;
			}
			if ((j >= 1) && (j <= 2)) {
				/* 2nd and 3rd are 8 KiB */
				flash_info[i].start[j] =
					flashbase + 0x4000 + 0x2000 * (j - 1);
			}
			if (j == 3) {
				/* 4th is 224 KiB */
				flash_info[i].start[j] = flashbase + 0x8000;
			}
			if ((j >= 4) && (j <= 10)) {
				/* rest is 256 KiB */
				flash_info[i].start[j] =
					flashbase + 0x40000 + 0x40000 * (j -
									 4);
			}
		}
		size += flash_info[i].size;
	}

	flash_protect (FLAG_PROTECT_SET,
		       CONFIG_SYS_FLASH_BASE,
		       CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);

	return size;
}


#define CMD_READ_ARRAY		0x00F0
#define CMD_UNLOCK1		0x00AA
#define CMD_UNLOCK2		0x0055
#define CMD_ERASE_SETUP		0x0080
#define CMD_ERASE_CONFIRM	0x0030
#define CMD_PROGRAM		0x00A0
#define CMD_UNLOCK_BYPASS	0x0020

#define MEM_FLASH_ADDR1		(*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
#define MEM_FLASH_ADDR2		(*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))

#define BIT_ERASE_DONE		0x0080
#define BIT_RDY_MASK		0x0080
#define BIT_PROGRAM_ERROR	0x0020
#define BIT_TIMEOUT		0x80000000	/* our flag */

#define READY 1
#define ERR   2
#define TMO   4


int flash_erase (flash_info_t * info, int s_first, int s_last)
{
	ulong result;
	int iflag, cflag, prot, sect;
	int rc = ERR_OK;
	int chip1;

	/* first look for protection bits */

	if (info->flash_id == FLASH_UNKNOWN)
		return ERR_UNKNOWN_FLASH_TYPE;

	if ((s_first < 0) || (s_first > s_last)) {
		return ERR_INVAL;
	}

	if ((info->flash_id & FLASH_VENDMASK) !=
	    (AMD_MANUFACT & FLASH_VENDMASK)) {
		return ERR_UNKNOWN_FLASH_VENDOR;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}
	if (prot)
		return ERR_PROTECTED;

	/*
	 * Disable interrupts which might cause a timeout
	 * here. Remember that our exception vectors are
	 * at address 0 in the flash, and we don't want a
	 * (ticker) exception to happen while the flash
	 * chip is in programming mode.
	 */

	cflag = icache_status ();
	icache_disable ();
	iflag = disable_interrupts ();

	printf ("\n");

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
		printf ("Erasing sector %2d ... ", sect);

		/* arm simple, non interrupt dependent timer */
		set_timer (0);

		if (info->protect[sect] == 0) {	/* not protected */
			volatile u16 *addr =
				(volatile u16 *) (info->start[sect]);

			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
			MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;

			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
			*addr = CMD_ERASE_CONFIRM;

			/* wait until flash is ready */
			chip1 = 0;

			do {
				result = *addr;

				/* check timeout */
				if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
					MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
					chip1 = TMO;
					break;
				}

				if (!chip1
				    && (result & 0xFFFF) & BIT_ERASE_DONE)
					chip1 = READY;

			} while (!chip1);

			MEM_FLASH_ADDR1 = CMD_READ_ARRAY;

			if (chip1 == ERR) {
				rc = ERR_PROG_ERROR;
				goto outahere;
			}
			if (chip1 == TMO) {
				rc = ERR_TIMOUT;
				goto outahere;
			}

			printf ("ok.\n");
		} else {	/* it was protected */

			printf ("protected!\n");
		}
	}

	if (ctrlc ())
		printf ("User Interrupt!\n");

      outahere:
	/* allow flash to settle - wait 10 ms */
	udelay (10000);

	if (iflag)
		enable_interrupts ();

	if (cflag)
		icache_enable ();

	return rc;
}

static int write_word (flash_info_t * info, ulong dest, ulong data)
{
	volatile u16 *addr = (volatile u16 *) dest;
	ulong result;
	int rc = ERR_OK;
	int cflag, iflag;
	int chip1;

	/*
	 * Check if Flash is (sufficiently) erased
	 */
	result = *addr;
	if ((result & data) != data)
		return ERR_NOT_ERASED;


	/*
	 * Disable interrupts which might cause a timeout
	 * here. Remember that our exception vectors are
	 * at address 0 in the flash, and we don't want a
	 * (ticker) exception to happen while the flash
	 * chip is in programming mode.
	 */

	cflag = icache_status ();
	icache_disable ();
	iflag = disable_interrupts ();

	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
	MEM_FLASH_ADDR1 = CMD_PROGRAM;
	*addr = data;

	/* arm simple, non interrupt dependent timer */
	set_timer (0);

	/* wait until flash is ready */
	chip1 = 0;
	do {
		result = *addr;

		/* check timeout */
		if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
			chip1 = ERR | TMO;
			break;
		}
		if (!chip1 && ((result & 0x80) == (data & 0x80)))
			chip1 = READY;

	} while (!chip1);

	*addr = CMD_READ_ARRAY;

	if (chip1 == ERR || *addr != data)
		rc = ERR_PROG_ERROR;

	if (iflag)
		enable_interrupts ();

	if (cflag)
		icache_enable ();

	return rc;
}


int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong wp, data;
	int rc;

	if (addr & 1) {
		printf ("unaligned destination not supported\n");
		return ERR_ALIGN;
	}

#if 0
	if (cnt & 1) {
		printf ("odd transfer sizes not supported\n");
		return ERR_ALIGN;
	}
#endif

	wp = addr;

	if (addr & 1) {
		data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
							  src);
		if ((rc = write_word (info, wp - 1, data)) != 0) {
			return (rc);
		}
		src += 1;
		wp += 1;
		cnt -= 1;
	}

	while (cnt >= 2) {
		data = *((volatile u16 *) src);
		if ((rc = write_word (info, wp, data)) != 0) {
			return (rc);
		}
		src += 2;
		wp += 2;
		cnt -= 2;
	}

	if (cnt == 1) {
		data = (*((volatile u8 *) src) << 8) |
			*((volatile u8 *) (wp + 1));
		if ((rc = write_word (info, wp, data)) != 0) {
			return (rc);
		}
		src += 1;
		wp += 1;
		cnt -= 1;
	}

	return ERR_OK;
}
Commit	Line	Data
a562e1bd WD	1	/*
	2	* (C) Copyright 2000-2003
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#include <common.h>
	25
6d0f6bcf	26	#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
a562e1bd WD	27	#define FLASH_BANK_SIZE 0x200000
a562e1bd WD	28
6d0f6bcf	29	flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
a562e1bd WD	30
	31	void flash_print_info (flash_info_t * info)
	32	{
	33	int i;
	34
	35	switch (info->flash_id & FLASH_VENDMASK) {
	36	case (AMD_MANUFACT & FLASH_VENDMASK):
	37	printf ("AMD: ");
	38	break;
	39	default:
	40	printf ("Unknown Vendor ");
	41	break;
	42	}
	43
	44	switch (info->flash_id & FLASH_TYPEMASK) {
	45	case (AMD_ID_PL160CB & FLASH_TYPEMASK):
	46	printf ("AM29PL160CB (16Mbit)\n");
	47	break;
	48	default:
	49	printf ("Unknown Chip Type\n");
	50	goto Done;
	51	break;
	52	}
	53
	54	printf (" Size: %ld MB in %d Sectors\n",
	55	info->size >> 20, info->sector_count);
	56
	57	printf (" Sector Start Addresses:");
	58	for (i = 0; i < info->sector_count; i++) {
	59	if ((i % 5) == 0) {
	60	printf ("\n ");
	61	}
	62	printf (" %08lX%s", info->start[i],
	63	info->protect[i] ? " (RO)" : " ");
	64	}
	65	printf ("\n");
	66
	67	Done:
483a0cf8	68	return;
a562e1bd WD	69	}
	70
	71
	72	unsigned long flash_init (void)
	73	{
	74	int i, j;
	75	ulong size = 0;
	76
6d0f6bcf	77	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
a562e1bd WD	78	ulong flashbase = 0;
	79
	80	flash_info[i].flash_id =
	81	(AMD_MANUFACT & FLASH_VENDMASK) \|
	82	(AMD_ID_PL160CB & FLASH_TYPEMASK);
	83	flash_info[i].size = FLASH_BANK_SIZE;
6d0f6bcf JCPV	84	flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
6d0f6bcf JCPV	85	memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
a562e1bd WD	86	if (i == 0)
	87	flashbase = PHYS_FLASH_1;
	88	else
	89	panic ("configured to many flash banks!\n");
	90
	91	for (j = 0; j < flash_info[i].sector_count; j++) {
	92	if (j == 0) {
	93	/* 1st is 16 KiB */
	94	flash_info[i].start[j] = flashbase;
	95	}
	96	if ((j >= 1) && (j <= 2)) {
	97	/* 2nd and 3rd are 8 KiB */
	98	flash_info[i].start[j] =
	99	flashbase + 0x4000 + 0x2000 * (j - 1);
	100	}
	101	if (j == 3) {
	102	/* 4th is 224 KiB */
	103	flash_info[i].start[j] = flashbase + 0x8000;
	104	}
	105	if ((j >= 4) && (j <= 10)) {
	106	/* rest is 256 KiB */
	107	flash_info[i].start[j] =
	108	flashbase + 0x40000 + 0x40000 * (j -
	109	4);
	110	}
	111	}
	112	size += flash_info[i].size;
	113	}
	114
	115	flash_protect (FLAG_PROTECT_SET,
6d0f6bcf JCPV	116	CONFIG_SYS_FLASH_BASE,
6d0f6bcf JCPV	117	CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
a562e1bd WD	118
	119	return size;
	120	}
	121
	122
	123	#define CMD_READ_ARRAY 0x00F0
	124	#define CMD_UNLOCK1 0x00AA
	125	#define CMD_UNLOCK2 0x0055
	126	#define CMD_ERASE_SETUP 0x0080
	127	#define CMD_ERASE_CONFIRM 0x0030
	128	#define CMD_PROGRAM 0x00A0
	129	#define CMD_UNLOCK_BYPASS 0x0020
	130
6d0f6bcf JCPV	131	#define MEM_FLASH_ADDR1 ((volatile u16 )(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
6d0f6bcf JCPV	132	#define MEM_FLASH_ADDR2 ((volatile u16 )(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
a562e1bd WD	133
	134	#define BIT_ERASE_DONE 0x0080
	135	#define BIT_RDY_MASK 0x0080
	136	#define BIT_PROGRAM_ERROR 0x0020
	137	#define BIT_TIMEOUT 0x80000000 /* our flag */
	138
	139	#define READY 1
	140	#define ERR 2
	141	#define TMO 4
	142
	143
	144	int flash_erase (flash_info_t * info, int s_first, int s_last)
	145	{
	146	ulong result;
	147	int iflag, cflag, prot, sect;
	148	int rc = ERR_OK;
	149	int chip1;
	150
	151	/* first look for protection bits */
	152
	153	if (info->flash_id == FLASH_UNKNOWN)
	154	return ERR_UNKNOWN_FLASH_TYPE;
	155
	156	if ((s_first < 0) \|\| (s_first > s_last)) {
	157	return ERR_INVAL;
	158	}
	159
	160	if ((info->flash_id & FLASH_VENDMASK) !=
	161	(AMD_MANUFACT & FLASH_VENDMASK)) {
	162	return ERR_UNKNOWN_FLASH_VENDOR;
	163	}
	164
	165	prot = 0;
	166	for (sect = s_first; sect <= s_last; ++sect) {
	167	if (info->protect[sect]) {
	168	prot++;
	169	}
	170	}
	171	if (prot)
	172	return ERR_PROTECTED;
	173
	174	/*
	175	* Disable interrupts which might cause a timeout
	176	* here. Remember that our exception vectors are
	177	* at address 0 in the flash, and we don't want a
	178	* (ticker) exception to happen while the flash
	179	* chip is in programming mode.
	180	*/
	181
	182	cflag = icache_status ();
	183	icache_disable ();
	184	iflag = disable_interrupts ();
	185
	186	printf ("\n");
	187
	188	/* Start erase on unprotected sectors */
	189	for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
	190	printf ("Erasing sector %2d ... ", sect);
	191
	192	/* arm simple, non interrupt dependent timer */
	193	set_timer (0);
	194
	195	if (info->protect[sect] == 0) { /* not protected */
	196	volatile u16 *addr =
197	(volatile u16 *) (info->start[sect]);
198
199	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
200	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
201	MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
202
203	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
204	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
205	*addr = CMD_ERASE_CONFIRM;
206
207	/* wait until flash is ready */
208	chip1 = 0;
209
210	do {
211	result = *addr;
212
213	/* check timeout */
6d0f6bcf	214	if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
a562e1bd WD	215	MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
	216	chip1 = TMO;
	217	break;
	218	}
	219
	220	if (!chip1
	221	&& (result & 0xFFFF) & BIT_ERASE_DONE)
	222	chip1 = READY;
	223
	224	} while (!chip1);
	225
	226	MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
	227
	228	if (chip1 == ERR) {
	229	rc = ERR_PROG_ERROR;
	230	goto outahere;
	231	}
	232	if (chip1 == TMO) {
	233	rc = ERR_TIMOUT;
	234	goto outahere;
	235	}
	236
	237	printf ("ok.\n");
	238	} else { /* it was protected */
	239
	240	printf ("protected!\n");
	241	}
	242	}
	243
	244	if (ctrlc ())
	245	printf ("User Interrupt!\n");
	246
	247	outahere:
	248	/* allow flash to settle - wait 10 ms */
	249	udelay (10000);
	250
	251	if (iflag)
	252	enable_interrupts ();
	253
	254	if (cflag)
	255	icache_enable ();
	256
	257	return rc;
	258	}
	259
8de7ed3a	260	static int write_word (flash_info_t * info, ulong dest, ulong data)
a562e1bd WD	261	{
	262	volatile u16 addr = (volatile u16 ) dest;
	263	ulong result;
	264	int rc = ERR_OK;
	265	int cflag, iflag;
	266	int chip1;
	267
	268	/*
	269	* Check if Flash is (sufficiently) erased
	270	*/
	271	result = *addr;
	272	if ((result & data) != data)
	273	return ERR_NOT_ERASED;
	274
	275
	276	/*
	277	* Disable interrupts which might cause a timeout
	278	* here. Remember that our exception vectors are
	279	* at address 0 in the flash, and we don't want a
	280	* (ticker) exception to happen while the flash
	281	* chip is in programming mode.
	282	*/
	283
	284	cflag = icache_status ();
	285	icache_disable ();
	286	iflag = disable_interrupts ();
	287
	288	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
	289	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
	290	MEM_FLASH_ADDR1 = CMD_PROGRAM;
	291	*addr = data;
	292
	293	/* arm simple, non interrupt dependent timer */
	294	set_timer (0);
	295
	296	/* wait until flash is ready */
	297	chip1 = 0;
	298	do {
	299	result = *addr;
	300
	301	/* check timeout */
6d0f6bcf	302	if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
a562e1bd WD	303	chip1 = ERR \| TMO;
	304	break;
	305	}
	306	if (!chip1 && ((result & 0x80) == (data & 0x80)))
	307	chip1 = READY;
	308
	309	} while (!chip1);
	310
	311	*addr = CMD_READ_ARRAY;
	312
	313	if (chip1 == ERR \|\| *addr != data)
	314	rc = ERR_PROG_ERROR;
	315
	316	if (iflag)
	317	enable_interrupts ();
	318
	319	if (cflag)
	320	icache_enable ();
	321
	322	return rc;
	323	}
	324
	325
	326	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
	327	{
	328	ulong wp, data;
	329	int rc;
	330
	331	if (addr & 1) {
	332	printf ("unaligned destination not supported\n");
	333	return ERR_ALIGN;
	334	}
	335
	336	#if 0
	337	if (cnt & 1) {
	338	printf ("odd transfer sizes not supported\n");
	339	return ERR_ALIGN;
	340	}
	341	#endif
	342
	343	wp = addr;
	344
	345	if (addr & 1) {
	346	data = (((volatile u8 ) addr) << 8) \| ((volatile u8 )
	347	src);
	348	if ((rc = write_word (info, wp - 1, data)) != 0) {
	349	return (rc);
	350	}
	351	src += 1;
	352	wp += 1;
	353	cnt -= 1;
	354	}
	355
	356	while (cnt >= 2) {
	357	data = ((volatile u16 ) src);
	358	if ((rc = write_word (info, wp, data)) != 0) {
	359	return (rc);
	360	}
	361	src += 2;
	362	wp += 2;
	363	cnt -= 2;
	364	}
	365
	366	if (cnt == 1) {
367	data = (((volatile u8 ) src) << 8) \|
368	((volatile u8 ) (wp + 1));
369	if ((rc = write_word (info, wp, data)) != 0) {
370	return (rc);
371	}
372	src += 1;
373	wp += 1;
374	cnt -= 1;
375	}
376
377	return ERR_OK;
378	}