[J-u-boot.git] / drivers / video / da8xx-fb.h

/*
 * Porting to u-boot:
 *
 * (C) Copyright 2011
 * Stefano Babic, DENX Software Engineering, [email protected].
 *
 * Copyright (C) 2008-2009 MontaVista Software Inc.
 * Copyright (C) 2008-2009 Texas Instruments Inc
 *
 * Based on the LCD driver for TI Avalanche processors written by
 * Ajay Singh and Shalom Hai.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef DA8XX_FB_H
#define DA8XX_FB_H

enum panel_type {
	QVGA = 0,
	WVGA
};

enum panel_shade {
	MONOCHROME = 0,
	COLOR_ACTIVE,
	COLOR_PASSIVE,
};

enum raster_load_mode {
	LOAD_DATA = 1,
	LOAD_PALETTE,
};

struct display_panel {
	enum panel_type panel_type; /* QVGA */
	int max_bpp;
	int min_bpp;
	enum panel_shade panel_shade;
};

struct da8xx_panel {
	const char	name[25];	/* Full name <vendor>_<model> */
	unsigned short	width;
	unsigned short	height;
	int		hfp;		/* Horizontal front porch */
	int		hbp;		/* Horizontal back porch */
	int		hsw;		/* Horizontal Sync Pulse Width */
	int		vfp;		/* Vertical front porch */
	int		vbp;		/* Vertical back porch */
	int		vsw;		/* Vertical Sync Pulse Width */
	unsigned int	pxl_clk;	/* Pixel clock */
	unsigned char	invert_pxl_clk;	/* Invert Pixel clock */
};

struct da8xx_lcdc_platform_data {
	const char manu_name[10];
	void *controller_data;
	const char type[25];
	void (*panel_power_ctrl)(int);
};

struct lcd_ctrl_config {
	const struct display_panel *p_disp_panel;

	/* AC Bias Pin Frequency */
	int ac_bias;

	/* AC Bias Pin Transitions per Interrupt */
	int ac_bias_intrpt;

	/* DMA burst size */
	int dma_burst_sz;

	/* Bits per pixel */
	int bpp;

	/* FIFO DMA Request Delay */
	int fdd;

	/* TFT Alternative Signal Mapping (Only for active) */
	unsigned char tft_alt_mode;

	/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
	unsigned char stn_565_mode;

	/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
	unsigned char mono_8bit_mode;

	/* Invert line clock */
	unsigned char invert_line_clock;

	/* Invert frame clock  */
	unsigned char invert_frm_clock;

	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
	unsigned char sync_edge;

	/* Horizontal and Vertical Sync: Control: 0=ignore */
	unsigned char sync_ctrl;

	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
	unsigned char raster_order;
};

struct lcd_sync_arg {
	int back_porch;
	int front_porch;
	int pulse_width;
};

void da8xx_video_init(const struct da8xx_panel *panel,
		      const struct lcd_ctrl_config *lcd_cfg,
		      int bits_pixel);

#endif  /* ifndef DA8XX_FB_H */
Commit	Line	Data
13402868 SB	1	/*
	2	* Porting to u-boot:
	3	*
	4	* (C) Copyright 2011
	5	* Stefano Babic, DENX Software Engineering, [email protected].
	6	*
	7	* Copyright (C) 2008-2009 MontaVista Software Inc.
	8	* Copyright (C) 2008-2009 Texas Instruments Inc
	9	*
	10	* Based on the LCD driver for TI Avalanche processors written by
	11	* Ajay Singh and Shalom Hai.
	12	*
1a459660	13	* SPDX-License-Identifier: GPL-2.0+
13402868 SB	14	*/
	15
	16	#ifndef DA8XX_FB_H
	17	#define DA8XX_FB_H
	18
	19	enum panel_type {
0017f9ee HS	20	QVGA = 0,
0017f9ee HS	21	WVGA
13402868 SB	22	};
	23
	24	enum panel_shade {
	25	MONOCHROME = 0,
	26	COLOR_ACTIVE,
	27	COLOR_PASSIVE,
	28	};
	29
	30	enum raster_load_mode {
	31	LOAD_DATA = 1,
	32	LOAD_PALETTE,
	33	};
	34
	35	struct display_panel {
	36	enum panel_type panel_type; /* QVGA */
	37	int max_bpp;
	38	int min_bpp;
	39	enum panel_shade panel_shade;
	40	};
	41
	42	struct da8xx_panel {
	43	const char name[25]; /* Full name <vendor>_<model> */
	44	unsigned short width;
	45	unsigned short height;
	46	int hfp; /* Horizontal front porch */
	47	int hbp; /* Horizontal back porch */
	48	int hsw; /* Horizontal Sync Pulse Width */
	49	int vfp; /* Vertical front porch */
	50	int vbp; /* Vertical back porch */
	51	int vsw; /* Vertical Sync Pulse Width */
	52	unsigned int pxl_clk; /* Pixel clock */
	53	unsigned char invert_pxl_clk; /* Invert Pixel clock */
	54	};
	55
	56	struct da8xx_lcdc_platform_data {
	57	const char manu_name[10];
	58	void *controller_data;
	59	const char type[25];
	60	void (*panel_power_ctrl)(int);
	61	};
	62
	63	struct lcd_ctrl_config {
	64	const struct display_panel *p_disp_panel;
	65
	66	/* AC Bias Pin Frequency */
	67	int ac_bias;
	68
	69	/* AC Bias Pin Transitions per Interrupt */
	70	int ac_bias_intrpt;
	71
	72	/* DMA burst size */
	73	int dma_burst_sz;
	74
	75	/* Bits per pixel */
	76	int bpp;
	77
	78	/* FIFO DMA Request Delay */
	79	int fdd;
	80
	81	/* TFT Alternative Signal Mapping (Only for active) */
	82	unsigned char tft_alt_mode;
	83
	84	/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
	85	unsigned char stn_565_mode;
86
87	/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
88	unsigned char mono_8bit_mode;
89
90	/* Invert line clock */
91	unsigned char invert_line_clock;
92
93	/* Invert frame clock */
94	unsigned char invert_frm_clock;
95
96	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
97	unsigned char sync_edge;
98
99	/* Horizontal and Vertical Sync: Control: 0=ignore */
100	unsigned char sync_ctrl;
101
102	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
103	unsigned char raster_order;
104	};
105
106	struct lcd_sync_arg {
107	int back_porch;
108	int front_porch;
109	int pulse_width;
110	};
111
765f2f08 HS	112	void da8xx_video_init(const struct da8xx_panel *panel,
	113	const struct lcd_ctrl_config *lcd_cfg,
	114	int bits_pixel);
13402868 SB	115
13402868 SB	116	#endif /* ifndef DA8XX_FB_H */