projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 58b48577 MK |
1 | Notes on the the generic USB-OHCI driver |
| 2 | ======================================== | |
| 3 | ||
| 7817cb20 | 4 | This driver (drivers/usb/usb_ohci.[ch]) is the result of the merge of |
| 58b48577 MK |
5 | various existing OHCI drivers that were basically identical beside |
| 6 | cpu/board dependant initalization. This initalization has been moved | |
| 7 | into cpu/board directories and are called via the hooks below. | |
| 8 | ||
| 9 | Configuration options | |
| 10 | ---------------------- | |
| 11 | ||
| fc43be47 | 12 | CONFIG_USB_OHCI_NEW: enable the new OHCI driver |
| 58b48577 | 13 | |
| fc43be47 | 14 | CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks: |
| 58b48577 | 15 | |
| fc43be47 MK |
16 | - extern int usb_board_init(void); |
| 17 | - extern int usb_board_stop(void); | |
| 18 | - extern int usb_cpu_init_fail(void); | |
| 58b48577 | 19 | |
| fc43be47 | 20 | CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks: |
| 58b48577 | 21 | |
| fc43be47 MK |
22 | - extern int usb_cpu_init(void); |
| 23 | - extern int usb_cpu_stop(void); | |
| 24 | - extern int usb_cpu_init_fail(void); | |
| 58b48577 | 25 | |
| fc43be47 MK |
26 | CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI |
| 27 | registers | |
| 58b48577 | 28 | |
| fc43be47 | 29 | CFG_USB_OHCI_SLOT_NAME: slot name |
| 58b48577 | 30 | |
| fc43be47 MK |
31 | CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the |
| 32 | root hub. | |
| 58b48577 MK |
33 | |
| 34 | ||
| 35 | Endianness issues | |
| 36 | ------------------ | |
| 37 | ||
| fc43be47 MK |
38 | The USB bus operates in little endian, but unfortunately there are |
| 39 | OHCI controllers that operate in big endian such as ppc4xx and | |
| 40 | mpc5xxx. For these the config option | |
| 58b48577 | 41 | |
| fc43be47 MK |
42 | CFG_OHCI_BE_CONTROLLER |
| 43 | ||
| be5d72d1 | 44 | needs to be defined. |
| fc43be47 MK |
45 | |
| 46 | ||
| 47 | PCI Controllers | |
| 48 | ---------------- | |
| 49 | ||
| 50 | You'll need to define | |
| 51 | ||
| 52 | CONFIG_PCI_OHCI | |
| 53 | ||
| 54 | PCI Controllers need to do byte swapping on register accesses, so they | |
| 55 | should to define: | |
| 56 | ||
| 57 | CFG_OHCI_SWAP_REG_ACCESS |