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Commit | Line | Data |
---|---|---|
cacf0f8a AF |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_IMX8M=y | |
3 | CONFIG_TEXT_BASE=0x40200000 | |
4 | CONFIG_SYS_MALLOC_LEN=0x2000000 | |
5 | CONFIG_SPL_GPIO=y | |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
9455dc32 TR |
8 | CONFIG_SF_DEFAULT_SPEED=40000000 |
9 | CONFIG_SF_DEFAULT_MODE=0 | |
cacf0f8a AF |
10 | CONFIG_ENV_SIZE=0x2000 |
11 | CONFIG_ENV_OFFSET=0xFFFFDE00 | |
12 | CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg" | |
13 | CONFIG_DM_GPIO=y | |
14 | CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" | |
15 | CONFIG_SPL_TEXT_BASE=0x7E2000 | |
16 | CONFIG_TARGET_IMX8MM_BEACON=y | |
9455dc32 | 17 | CONFIG_SYS_MONITOR_LEN=524288 |
cacf0f8a AF |
18 | CONFIG_SPL_SERIAL=y |
19 | CONFIG_SPL_DRIVERS_MISC=y | |
9455dc32 | 20 | CONFIG_SPL_STACK=0x920000 |
cacf0f8a AF |
21 | CONFIG_SPL=y |
22 | CONFIG_SYS_LOAD_ADDR=0x40480000 | |
cacf0f8a AF |
23 | CONFIG_FIT=y |
24 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
25 | CONFIG_SPL_LOAD_FIT=y | |
42fb448a | 26 | CONFIG_SYS_BOOTM_LEN=0x800000 |
cacf0f8a AF |
27 | CONFIG_OF_SYSTEM_SETUP=y |
28 | CONFIG_USE_BOOTCOMMAND=y | |
29 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" | |
30 | CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" | |
42fb448a TR |
31 | CONFIG_SYS_CBSIZE=2048 |
32 | CONFIG_SYS_PBSIZE=2074 | |
cacf0f8a AF |
33 | CONFIG_SPL_MAX_SIZE=0x25000 |
34 | CONFIG_SPL_PAD_TO=0x0 | |
35 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | |
36 | CONFIG_SPL_BSS_START_ADDR=0x910000 | |
37 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 | |
38 | CONFIG_SPL_BOARD_INIT=y | |
39 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | |
82e26e0d SG |
40 | CONFIG_SPL_SYS_MALLOC=y |
41 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
42 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 | |
43 | CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 | |
cacf0f8a AF |
44 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
45 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 | |
cacf0f8a AF |
46 | CONFIG_SPL_I2C=y |
47 | CONFIG_SPL_NOR_SUPPORT=y | |
48 | CONFIG_SPL_POWER=y | |
cacf0f8a AF |
49 | CONFIG_SPL_WATCHDOG=y |
50 | CONFIG_HUSH_PARSER=y | |
ba6d575e | 51 | CONFIG_SYS_PROMPT="u-boot=> " |
cacf0f8a AF |
52 | # CONFIG_CMD_EXPORTENV is not set |
53 | # CONFIG_CMD_IMPORTENV is not set | |
54 | # CONFIG_CMD_CRC32 is not set | |
55 | CONFIG_CMD_CLK=y | |
56 | CONFIG_CMD_FUSE=y | |
57 | CONFIG_CMD_GPIO=y | |
58 | CONFIG_CMD_I2C=y | |
59 | CONFIG_CMD_MMC=y | |
60 | CONFIG_CMD_PART=y | |
61 | CONFIG_CMD_SPI=y | |
62 | CONFIG_CMD_USB=y | |
63 | CONFIG_CMD_USB_SDP=y | |
64 | CONFIG_CMD_USB_MASS_STORAGE=y | |
65 | CONFIG_CMD_DHCP=y | |
66 | CONFIG_CMD_MII=y | |
67 | CONFIG_CMD_PING=y | |
68 | CONFIG_CMD_CACHE=y | |
69 | CONFIG_CMD_PMIC=y | |
70 | CONFIG_CMD_REGULATOR=y | |
71 | CONFIG_CMD_EXT2=y | |
72 | CONFIG_CMD_EXT4=y | |
73 | CONFIG_CMD_EXT4_WRITE=y | |
74 | CONFIG_CMD_FAT=y | |
75 | CONFIG_OF_CONTROL=y | |
76 | CONFIG_SPL_OF_CONTROL=y | |
77 | CONFIG_ENV_OVERWRITE=y | |
78 | CONFIG_ENV_IS_IN_MMC=y | |
79 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
80 | CONFIG_SYS_MMC_ENV_DEV=2 | |
81 | CONFIG_SYS_MMC_ENV_PART=2 | |
82 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | |
83 | CONFIG_USE_ETHPRIME=y | |
84 | CONFIG_ETHPRIME="FEC" | |
85 | CONFIG_NET_RANDOM_ETHADDR=y | |
86 | CONFIG_SPL_DM=y | |
87 | CONFIG_SPL_CLK_COMPOSITE_CCF=y | |
88 | CONFIG_CLK_COMPOSITE_CCF=y | |
89 | CONFIG_SPL_CLK_IMX8MM=y | |
90 | CONFIG_CLK_IMX8MM=y | |
91 | CONFIG_MXC_GPIO=y | |
92 | CONFIG_DM_PCA953X=y | |
93 | CONFIG_DM_I2C=y | |
94 | CONFIG_SUPPORT_EMMC_BOOT=y | |
95 | CONFIG_MMC_IO_VOLTAGE=y | |
96 | CONFIG_MMC_UHS_SUPPORT=y | |
97 | CONFIG_MMC_HS400_ES_SUPPORT=y | |
98 | CONFIG_MMC_HS400_SUPPORT=y | |
99 | CONFIG_FSL_USDHC=y | |
100 | CONFIG_MTD=y | |
101 | CONFIG_DM_MTD=y | |
102 | CONFIG_DM_SPI_FLASH=y | |
cacf0f8a AF |
103 | CONFIG_SPI_FLASH_BAR=y |
104 | CONFIG_SPI_FLASH_STMICRO=y | |
105 | CONFIG_SPI_FLASH_MTD=y | |
106 | CONFIG_PHYLIB=y | |
107 | CONFIG_PHY_ATHEROS=y | |
108 | CONFIG_PHY_GIGE=y | |
109 | CONFIG_FEC_MXC=y | |
110 | CONFIG_MII=y | |
111 | CONFIG_SPL_PHY=y | |
112 | CONFIG_SPL_NOP_PHY=y | |
113 | CONFIG_PINCTRL=y | |
114 | CONFIG_SPL_PINCTRL=y | |
115 | CONFIG_PINCTRL_IMX8M=y | |
116 | CONFIG_POWER_DOMAIN=y | |
117 | CONFIG_IMX8M_POWER_DOMAIN=y | |
118 | CONFIG_DM_PMIC=y | |
119 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
120 | CONFIG_DM_PMIC_BD71837=y | |
121 | CONFIG_SPL_DM_PMIC_BD71837=y | |
122 | CONFIG_DM_REGULATOR=y | |
123 | CONFIG_DM_REGULATOR_BD71837=y | |
124 | CONFIG_DM_REGULATOR_FIXED=y | |
125 | CONFIG_DM_REGULATOR_GPIO=y | |
126 | CONFIG_DM_SERIAL=y | |
127 | CONFIG_MXC_UART=y | |
128 | CONFIG_SPI=y | |
129 | CONFIG_DM_SPI=y | |
130 | CONFIG_NXP_FSPI=y | |
131 | CONFIG_SYSRESET=y | |
132 | CONFIG_SPL_SYSRESET=y | |
133 | CONFIG_SYSRESET_PSCI=y | |
134 | CONFIG_SYSRESET_WATCHDOG=y | |
135 | CONFIG_DM_THERMAL=y | |
136 | CONFIG_USB=y | |
9455dc32 | 137 | CONFIG_SPL_USB_HOST=y |
cacf0f8a AF |
138 | CONFIG_USB_EHCI_HCD=y |
139 | CONFIG_MXC_USB_OTG_HACTIVE=y | |
140 | CONFIG_USB_STORAGE=y | |
141 | CONFIG_USB_GADGET=y | |
9455dc32 | 142 | CONFIG_SPL_USB_GADGET=y |
cacf0f8a AF |
143 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
144 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | |
145 | CONFIG_CI_UDC=y | |
146 | CONFIG_SDP_LOADADDR=0x40400000 | |
147 | CONFIG_USB_GADGET_DOWNLOAD=y | |
9455dc32 | 148 | CONFIG_SPL_USB_SDP_SUPPORT=y |
cacf0f8a | 149 | CONFIG_IMX_WATCHDOG=y |
df896743 | 150 | CONFIG_SPL_CRC32=y |
cacf0f8a AF |
151 | CONFIG_FSPI_CONF_HEADER=y |
152 | CONFIG_FSPI_CONF_FILE="fspi_header.bin" |