[J-u-boot.git] / drivers / net / fsl_enetc_mdio.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * ENETC ethernet controller driver
 * Copyright 2019 NXP
 */

#include <dm.h>
#include <errno.h>
#include <pci.h>
#include <miiphy.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <miiphy.h>

#include "fsl_enetc.h"

static void enetc_mdio_wait_bsy(struct enetc_mdio_priv *priv)
{
	int to = 10000;

	while ((enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_BSY) &&
	       --to)
		cpu_relax();
	if (!to)
		printf("T");
}

int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int addr, int devad,
			 int reg)
{
	if (devad == MDIO_DEVAD_NONE)
		enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
	else
		enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
	enetc_mdio_wait_bsy(priv);

	if (devad == MDIO_DEVAD_NONE) {
		enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ |
			    (addr << 5) | reg);
	} else {
		enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
		enetc_mdio_wait_bsy(priv);

		enetc_write(priv, ENETC_MDIO_STAT, reg);
		enetc_mdio_wait_bsy(priv);

		enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ |
			    (addr << 5) | devad);
	}

	enetc_mdio_wait_bsy(priv);
	if (enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_RD_ER)
		return ENETC_MDIO_READ_ERR;

	return enetc_read(priv, ENETC_MDIO_DATA);
}

int enetc_mdio_write_priv(struct enetc_mdio_priv *priv, int addr, int devad,
			  int reg, u16 val)
{
	if (devad == MDIO_DEVAD_NONE)
		enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
	else
		enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
	enetc_mdio_wait_bsy(priv);

	if (devad != MDIO_DEVAD_NONE) {
		enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
		enetc_write(priv, ENETC_MDIO_STAT, reg);
	} else {
		enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + reg);
	}
	enetc_mdio_wait_bsy(priv);

	enetc_write(priv, ENETC_MDIO_DATA, val);
	enetc_mdio_wait_bsy(priv);

	return 0;
}

/* DM wrappers */
static int dm_enetc_mdio_read(struct udevice *dev, int addr, int devad, int reg)
{
	struct enetc_mdio_priv *priv = dev_get_priv(dev);

	return enetc_mdio_read_priv(priv, addr, devad, reg);
}

static int dm_enetc_mdio_write(struct udevice *dev, int addr, int devad,
			       int reg, u16 val)
{
	struct enetc_mdio_priv *priv = dev_get_priv(dev);

	return enetc_mdio_write_priv(priv, addr, devad, reg, val);
}

static const struct mdio_ops enetc_mdio_ops = {
	.read = dm_enetc_mdio_read,
	.write = dm_enetc_mdio_write,
};

static int enetc_mdio_bind(struct udevice *dev)
{
	char name[16];
	static int eth_num_devices;

	/*
	 * prefer using PCI function numbers to number interfaces, but these
	 * are only available if dts nodes are present.  For PCI they are
	 * optional, handle that case too.  Just in case some nodes are present
	 * and some are not, use different naming scheme - enetc-N based on
	 * PCI function # and enetc#N based on interface count
	 */
	if (ofnode_valid(dev_ofnode(dev)))
		sprintf(name, "emdio-%u", PCI_FUNC(pci_get_devfn(dev)));
	else
		sprintf(name, "emdio#%u", eth_num_devices++);
	device_set_name(dev, name);

	return 0;
}

static int enetc_mdio_probe(struct udevice *dev)
{
	struct enetc_mdio_priv *priv = dev_get_priv(dev);

	priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE, 0);
	if (!priv->regs_base) {
		enetc_dbg(dev, "failed to map BAR0\n");
		return -EINVAL;
	}

	priv->regs_base += ENETC_MDIO_BASE;

	dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);

	return 0;
}

U_BOOT_DRIVER(enetc_mdio) = {
	.name	= "enetc_mdio",
	.id	= UCLASS_MDIO,
	.bind	= enetc_mdio_bind,
	.probe	= enetc_mdio_probe,
	.ops	= &enetc_mdio_ops,
	.priv_auto	= sizeof(struct enetc_mdio_priv),
};

static struct pci_device_id enetc_mdio_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_MDIO) },
	{ }
};

U_BOOT_PCI_DEVICE(enetc_mdio, enetc_mdio_ids);
Commit	Line	Data
1d99534b AM	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* ENETC ethernet controller driver
	4	* Copyright 2019 NXP
	5	*/
	6
1d99534b AM	7	#include <dm.h>
	8	#include <errno.h>
	9	#include <pci.h>
	10	#include <miiphy.h>
	11	#include <asm/io.h>
	12	#include <asm/processor.h>
	13	#include <miiphy.h>
	14
	15	#include "fsl_enetc.h"
	16
	17	static void enetc_mdio_wait_bsy(struct enetc_mdio_priv *priv)
	18	{
6c964468 AM	19	int to = 10000;
	20
	21	while ((enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_BSY) &&
	22	--to)
1d99534b	23	cpu_relax();
6c964468 AM	24	if (!to)
6c964468 AM	25	printf("T");
1d99534b AM	26	}
1d99534b AM	27
e4aafd5c AM	28	int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int addr, int devad,
e4aafd5c AM	29	int reg)
1d99534b AM	30	{
	31	if (devad == MDIO_DEVAD_NONE)
	32	enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
	33	else
	34	enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
	35	enetc_mdio_wait_bsy(priv);
	36
	37	if (devad == MDIO_DEVAD_NONE) {
	38	enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ \|
	39	(addr << 5) \| reg);
	40	} else {
	41	enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
	42	enetc_mdio_wait_bsy(priv);
	43
	44	enetc_write(priv, ENETC_MDIO_STAT, reg);
	45	enetc_mdio_wait_bsy(priv);
	46
	47	enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ \|
	48	(addr << 5) \| devad);
	49	}
	50
	51	enetc_mdio_wait_bsy(priv);
	52	if (enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_RD_ER)
	53	return ENETC_MDIO_READ_ERR;
	54
	55	return enetc_read(priv, ENETC_MDIO_DATA);
	56	}
	57
e4aafd5c AM	58	int enetc_mdio_write_priv(struct enetc_mdio_priv *priv, int addr, int devad,
e4aafd5c AM	59	int reg, u16 val)
1d99534b AM	60	{
	61	if (devad == MDIO_DEVAD_NONE)
	62	enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
	63	else
	64	enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
	65	enetc_mdio_wait_bsy(priv);
	66
	67	if (devad != MDIO_DEVAD_NONE) {
	68	enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
	69	enetc_write(priv, ENETC_MDIO_STAT, reg);
	70	} else {
	71	enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + reg);
	72	}
	73	enetc_mdio_wait_bsy(priv);
	74
	75	enetc_write(priv, ENETC_MDIO_DATA, val);
	76	enetc_mdio_wait_bsy(priv);
	77
	78	return 0;
	79	}
	80
	81	/* DM wrappers */
	82	static int dm_enetc_mdio_read(struct udevice *dev, int addr, int devad, int reg)
	83	{
	84	struct enetc_mdio_priv *priv = dev_get_priv(dev);
	85
	86	return enetc_mdio_read_priv(priv, addr, devad, reg);
	87	}
	88
	89	static int dm_enetc_mdio_write(struct udevice *dev, int addr, int devad,
	90	int reg, u16 val)
	91	{
	92	struct enetc_mdio_priv *priv = dev_get_priv(dev);
	93
	94	return enetc_mdio_write_priv(priv, addr, devad, reg, val);
	95	}
	96
	97	static const struct mdio_ops enetc_mdio_ops = {
	98	.read = dm_enetc_mdio_read,
	99	.write = dm_enetc_mdio_write,
	100	};
	101
	102	static int enetc_mdio_bind(struct udevice *dev)
	103	{
	104	char name[16];
	105	static int eth_num_devices;
	106
	107	/*
	108	* prefer using PCI function numbers to number interfaces, but these
	109	* are only available if dts nodes are present. For PCI they are
	110	* optional, handle that case too. Just in case some nodes are present
	111	* and some are not, use different naming scheme - enetc-N based on
	112	* PCI function # and enetc#N based on interface count
	113	*/
f10643cf	114	if (ofnode_valid(dev_ofnode(dev)))
1d99534b AM	115	sprintf(name, "emdio-%u", PCI_FUNC(pci_get_devfn(dev)));
	116	else
	117	sprintf(name, "emdio#%u", eth_num_devices++);
	118	device_set_name(dev, name);
	119
	120	return 0;
	121	}
	122
	123	static int enetc_mdio_probe(struct udevice *dev)
	124	{
	125	struct enetc_mdio_priv *priv = dev_get_priv(dev);
	126
2635e3b5	127	priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE, 0);
1d99534b AM	128	if (!priv->regs_base) {
	129	enetc_dbg(dev, "failed to map BAR0\n");
	130	return -EINVAL;
	131	}
	132
	133	priv->regs_base += ENETC_MDIO_BASE;
	134
	135	dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
	136
	137	return 0;
	138	}
	139
	140	U_BOOT_DRIVER(enetc_mdio) = {
	141	.name = "enetc_mdio",
	142	.id = UCLASS_MDIO,
	143	.bind = enetc_mdio_bind,
	144	.probe = enetc_mdio_probe,
	145	.ops = &enetc_mdio_ops,
41575d8e	146	.priv_auto = sizeof(struct enetc_mdio_priv),
1d99534b AM	147	};
	148
	149	static struct pci_device_id enetc_mdio_ids[] = {
	150	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_MDIO) },
e3562b3a	151	{ }
1d99534b AM	152	};
	153
	154	U_BOOT_PCI_DEVICE(enetc_mdio, enetc_mdio_ids);