[J-u-boot.git] / drivers / pwm / pwm-imx.c

/*
 * (C) Copyright 2014
 * Heiko Schocher, DENX Software Engineering, [email protected].
 *
 * Basic support for the pwm module on imx6.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <div64.h>
#include <pwm.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#include "pwm-imx-util.h"

int pwm_init(int pwm_id, int div, int invert)
{
	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);

	if (!pwm)
		return -1;

	writel(0, &pwm->ir);
	return 0;
}

int pwm_config(int pwm_id, int duty_ns, int period_ns)
{
	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
	unsigned long period_cycles, duty_cycles, prescale;
	u32 cr;

	if (!pwm)
		return -1;

	pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
			  &prescale);

	cr = PWMCR_PRESCALER(prescale) |
		PWMCR_DOZEEN | PWMCR_WAITEN |
		PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;

	writel(cr, &pwm->cr);
	/* set duty cycles */
	writel(duty_cycles, &pwm->sar);
	/* set period cycles */
	writel(period_cycles, &pwm->pr);
	return 0;
}

int pwm_enable(int pwm_id)
{
	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);

	if (!pwm)
		return -1;

	setbits_le32(&pwm->cr, PWMCR_EN);
	return 0;
}

void pwm_disable(int pwm_id)
{
	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);

	if (!pwm)
		return;

	clrbits_le32(&pwm->cr, PWMCR_EN);
}
Commit	Line	Data
b2f97cf2 HS	1	/*
	2	* (C) Copyright 2014
	3	* Heiko Schocher, DENX Software Engineering, [email protected].
	4	*
5052e819	5	* Basic support for the pwm module on imx6.
b2f97cf2 HS	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9
	10	#include <common.h>
	11	#include <div64.h>
	12	#include <pwm.h>
	13	#include <asm/arch/imx-regs.h>
	14	#include <asm/io.h>
	15	#include "pwm-imx-util.h"
	16
	17	int pwm_init(int pwm_id, int div, int invert)
	18	{
	19	struct pwm_regs pwm = (struct pwm_regs )pwm_id_to_reg(pwm_id);
	20
16b0c0ce AL	21	if (!pwm)
	22	return -1;
	23
b2f97cf2 HS	24	writel(0, &pwm->ir);
	25	return 0;
	26	}
	27
	28	int pwm_config(int pwm_id, int duty_ns, int period_ns)
	29	{
	30	struct pwm_regs pwm = (struct pwm_regs )pwm_id_to_reg(pwm_id);
	31	unsigned long period_cycles, duty_cycles, prescale;
	32	u32 cr;
	33
16b0c0ce AL	34	if (!pwm)
	35	return -1;
	36
b2f97cf2 HS	37	pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
	38	&prescale);
	39
	40	cr = PWMCR_PRESCALER(prescale) \|
	41	PWMCR_DOZEEN \| PWMCR_WAITEN \|
	42	PWMCR_DBGEN \| PWMCR_CLKSRC_IPG_HIGH;
	43
	44	writel(cr, &pwm->cr);
	45	/* set duty cycles */
	46	writel(duty_cycles, &pwm->sar);
	47	/* set period cycles */
	48	writel(period_cycles, &pwm->pr);
	49	return 0;
	50	}
	51
	52	int pwm_enable(int pwm_id)
	53	{
	54	struct pwm_regs pwm = (struct pwm_regs )pwm_id_to_reg(pwm_id);
	55
16b0c0ce AL	56	if (!pwm)
	57	return -1;
	58
b2f97cf2 HS	59	setbits_le32(&pwm->cr, PWMCR_EN);
	60	return 0;
	61	}
	62
	63	void pwm_disable(int pwm_id)
	64	{
	65	struct pwm_regs pwm = (struct pwm_regs )pwm_id_to_reg(pwm_id);
	66
16b0c0ce AL	67	if (!pwm)
	68	return;
	69
b2f97cf2 HS	70	clrbits_le32(&pwm->cr, PWMCR_EN);
b2f97cf2 HS	71	}