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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
3863585b WD |
2 | /* |
3 | * (C) Copyright 2000 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
3863585b WD |
5 | */ |
6 | ||
7 | /* | |
8 | * Cache support: switch on or off, get status | |
9 | */ | |
3863585b | 10 | #include <command.h> |
9edefc27 | 11 | #include <cpu_func.h> |
d0c4c338 | 12 | #include <linux/compiler.h> |
3863585b | 13 | |
d0c4c338 MM |
14 | static int parse_argv(const char *); |
15 | ||
09140113 SG |
16 | static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, |
17 | char *const argv[]) | |
3863585b WD |
18 | { |
19 | switch (argc) { | |
f043dc28 | 20 | case 2: /* on / off / flush */ |
d0c4c338 | 21 | switch (parse_argv(argv[1])) { |
e9455fcc JH |
22 | case 0: |
23 | icache_disable(); | |
3863585b | 24 | break; |
e9455fcc JH |
25 | case 1: |
26 | icache_enable(); | |
3863585b | 27 | break; |
e9455fcc JH |
28 | case 2: |
29 | invalidate_icache_all(); | |
d0c4c338 | 30 | break; |
f043dc28 EP |
31 | default: |
32 | return CMD_RET_USAGE; | |
3863585b | 33 | } |
36180d96 | 34 | break; |
3863585b | 35 | case 1: /* get status */ |
e9455fcc | 36 | printf("Instruction Cache is %s\n", |
3863585b WD |
37 | icache_status() ? "ON" : "OFF"); |
38 | return 0; | |
39 | default: | |
4c12eeb8 | 40 | return CMD_RET_USAGE; |
3863585b WD |
41 | } |
42 | return 0; | |
43 | } | |
44 | ||
09140113 SG |
45 | static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, |
46 | char *const argv[]) | |
3863585b WD |
47 | { |
48 | switch (argc) { | |
f043dc28 | 49 | case 2: /* on / off / flush */ |
d0c4c338 | 50 | switch (parse_argv(argv[1])) { |
e9455fcc JH |
51 | case 0: |
52 | dcache_disable(); | |
3863585b | 53 | break; |
e9455fcc JH |
54 | case 1: |
55 | dcache_enable(); | |
7d6cee2c | 56 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
c2a2123e | 57 | noncached_set_region(); |
7d6cee2c | 58 | #endif |
3863585b | 59 | break; |
e9455fcc JH |
60 | case 2: |
61 | flush_dcache_all(); | |
d0c4c338 | 62 | break; |
f043dc28 EP |
63 | default: |
64 | return CMD_RET_USAGE; | |
3863585b | 65 | } |
e9455fcc | 66 | break; |
3863585b | 67 | case 1: /* get status */ |
e9455fcc | 68 | printf("Data (writethrough) Cache is %s\n", |
3863585b WD |
69 | dcache_status() ? "ON" : "OFF"); |
70 | return 0; | |
71 | default: | |
4c12eeb8 | 72 | return CMD_RET_USAGE; |
3863585b WD |
73 | } |
74 | return 0; | |
3863585b WD |
75 | } |
76 | ||
d0c4c338 | 77 | static int parse_argv(const char *s) |
3863585b | 78 | { |
e9455fcc JH |
79 | if (strcmp(s, "flush") == 0) |
80 | return 2; | |
81 | else if (strcmp(s, "on") == 0) | |
82 | return 1; | |
83 | else if (strcmp(s, "off") == 0) | |
84 | return 0; | |
85 | ||
86 | return -1; | |
3863585b WD |
87 | } |
88 | ||
0d498393 WD |
89 | U_BOOT_CMD( |
90 | icache, 2, 1, do_icache, | |
2fb2604d | 91 | "enable or disable instruction cache", |
d0c4c338 MM |
92 | "[on, off, flush]\n" |
93 | " - enable, disable, or flush instruction cache" | |
8bde7f77 WD |
94 | ); |
95 | ||
0d498393 WD |
96 | U_BOOT_CMD( |
97 | dcache, 2, 1, do_dcache, | |
2fb2604d | 98 | "enable or disable data cache", |
d0c4c338 MM |
99 | "[on, off, flush]\n" |
100 | " - enable, disable, or flush data (writethrough) cache" | |
8bde7f77 | 101 | ); |