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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
71f95118 WD |
2 | /* |
3 | * (C) Copyright 2003 | |
4 | * Kyle Harris, [email protected] | |
71f95118 WD |
5 | */ |
6 | ||
7 | #include <common.h> | |
e6f6f9e6 | 8 | #include <blk.h> |
71f95118 | 9 | #include <command.h> |
24b852a7 | 10 | #include <console.h> |
d581076a | 11 | #include <memalign.h> |
71f95118 | 12 | #include <mmc.h> |
e6f6f9e6 | 13 | #include <part.h> |
732bc7ce JB |
14 | #include <sparse_format.h> |
15 | #include <image-sparse.h> | |
71f95118 | 16 | |
02e22c2d | 17 | static int curr_device = -1; |
272cc70b AF |
18 | |
19 | static void print_mmcinfo(struct mmc *mmc) | |
20 | { | |
c5f0d3f1 DSC |
21 | int i; |
22 | ||
93bfd616 | 23 | printf("Device: %s\n", mmc->cfg->name); |
272cc70b AF |
24 | printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24); |
25 | printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff); | |
26 | printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff, | |
27 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
28 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
29 | ||
7a96ec74 | 30 | printf("Bus Speed: %d\n", mmc->clock); |
52d241df | 31 | #if CONFIG_IS_ENABLED(MMC_VERBOSE) |
41e30dcf | 32 | printf("Mode: %s\n", mmc_mode_name(mmc->selected_mode)); |
52d241df JJH |
33 | mmc_dump_capabilities("card capabilities", mmc->card_caps); |
34 | mmc_dump_capabilities("host capabilities", mmc->host_caps); | |
35 | #endif | |
272cc70b AF |
36 | printf("Rd Block Len: %d\n", mmc->read_bl_len); |
37 | ||
4b7cee53 PA |
38 | printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC", |
39 | EXTRACT_SDMMC_MAJOR_VERSION(mmc->version), | |
40 | EXTRACT_SDMMC_MINOR_VERSION(mmc->version)); | |
41 | if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0) | |
42 | printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version)); | |
43 | printf("\n"); | |
272cc70b AF |
44 | |
45 | printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); | |
940e0782 MK |
46 | puts("Capacity: "); |
47 | print_size(mmc->capacity, "\n"); | |
272cc70b | 48 | |
786e8f81 AG |
49 | printf("Bus Width: %d-bit%s\n", mmc->bus_width, |
50 | mmc->ddr_mode ? " DDR" : ""); | |
c5f0d3f1 | 51 | |
e6fa5a54 | 52 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
b0361526 DSC |
53 | puts("Erase Group Size: "); |
54 | print_size(((u64)mmc->erase_grp_size) << 9, "\n"); | |
e6fa5a54 | 55 | #endif |
b0361526 | 56 | |
525ada21 | 57 | if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) { |
c3dbb4f9 | 58 | bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0; |
beb98a14 | 59 | bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR); |
d581076a MV |
60 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
61 | u8 wp; | |
d5210e45 | 62 | int ret; |
b0361526 | 63 | |
b7a6e2c9 | 64 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
b0361526 DSC |
65 | puts("HC WP Group Size: "); |
66 | print_size(((u64)mmc->hc_wp_grp_size) << 9, "\n"); | |
b7a6e2c9 | 67 | #endif |
b0361526 | 68 | |
c5f0d3f1 | 69 | puts("User Capacity: "); |
9e41a00b DSC |
70 | print_size(mmc->capacity_user, usr_enh ? " ENH" : ""); |
71 | if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_USR) | |
72 | puts(" WRREL\n"); | |
73 | else | |
74 | putc('\n'); | |
beb98a14 DSC |
75 | if (usr_enh) { |
76 | puts("User Enhanced Start: "); | |
77 | print_size(mmc->enh_user_start, "\n"); | |
78 | puts("User Enhanced Size: "); | |
79 | print_size(mmc->enh_user_size, "\n"); | |
80 | } | |
c5f0d3f1 | 81 | puts("Boot Capacity: "); |
c3dbb4f9 | 82 | print_size(mmc->capacity_boot, has_enh ? " ENH\n" : "\n"); |
c5f0d3f1 | 83 | puts("RPMB Capacity: "); |
c3dbb4f9 | 84 | print_size(mmc->capacity_rpmb, has_enh ? " ENH\n" : "\n"); |
b0361526 | 85 | |
c5f0d3f1 | 86 | for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) { |
c3dbb4f9 DSC |
87 | bool is_enh = has_enh && |
88 | (mmc->part_attr & EXT_CSD_ENH_GP(i)); | |
c5f0d3f1 | 89 | if (mmc->capacity_gp[i]) { |
f289fd73 | 90 | printf("GP%i Capacity: ", i+1); |
c3dbb4f9 | 91 | print_size(mmc->capacity_gp[i], |
9e41a00b DSC |
92 | is_enh ? " ENH" : ""); |
93 | if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_GP(i)) | |
94 | puts(" WRREL\n"); | |
95 | else | |
96 | putc('\n'); | |
c5f0d3f1 DSC |
97 | } |
98 | } | |
d5210e45 HS |
99 | ret = mmc_send_ext_csd(mmc, ext_csd); |
100 | if (ret) | |
101 | return; | |
102 | wp = ext_csd[EXT_CSD_BOOT_WP_STATUS]; | |
103 | for (i = 0; i < 2; ++i) { | |
104 | printf("Boot area %d is ", i); | |
105 | switch (wp & 3) { | |
106 | case 0: | |
107 | printf("not write protected\n"); | |
108 | break; | |
109 | case 1: | |
110 | printf("power on protected\n"); | |
111 | break; | |
112 | case 2: | |
113 | printf("permanently protected\n"); | |
114 | break; | |
115 | default: | |
116 | printf("in reserved protection state\n"); | |
117 | break; | |
118 | } | |
119 | wp >>= 2; | |
120 | } | |
c5f0d3f1 | 121 | } |
272cc70b | 122 | } |
19f7a34a AG |
123 | |
124 | static struct mmc *__init_mmc_device(int dev, bool force_init, | |
125 | enum bus_mode speed_mode) | |
1fd93c6e PA |
126 | { |
127 | struct mmc *mmc; | |
128 | mmc = find_mmc_device(dev); | |
129 | if (!mmc) { | |
130 | printf("no mmc device at slot %x\n", dev); | |
131 | return NULL; | |
132 | } | |
bcfde7ff | 133 | |
d2a08369 MV |
134 | if (!mmc_getcd(mmc)) |
135 | force_init = true; | |
136 | ||
1ae24a50 SW |
137 | if (force_init) |
138 | mmc->has_init = 0; | |
19f7a34a AG |
139 | |
140 | if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) | |
141 | mmc->user_speed_mode = speed_mode; | |
142 | ||
1fd93c6e PA |
143 | if (mmc_init(mmc)) |
144 | return NULL; | |
1d044d32 MV |
145 | |
146 | #ifdef CONFIG_BLOCK_CACHE | |
147 | struct blk_desc *bd = mmc_get_blk_desc(mmc); | |
148 | blkcache_invalidate(bd->if_type, bd->devnum); | |
149 | #endif | |
150 | ||
1fd93c6e PA |
151 | return mmc; |
152 | } | |
09140113 | 153 | |
19f7a34a AG |
154 | static struct mmc *init_mmc_device(int dev, bool force_init) |
155 | { | |
156 | return __init_mmc_device(dev, force_init, MMC_MODES_END); | |
157 | } | |
158 | ||
09140113 SG |
159 | static int do_mmcinfo(struct cmd_tbl *cmdtp, int flag, int argc, |
160 | char *const argv[]) | |
272cc70b AF |
161 | { |
162 | struct mmc *mmc; | |
272cc70b | 163 | |
ea6ebe21 LW |
164 | if (curr_device < 0) { |
165 | if (get_mmc_num() > 0) | |
166 | curr_device = 0; | |
167 | else { | |
168 | puts("No MMC device available\n"); | |
169 | return 1; | |
170 | } | |
171 | } | |
272cc70b | 172 | |
1ae24a50 | 173 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
174 | if (!mmc) |
175 | return CMD_RET_FAILURE; | |
272cc70b | 176 | |
1fd93c6e PA |
177 | print_mmcinfo(mmc); |
178 | return CMD_RET_SUCCESS; | |
179 | } | |
272cc70b | 180 | |
5a7b11e6 | 181 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
182 | static int confirm_key_prog(void) |
183 | { | |
184 | puts("Warning: Programming authentication key can be done only once !\n" | |
185 | " Use this command only if you are sure of what you are doing,\n" | |
186 | "Really perform the key programming? <y/N> "); | |
187 | if (confirm_yesno()) | |
ea6ebe21 | 188 | return 1; |
1fd93c6e PA |
189 | |
190 | puts("Authentication key programming aborted\n"); | |
191 | return 0; | |
192 | } | |
09140113 SG |
193 | |
194 | static int do_mmcrpmb_key(struct cmd_tbl *cmdtp, int flag, | |
195 | int argc, char *const argv[]) | |
1fd93c6e PA |
196 | { |
197 | void *key_addr; | |
198 | struct mmc *mmc = find_mmc_device(curr_device); | |
199 | ||
200 | if (argc != 2) | |
201 | return CMD_RET_USAGE; | |
202 | ||
7e5f460e | 203 | key_addr = (void *)hextoul(argv[1], NULL); |
1fd93c6e PA |
204 | if (!confirm_key_prog()) |
205 | return CMD_RET_FAILURE; | |
206 | if (mmc_rpmb_set_key(mmc, key_addr)) { | |
207 | printf("ERROR - Key already programmed ?\n"); | |
208 | return CMD_RET_FAILURE; | |
272cc70b | 209 | } |
1fd93c6e | 210 | return CMD_RET_SUCCESS; |
272cc70b | 211 | } |
09140113 SG |
212 | |
213 | static int do_mmcrpmb_read(struct cmd_tbl *cmdtp, int flag, | |
214 | int argc, char *const argv[]) | |
1fd93c6e PA |
215 | { |
216 | u16 blk, cnt; | |
217 | void *addr; | |
218 | int n; | |
219 | void *key_addr = NULL; | |
220 | struct mmc *mmc = find_mmc_device(curr_device); | |
272cc70b | 221 | |
1fd93c6e PA |
222 | if (argc < 4) |
223 | return CMD_RET_USAGE; | |
272cc70b | 224 | |
7e5f460e SG |
225 | addr = (void *)hextoul(argv[1], NULL); |
226 | blk = hextoul(argv[2], NULL); | |
227 | cnt = hextoul(argv[3], NULL); | |
1fd93c6e PA |
228 | |
229 | if (argc == 5) | |
7e5f460e | 230 | key_addr = (void *)hextoul(argv[4], NULL); |
1fd93c6e PA |
231 | |
232 | printf("\nMMC RPMB read: dev # %d, block # %d, count %d ... ", | |
233 | curr_device, blk, cnt); | |
234 | n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr); | |
235 | ||
236 | printf("%d RPMB blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); | |
237 | if (n != cnt) | |
238 | return CMD_RET_FAILURE; | |
239 | return CMD_RET_SUCCESS; | |
240 | } | |
09140113 SG |
241 | |
242 | static int do_mmcrpmb_write(struct cmd_tbl *cmdtp, int flag, | |
243 | int argc, char *const argv[]) | |
272cc70b | 244 | { |
1fd93c6e PA |
245 | u16 blk, cnt; |
246 | void *addr; | |
247 | int n; | |
248 | void *key_addr; | |
249 | struct mmc *mmc = find_mmc_device(curr_device); | |
6be95ccf | 250 | |
1fd93c6e | 251 | if (argc != 5) |
4c12eeb8 | 252 | return CMD_RET_USAGE; |
272cc70b | 253 | |
7e5f460e SG |
254 | addr = (void *)hextoul(argv[1], NULL); |
255 | blk = hextoul(argv[2], NULL); | |
256 | cnt = hextoul(argv[3], NULL); | |
257 | key_addr = (void *)hextoul(argv[4], NULL); | |
1fd93c6e PA |
258 | |
259 | printf("\nMMC RPMB write: dev # %d, block # %d, count %d ... ", | |
260 | curr_device, blk, cnt); | |
261 | n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr); | |
262 | ||
263 | printf("%d RPMB blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); | |
264 | if (n != cnt) | |
265 | return CMD_RET_FAILURE; | |
266 | return CMD_RET_SUCCESS; | |
267 | } | |
09140113 SG |
268 | |
269 | static int do_mmcrpmb_counter(struct cmd_tbl *cmdtp, int flag, | |
270 | int argc, char *const argv[]) | |
1fd93c6e PA |
271 | { |
272 | unsigned long counter; | |
273 | struct mmc *mmc = find_mmc_device(curr_device); | |
274 | ||
275 | if (mmc_rpmb_get_counter(mmc, &counter)) | |
276 | return CMD_RET_FAILURE; | |
277 | printf("RPMB Write counter= %lx\n", counter); | |
278 | return CMD_RET_SUCCESS; | |
279 | } | |
280 | ||
09140113 | 281 | static struct cmd_tbl cmd_rpmb[] = { |
1fd93c6e PA |
282 | U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""), |
283 | U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""), | |
284 | U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""), | |
285 | U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""), | |
286 | }; | |
287 | ||
09140113 SG |
288 | static int do_mmcrpmb(struct cmd_tbl *cmdtp, int flag, |
289 | int argc, char *const argv[]) | |
1fd93c6e | 290 | { |
09140113 | 291 | struct cmd_tbl *cp; |
1fd93c6e PA |
292 | struct mmc *mmc; |
293 | char original_part; | |
294 | int ret; | |
295 | ||
296 | cp = find_cmd_tbl(argv[1], cmd_rpmb, ARRAY_SIZE(cmd_rpmb)); | |
297 | ||
298 | /* Drop the rpmb subcommand */ | |
299 | argc--; | |
300 | argv++; | |
301 | ||
302 | if (cp == NULL || argc > cp->maxargs) | |
303 | return CMD_RET_USAGE; | |
80a48dd4 | 304 | if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) |
1fd93c6e PA |
305 | return CMD_RET_SUCCESS; |
306 | ||
1ae24a50 | 307 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
308 | if (!mmc) |
309 | return CMD_RET_FAILURE; | |
310 | ||
311 | if (!(mmc->version & MMC_VERSION_MMC)) { | |
71a3e5c5 | 312 | printf("It is not an eMMC device\n"); |
1fd93c6e PA |
313 | return CMD_RET_FAILURE; |
314 | } | |
315 | if (mmc->version < MMC_VERSION_4_41) { | |
316 | printf("RPMB not supported before version 4.41\n"); | |
317 | return CMD_RET_FAILURE; | |
ea6ebe21 | 318 | } |
1fd93c6e | 319 | /* Switch to the RPMB partition */ |
4dc80c87 | 320 | #ifndef CONFIG_BLK |
b955e42b | 321 | original_part = mmc->block_dev.hwpart; |
4dc80c87 KY |
322 | #else |
323 | original_part = mmc_get_blk_desc(mmc)->hwpart; | |
324 | #endif | |
69f45cd5 SG |
325 | if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) != |
326 | 0) | |
873cc1d7 | 327 | return CMD_RET_FAILURE; |
1fd93c6e | 328 | ret = cp->cmd(cmdtp, flag, argc, argv); |
272cc70b | 329 | |
1fd93c6e | 330 | /* Return to original partition */ |
69f45cd5 SG |
331 | if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) != |
332 | 0) | |
873cc1d7 | 333 | return CMD_RET_FAILURE; |
1fd93c6e PA |
334 | return ret; |
335 | } | |
336 | #endif | |
9fd38372 | 337 | |
09140113 SG |
338 | static int do_mmc_read(struct cmd_tbl *cmdtp, int flag, |
339 | int argc, char *const argv[]) | |
1fd93c6e PA |
340 | { |
341 | struct mmc *mmc; | |
342 | u32 blk, cnt, n; | |
343 | void *addr; | |
e85649c7 | 344 | |
1fd93c6e PA |
345 | if (argc != 4) |
346 | return CMD_RET_USAGE; | |
ea6ebe21 | 347 | |
7e5f460e SG |
348 | addr = (void *)hextoul(argv[1], NULL); |
349 | blk = hextoul(argv[2], NULL); | |
350 | cnt = hextoul(argv[3], NULL); | |
272cc70b | 351 | |
1ae24a50 | 352 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
353 | if (!mmc) |
354 | return CMD_RET_FAILURE; | |
ea6ebe21 | 355 | |
1fd93c6e PA |
356 | printf("\nMMC read: dev # %d, block # %d, count %d ... ", |
357 | curr_device, blk, cnt); | |
9fd38372 | 358 | |
c40fdca6 | 359 | n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); |
1fd93c6e | 360 | printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
8f3b9642 | 361 | |
1fd93c6e PA |
362 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
363 | } | |
e6fa5a54 | 364 | |
c232d14d | 365 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) |
732bc7ce JB |
366 | static lbaint_t mmc_sparse_write(struct sparse_storage *info, lbaint_t blk, |
367 | lbaint_t blkcnt, const void *buffer) | |
368 | { | |
369 | struct blk_desc *dev_desc = info->priv; | |
370 | ||
371 | return blk_dwrite(dev_desc, blk, blkcnt, buffer); | |
372 | } | |
373 | ||
374 | static lbaint_t mmc_sparse_reserve(struct sparse_storage *info, | |
375 | lbaint_t blk, lbaint_t blkcnt) | |
376 | { | |
377 | return blkcnt; | |
378 | } | |
379 | ||
09140113 SG |
380 | static int do_mmc_sparse_write(struct cmd_tbl *cmdtp, int flag, |
381 | int argc, char *const argv[]) | |
732bc7ce JB |
382 | { |
383 | struct sparse_storage sparse; | |
384 | struct blk_desc *dev_desc; | |
385 | struct mmc *mmc; | |
386 | char dest[11]; | |
387 | void *addr; | |
388 | u32 blk; | |
389 | ||
390 | if (argc != 3) | |
391 | return CMD_RET_USAGE; | |
392 | ||
7e5f460e SG |
393 | addr = (void *)hextoul(argv[1], NULL); |
394 | blk = hextoul(argv[2], NULL); | |
732bc7ce JB |
395 | |
396 | if (!is_sparse_image(addr)) { | |
397 | printf("Not a sparse image\n"); | |
398 | return CMD_RET_FAILURE; | |
399 | } | |
400 | ||
401 | mmc = init_mmc_device(curr_device, false); | |
402 | if (!mmc) | |
403 | return CMD_RET_FAILURE; | |
404 | ||
405 | printf("\nMMC Sparse write: dev # %d, block # %d ... ", | |
406 | curr_device, blk); | |
407 | ||
408 | if (mmc_getwp(mmc) == 1) { | |
409 | printf("Error: card is write protected!\n"); | |
410 | return CMD_RET_FAILURE; | |
411 | } | |
412 | ||
413 | dev_desc = mmc_get_blk_desc(mmc); | |
414 | sparse.priv = dev_desc; | |
415 | sparse.blksz = 512; | |
416 | sparse.start = blk; | |
417 | sparse.size = dev_desc->lba - blk; | |
418 | sparse.write = mmc_sparse_write; | |
419 | sparse.reserve = mmc_sparse_reserve; | |
420 | sparse.mssg = NULL; | |
421 | sprintf(dest, "0x" LBAF, sparse.start * sparse.blksz); | |
422 | ||
c4ded03e | 423 | if (write_sparse_image(&sparse, dest, addr, NULL)) |
732bc7ce JB |
424 | return CMD_RET_FAILURE; |
425 | else | |
426 | return CMD_RET_SUCCESS; | |
427 | } | |
428 | #endif | |
429 | ||
c232d14d | 430 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
09140113 SG |
431 | static int do_mmc_write(struct cmd_tbl *cmdtp, int flag, |
432 | int argc, char *const argv[]) | |
1fd93c6e PA |
433 | { |
434 | struct mmc *mmc; | |
435 | u32 blk, cnt, n; | |
436 | void *addr; | |
8f3b9642 | 437 | |
1fd93c6e PA |
438 | if (argc != 4) |
439 | return CMD_RET_USAGE; | |
272cc70b | 440 | |
7e5f460e SG |
441 | addr = (void *)hextoul(argv[1], NULL); |
442 | blk = hextoul(argv[2], NULL); | |
443 | cnt = hextoul(argv[3], NULL); | |
bc897b1d | 444 | |
1ae24a50 | 445 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
446 | if (!mmc) |
447 | return CMD_RET_FAILURE; | |
bc897b1d | 448 | |
1fd93c6e PA |
449 | printf("\nMMC write: dev # %d, block # %d, count %d ... ", |
450 | curr_device, blk, cnt); | |
272cc70b | 451 | |
1fd93c6e PA |
452 | if (mmc_getwp(mmc) == 1) { |
453 | printf("Error: card is write protected!\n"); | |
454 | return CMD_RET_FAILURE; | |
455 | } | |
c40fdca6 | 456 | n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr); |
1fd93c6e | 457 | printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
792970b0 | 458 | |
1fd93c6e PA |
459 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
460 | } | |
09140113 SG |
461 | |
462 | static int do_mmc_erase(struct cmd_tbl *cmdtp, int flag, | |
463 | int argc, char *const argv[]) | |
1fd93c6e PA |
464 | { |
465 | struct mmc *mmc; | |
466 | u32 blk, cnt, n; | |
2a91c913 | 467 | |
1fd93c6e PA |
468 | if (argc != 3) |
469 | return CMD_RET_USAGE; | |
792970b0 | 470 | |
7e5f460e SG |
471 | blk = hextoul(argv[1], NULL); |
472 | cnt = hextoul(argv[2], NULL); | |
5a99b9de | 473 | |
1ae24a50 | 474 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
475 | if (!mmc) |
476 | return CMD_RET_FAILURE; | |
5a99b9de | 477 | |
1fd93c6e PA |
478 | printf("\nMMC erase: dev # %d, block # %d, count %d ... ", |
479 | curr_device, blk, cnt); | |
5a99b9de | 480 | |
1fd93c6e PA |
481 | if (mmc_getwp(mmc) == 1) { |
482 | printf("Error: card is write protected!\n"); | |
483 | return CMD_RET_FAILURE; | |
484 | } | |
c40fdca6 | 485 | n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt); |
1fd93c6e | 486 | printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR"); |
b01e6fe6 | 487 | |
1fd93c6e PA |
488 | return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; |
489 | } | |
e6fa5a54 JJH |
490 | #endif |
491 | ||
09140113 SG |
492 | static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag, |
493 | int argc, char *const argv[]) | |
1fd93c6e PA |
494 | { |
495 | struct mmc *mmc; | |
19f7a34a AG |
496 | enum bus_mode speed_mode = MMC_MODES_END; |
497 | ||
498 | if (argc == 1) { | |
499 | mmc = init_mmc_device(curr_device, true); | |
500 | } else if (argc == 2) { | |
501 | speed_mode = (int)dectoul(argv[1], NULL); | |
502 | mmc = __init_mmc_device(curr_device, true, speed_mode); | |
503 | } else { | |
504 | return CMD_RET_USAGE; | |
505 | } | |
2a91c913 | 506 | |
941944e4 | 507 | if (!mmc) |
1fd93c6e | 508 | return CMD_RET_FAILURE; |
2a91c913 | 509 | |
1fd93c6e PA |
510 | return CMD_RET_SUCCESS; |
511 | } | |
09140113 SG |
512 | |
513 | static int do_mmc_part(struct cmd_tbl *cmdtp, int flag, | |
514 | int argc, char *const argv[]) | |
1fd93c6e | 515 | { |
4101f687 | 516 | struct blk_desc *mmc_dev; |
1fd93c6e PA |
517 | struct mmc *mmc; |
518 | ||
1ae24a50 | 519 | mmc = init_mmc_device(curr_device, false); |
1fd93c6e PA |
520 | if (!mmc) |
521 | return CMD_RET_FAILURE; | |
522 | ||
3c457f4d | 523 | mmc_dev = blk_get_devnum_by_type(IF_TYPE_MMC, curr_device); |
1fd93c6e | 524 | if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) { |
3e8bd469 | 525 | part_print(mmc_dev); |
1fd93c6e PA |
526 | return CMD_RET_SUCCESS; |
527 | } | |
528 | ||
529 | puts("get mmc type error!\n"); | |
530 | return CMD_RET_FAILURE; | |
531 | } | |
09140113 SG |
532 | |
533 | static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag, | |
534 | int argc, char *const argv[]) | |
1fd93c6e | 535 | { |
60dc58f7 | 536 | int dev, part = 0, ret; |
1fd93c6e | 537 | struct mmc *mmc; |
19f7a34a | 538 | enum bus_mode speed_mode = MMC_MODES_END; |
1fd93c6e PA |
539 | |
540 | if (argc == 1) { | |
541 | dev = curr_device; | |
19f7a34a | 542 | mmc = init_mmc_device(dev, true); |
1fd93c6e | 543 | } else if (argc == 2) { |
19f7a34a AG |
544 | dev = (int)dectoul(argv[1], NULL); |
545 | mmc = init_mmc_device(dev, true); | |
1fd93c6e | 546 | } else if (argc == 3) { |
0b1284eb SG |
547 | dev = (int)dectoul(argv[1], NULL); |
548 | part = (int)dectoul(argv[2], NULL); | |
1fd93c6e PA |
549 | if (part > PART_ACCESS_MASK) { |
550 | printf("#part_num shouldn't be larger than %d\n", | |
551 | PART_ACCESS_MASK); | |
552 | return CMD_RET_FAILURE; | |
33ace362 | 553 | } |
19f7a34a AG |
554 | mmc = init_mmc_device(dev, true); |
555 | } else if (argc == 4) { | |
556 | dev = (int)dectoul(argv[1], NULL); | |
557 | part = (int)dectoul(argv[2], NULL); | |
558 | if (part > PART_ACCESS_MASK) { | |
559 | printf("#part_num shouldn't be larger than %d\n", | |
560 | PART_ACCESS_MASK); | |
561 | return CMD_RET_FAILURE; | |
562 | } | |
563 | speed_mode = (int)dectoul(argv[3], NULL); | |
564 | mmc = __init_mmc_device(dev, true, speed_mode); | |
1fd93c6e PA |
565 | } else { |
566 | return CMD_RET_USAGE; | |
567 | } | |
33ace362 | 568 | |
1fd93c6e PA |
569 | if (!mmc) |
570 | return CMD_RET_FAILURE; | |
571 | ||
69f45cd5 | 572 | ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part); |
60dc58f7 SW |
573 | printf("switch to partitions #%d, %s\n", |
574 | part, (!ret) ? "OK" : "ERROR"); | |
575 | if (ret) | |
576 | return 1; | |
577 | ||
1fd93c6e PA |
578 | curr_device = dev; |
579 | if (mmc->part_config == MMCPART_NOAVAILABLE) | |
580 | printf("mmc%d is current device\n", curr_device); | |
581 | else | |
582 | printf("mmc%d(part %d) is current device\n", | |
c40fdca6 | 583 | curr_device, mmc_get_blk_desc(mmc)->hwpart); |
33ace362 | 584 | |
1fd93c6e PA |
585 | return CMD_RET_SUCCESS; |
586 | } | |
09140113 SG |
587 | |
588 | static int do_mmc_list(struct cmd_tbl *cmdtp, int flag, | |
589 | int argc, char *const argv[]) | |
1fd93c6e PA |
590 | { |
591 | print_mmc_devices('\n'); | |
592 | return CMD_RET_SUCCESS; | |
593 | } | |
c599f53b | 594 | |
cf17789e | 595 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
f702dc1e MV |
596 | static void parse_hwpart_user_enh_size(struct mmc *mmc, |
597 | struct mmc_hwpart_conf *pconf, | |
598 | char *argv) | |
599 | { | |
1d4b3b2f | 600 | int i, ret; |
f702dc1e MV |
601 | |
602 | pconf->user.enh_size = 0; | |
603 | ||
604 | if (!strcmp(argv, "-")) { /* The rest of eMMC */ | |
605 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); | |
606 | ret = mmc_send_ext_csd(mmc, ext_csd); | |
607 | if (ret) | |
608 | return; | |
1d4b3b2f | 609 | /* The enh_size value is in 512B block units */ |
f702dc1e MV |
610 | pconf->user.enh_size = |
611 | ((ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 2] << 16) + | |
612 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 1] << 8) + | |
613 | ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]) * 1024 * | |
614 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * | |
615 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | |
616 | pconf->user.enh_size -= pconf->user.enh_start; | |
1d4b3b2f MV |
617 | for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) { |
618 | /* | |
619 | * If the eMMC already has GP partitions set, | |
620 | * subtract their size from the maximum USER | |
621 | * partition size. | |
622 | * | |
623 | * Else, if the command was used to configure new | |
624 | * GP partitions, subtract their size from maximum | |
625 | * USER partition size. | |
626 | */ | |
627 | if (mmc->capacity_gp[i]) { | |
628 | /* The capacity_gp is in 1B units */ | |
629 | pconf->user.enh_size -= mmc->capacity_gp[i] >> 9; | |
630 | } else if (pconf->gp_part[i].size) { | |
631 | /* The gp_part[].size is in 512B units */ | |
632 | pconf->user.enh_size -= pconf->gp_part[i].size; | |
633 | } | |
634 | } | |
f702dc1e MV |
635 | } else { |
636 | pconf->user.enh_size = dectoul(argv, NULL); | |
637 | } | |
638 | } | |
639 | ||
640 | static int parse_hwpart_user(struct mmc *mmc, struct mmc_hwpart_conf *pconf, | |
09140113 | 641 | int argc, char *const argv[]) |
189f963a DSC |
642 | { |
643 | int i = 0; | |
644 | ||
645 | memset(&pconf->user, 0, sizeof(pconf->user)); | |
646 | ||
647 | while (i < argc) { | |
648 | if (!strcmp(argv[i], "enh")) { | |
649 | if (i + 2 >= argc) | |
650 | return -1; | |
651 | pconf->user.enh_start = | |
0b1284eb | 652 | dectoul(argv[i + 1], NULL); |
f702dc1e | 653 | parse_hwpart_user_enh_size(mmc, pconf, argv[i + 2]); |
189f963a DSC |
654 | i += 3; |
655 | } else if (!strcmp(argv[i], "wrrel")) { | |
656 | if (i + 1 >= argc) | |
657 | return -1; | |
658 | pconf->user.wr_rel_change = 1; | |
659 | if (!strcmp(argv[i+1], "on")) | |
660 | pconf->user.wr_rel_set = 1; | |
661 | else if (!strcmp(argv[i+1], "off")) | |
662 | pconf->user.wr_rel_set = 0; | |
663 | else | |
664 | return -1; | |
665 | i += 2; | |
666 | } else { | |
667 | break; | |
668 | } | |
669 | } | |
670 | return i; | |
671 | } | |
672 | ||
673 | static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx, | |
09140113 | 674 | int argc, char *const argv[]) |
189f963a DSC |
675 | { |
676 | int i; | |
677 | ||
678 | memset(&pconf->gp_part[pidx], 0, sizeof(pconf->gp_part[pidx])); | |
679 | ||
680 | if (1 >= argc) | |
681 | return -1; | |
0b1284eb | 682 | pconf->gp_part[pidx].size = dectoul(argv[0], NULL); |
189f963a DSC |
683 | |
684 | i = 1; | |
685 | while (i < argc) { | |
686 | if (!strcmp(argv[i], "enh")) { | |
687 | pconf->gp_part[pidx].enhanced = 1; | |
688 | i += 1; | |
689 | } else if (!strcmp(argv[i], "wrrel")) { | |
690 | if (i + 1 >= argc) | |
691 | return -1; | |
692 | pconf->gp_part[pidx].wr_rel_change = 1; | |
693 | if (!strcmp(argv[i+1], "on")) | |
694 | pconf->gp_part[pidx].wr_rel_set = 1; | |
695 | else if (!strcmp(argv[i+1], "off")) | |
696 | pconf->gp_part[pidx].wr_rel_set = 0; | |
697 | else | |
698 | return -1; | |
699 | i += 2; | |
700 | } else { | |
701 | break; | |
702 | } | |
703 | } | |
704 | return i; | |
705 | } | |
706 | ||
09140113 SG |
707 | static int do_mmc_hwpartition(struct cmd_tbl *cmdtp, int flag, |
708 | int argc, char *const argv[]) | |
c599f53b DSC |
709 | { |
710 | struct mmc *mmc; | |
711 | struct mmc_hwpart_conf pconf = { }; | |
712 | enum mmc_hwpart_conf_mode mode = MMC_HWPART_CONF_CHECK; | |
189f963a | 713 | int i, r, pidx; |
c599f53b DSC |
714 | |
715 | mmc = init_mmc_device(curr_device, false); | |
716 | if (!mmc) | |
717 | return CMD_RET_FAILURE; | |
718 | ||
0d453c84 JC |
719 | if (IS_SD(mmc)) { |
720 | puts("SD doesn't support partitioning\n"); | |
721 | return CMD_RET_FAILURE; | |
722 | } | |
723 | ||
c599f53b DSC |
724 | if (argc < 1) |
725 | return CMD_RET_USAGE; | |
726 | i = 1; | |
727 | while (i < argc) { | |
189f963a DSC |
728 | if (!strcmp(argv[i], "user")) { |
729 | i++; | |
f702dc1e | 730 | r = parse_hwpart_user(mmc, &pconf, argc - i, &argv[i]); |
189f963a | 731 | if (r < 0) |
c599f53b | 732 | return CMD_RET_USAGE; |
189f963a | 733 | i += r; |
c599f53b DSC |
734 | } else if (!strncmp(argv[i], "gp", 2) && |
735 | strlen(argv[i]) == 3 && | |
736 | argv[i][2] >= '1' && argv[i][2] <= '4') { | |
c599f53b | 737 | pidx = argv[i][2] - '1'; |
189f963a DSC |
738 | i++; |
739 | r = parse_hwpart_gp(&pconf, pidx, argc-i, &argv[i]); | |
740 | if (r < 0) | |
741 | return CMD_RET_USAGE; | |
742 | i += r; | |
c599f53b DSC |
743 | } else if (!strcmp(argv[i], "check")) { |
744 | mode = MMC_HWPART_CONF_CHECK; | |
745 | i++; | |
746 | } else if (!strcmp(argv[i], "set")) { | |
747 | mode = MMC_HWPART_CONF_SET; | |
748 | i++; | |
749 | } else if (!strcmp(argv[i], "complete")) { | |
750 | mode = MMC_HWPART_CONF_COMPLETE; | |
751 | i++; | |
752 | } else { | |
753 | return CMD_RET_USAGE; | |
754 | } | |
755 | } | |
756 | ||
757 | puts("Partition configuration:\n"); | |
758 | if (pconf.user.enh_size) { | |
759 | puts("\tUser Enhanced Start: "); | |
760 | print_size(((u64)pconf.user.enh_start) << 9, "\n"); | |
761 | puts("\tUser Enhanced Size: "); | |
762 | print_size(((u64)pconf.user.enh_size) << 9, "\n"); | |
763 | } else { | |
764 | puts("\tNo enhanced user data area\n"); | |
765 | } | |
189f963a DSC |
766 | if (pconf.user.wr_rel_change) |
767 | printf("\tUser partition write reliability: %s\n", | |
768 | pconf.user.wr_rel_set ? "on" : "off"); | |
c599f53b DSC |
769 | for (pidx = 0; pidx < 4; pidx++) { |
770 | if (pconf.gp_part[pidx].size) { | |
771 | printf("\tGP%i Capacity: ", pidx+1); | |
772 | print_size(((u64)pconf.gp_part[pidx].size) << 9, | |
773 | pconf.gp_part[pidx].enhanced ? | |
774 | " ENH\n" : "\n"); | |
775 | } else { | |
776 | printf("\tNo GP%i partition\n", pidx+1); | |
777 | } | |
189f963a DSC |
778 | if (pconf.gp_part[pidx].wr_rel_change) |
779 | printf("\tGP%i write reliability: %s\n", pidx+1, | |
780 | pconf.gp_part[pidx].wr_rel_set ? "on" : "off"); | |
c599f53b DSC |
781 | } |
782 | ||
783 | if (!mmc_hwpart_config(mmc, &pconf, mode)) { | |
784 | if (mode == MMC_HWPART_CONF_COMPLETE) | |
785 | puts("Partitioning successful, " | |
786 | "power-cycle to make effective\n"); | |
787 | return CMD_RET_SUCCESS; | |
788 | } else { | |
189f963a | 789 | puts("Failed!\n"); |
c599f53b DSC |
790 | return CMD_RET_FAILURE; |
791 | } | |
792 | } | |
cf17789e | 793 | #endif |
c599f53b | 794 | |
1fd93c6e | 795 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
09140113 SG |
796 | static int do_mmc_bootbus(struct cmd_tbl *cmdtp, int flag, |
797 | int argc, char *const argv[]) | |
1fd93c6e PA |
798 | { |
799 | int dev; | |
800 | struct mmc *mmc; | |
801 | u8 width, reset, mode; | |
802 | ||
803 | if (argc != 5) | |
804 | return CMD_RET_USAGE; | |
0b1284eb SG |
805 | dev = dectoul(argv[1], NULL); |
806 | width = dectoul(argv[2], NULL); | |
807 | reset = dectoul(argv[3], NULL); | |
808 | mode = dectoul(argv[4], NULL); | |
1fd93c6e | 809 | |
1ae24a50 | 810 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
811 | if (!mmc) |
812 | return CMD_RET_FAILURE; | |
813 | ||
814 | if (IS_SD(mmc)) { | |
815 | puts("BOOT_BUS_WIDTH only exists on eMMC\n"); | |
816 | return CMD_RET_FAILURE; | |
2a91c913 | 817 | } |
ab71188c | 818 | |
e9978b17 JC |
819 | /* |
820 | * BOOT_BUS_CONDITIONS[177] | |
821 | * BOOT_MODE[4:3] | |
822 | * 0x0 : Use SDR + Backward compatible timing in boot operation | |
823 | * 0x1 : Use SDR + High Speed Timing in boot operation mode | |
824 | * 0x2 : Use DDR in boot operation | |
825 | * RESET_BOOT_BUS_CONDITIONS | |
826 | * 0x0 : Reset bus width to x1, SDR, Backward compatible | |
827 | * 0x1 : Retain BOOT_BUS_WIDTH and BOOT_MODE | |
828 | * BOOT_BUS_WIDTH | |
829 | * 0x0 : x1(sdr) or x4 (ddr) buswidth | |
830 | * 0x1 : x4(sdr/ddr) buswith | |
831 | * 0x2 : x8(sdr/ddr) buswith | |
832 | * | |
833 | */ | |
834 | if (width >= 0x3) { | |
835 | printf("boot_bus_width %d is invalid\n", width); | |
836 | return CMD_RET_FAILURE; | |
837 | } | |
838 | ||
839 | if (reset >= 0x2) { | |
840 | printf("reset_boot_bus_width %d is invalid\n", reset); | |
841 | return CMD_RET_FAILURE; | |
842 | } | |
843 | ||
844 | if (mode >= 0x3) { | |
845 | printf("reset_boot_bus_width %d is invalid\n", mode); | |
846 | return CMD_RET_FAILURE; | |
847 | } | |
848 | ||
1fd93c6e | 849 | /* acknowledge to be sent during boot operation */ |
e9978b17 JC |
850 | if (mmc_set_boot_bus_width(mmc, width, reset, mode)) { |
851 | puts("BOOT_BUS_WIDTH is failed to change.\n"); | |
852 | return CMD_RET_FAILURE; | |
853 | } | |
854 | ||
855 | printf("Set to BOOT_BUS_WIDTH = 0x%x, RESET = 0x%x, BOOT_MODE = 0x%x\n", | |
856 | width, reset, mode); | |
857 | return CMD_RET_SUCCESS; | |
1fd93c6e | 858 | } |
09140113 SG |
859 | |
860 | static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag, | |
861 | int argc, char *const argv[]) | |
1fd93c6e PA |
862 | { |
863 | int dev; | |
864 | struct mmc *mmc; | |
865 | u32 bootsize, rpmbsize; | |
ab71188c | 866 | |
1fd93c6e PA |
867 | if (argc != 4) |
868 | return CMD_RET_USAGE; | |
0b1284eb SG |
869 | dev = dectoul(argv[1], NULL); |
870 | bootsize = dectoul(argv[2], NULL); | |
871 | rpmbsize = dectoul(argv[3], NULL); | |
1fd93c6e | 872 | |
1ae24a50 | 873 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
874 | if (!mmc) |
875 | return CMD_RET_FAILURE; | |
876 | ||
877 | if (IS_SD(mmc)) { | |
71a3e5c5 | 878 | printf("It is not an eMMC device\n"); |
1fd93c6e | 879 | return CMD_RET_FAILURE; |
ab71188c MN |
880 | } |
881 | ||
1fd93c6e PA |
882 | if (mmc_boot_partition_size_change(mmc, bootsize, rpmbsize)) { |
883 | printf("EMMC boot partition Size change Failed.\n"); | |
884 | return CMD_RET_FAILURE; | |
885 | } | |
e85649c7 | 886 | |
1fd93c6e PA |
887 | printf("EMMC boot partition Size %d MB\n", bootsize); |
888 | printf("EMMC RPMB partition Size %d MB\n", rpmbsize); | |
889 | return CMD_RET_SUCCESS; | |
890 | } | |
bdb60996 | 891 | |
5c2beda5 | 892 | static int mmc_partconf_print(struct mmc *mmc, const char *varname) |
bdb60996 AD |
893 | { |
894 | u8 ack, access, part; | |
895 | ||
896 | if (mmc->part_config == MMCPART_NOAVAILABLE) { | |
897 | printf("No part_config info for ver. 0x%x\n", mmc->version); | |
898 | return CMD_RET_FAILURE; | |
899 | } | |
900 | ||
901 | access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config); | |
902 | ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); | |
903 | part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); | |
904 | ||
5c2beda5 RD |
905 | if(varname) |
906 | env_set_hex(varname, part); | |
907 | ||
bdb60996 AD |
908 | printf("EXT_CSD[179], PARTITION_CONFIG:\n" |
909 | "BOOT_ACK: 0x%x\n" | |
910 | "BOOT_PARTITION_ENABLE: 0x%x\n" | |
911 | "PARTITION_ACCESS: 0x%x\n", ack, part, access); | |
912 | ||
913 | return CMD_RET_SUCCESS; | |
914 | } | |
915 | ||
09140113 SG |
916 | static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, |
917 | int argc, char *const argv[]) | |
1fd93c6e PA |
918 | { |
919 | int dev; | |
920 | struct mmc *mmc; | |
921 | u8 ack, part_num, access; | |
272cc70b | 922 | |
5c2beda5 | 923 | if (argc != 2 && argc != 3 && argc != 5) |
1fd93c6e | 924 | return CMD_RET_USAGE; |
272cc70b | 925 | |
0b1284eb | 926 | dev = dectoul(argv[1], NULL); |
d23d8d7e | 927 | |
1ae24a50 | 928 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
929 | if (!mmc) |
930 | return CMD_RET_FAILURE; | |
931 | ||
932 | if (IS_SD(mmc)) { | |
933 | puts("PARTITION_CONFIG only exists on eMMC\n"); | |
934 | return CMD_RET_FAILURE; | |
935 | } | |
936 | ||
5c2beda5 RD |
937 | if (argc == 2 || argc == 3) |
938 | return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL); | |
bdb60996 | 939 | |
0b1284eb SG |
940 | ack = dectoul(argv[2], NULL); |
941 | part_num = dectoul(argv[3], NULL); | |
942 | access = dectoul(argv[4], NULL); | |
bdb60996 | 943 | |
1fd93c6e PA |
944 | /* acknowledge to be sent during boot operation */ |
945 | return mmc_set_part_conf(mmc, ack, part_num, access); | |
946 | } | |
09140113 SG |
947 | |
948 | static int do_mmc_rst_func(struct cmd_tbl *cmdtp, int flag, | |
949 | int argc, char *const argv[]) | |
1fd93c6e PA |
950 | { |
951 | int dev; | |
952 | struct mmc *mmc; | |
953 | u8 enable; | |
954 | ||
955 | /* | |
956 | * Set the RST_n_ENABLE bit of RST_n_FUNCTION | |
957 | * The only valid values are 0x0, 0x1 and 0x2 and writing | |
958 | * a value of 0x1 or 0x2 sets the value permanently. | |
959 | */ | |
960 | if (argc != 3) | |
961 | return CMD_RET_USAGE; | |
962 | ||
0b1284eb SG |
963 | dev = dectoul(argv[1], NULL); |
964 | enable = dectoul(argv[2], NULL); | |
1fd93c6e | 965 | |
678e9316 | 966 | if (enable > 2) { |
1fd93c6e PA |
967 | puts("Invalid RST_n_ENABLE value\n"); |
968 | return CMD_RET_USAGE; | |
969 | } | |
970 | ||
1ae24a50 | 971 | mmc = init_mmc_device(dev, false); |
1fd93c6e PA |
972 | if (!mmc) |
973 | return CMD_RET_FAILURE; | |
974 | ||
975 | if (IS_SD(mmc)) { | |
976 | puts("RST_n_FUNCTION only exists on eMMC\n"); | |
977 | return CMD_RET_FAILURE; | |
978 | } | |
272cc70b | 979 | |
1fd93c6e PA |
980 | return mmc_set_rst_n_function(mmc, enable); |
981 | } | |
982 | #endif | |
09140113 SG |
983 | static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int flag, |
984 | int argc, char *const argv[]) | |
1fd93c6e PA |
985 | { |
986 | struct mmc *mmc; | |
987 | u32 val; | |
988 | int ret; | |
989 | ||
990 | if (argc != 2) | |
991 | return CMD_RET_USAGE; | |
7e5f460e | 992 | val = hextoul(argv[1], NULL); |
1fd93c6e PA |
993 | |
994 | mmc = find_mmc_device(curr_device); | |
995 | if (!mmc) { | |
996 | printf("no mmc device at slot %x\n", curr_device); | |
997 | return CMD_RET_FAILURE; | |
998 | } | |
999 | ret = mmc_set_dsr(mmc, val); | |
1000 | printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR"); | |
1001 | if (!ret) { | |
1002 | mmc->has_init = 0; | |
1003 | if (mmc_init(mmc)) | |
1004 | return CMD_RET_FAILURE; | |
1005 | else | |
1006 | return CMD_RET_SUCCESS; | |
272cc70b | 1007 | } |
1fd93c6e PA |
1008 | return ret; |
1009 | } | |
1010 | ||
cd3d4880 | 1011 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
09140113 SG |
1012 | static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag, |
1013 | int argc, char *const argv[]) | |
cd3d4880 TM |
1014 | { |
1015 | int dev; | |
1016 | struct mmc *mmc; | |
1017 | ||
1018 | if (argc != 2) | |
1019 | return CMD_RET_USAGE; | |
1020 | ||
0b1284eb | 1021 | dev = dectoul(argv[1], NULL); |
cd3d4880 TM |
1022 | |
1023 | mmc = init_mmc_device(dev, false); | |
1024 | if (!mmc) | |
1025 | return CMD_RET_FAILURE; | |
1026 | ||
1027 | if (IS_SD(mmc)) { | |
1028 | puts("BKOPS_EN only exists on eMMC\n"); | |
1029 | return CMD_RET_FAILURE; | |
1030 | } | |
1031 | ||
1032 | return mmc_set_bkops_enable(mmc); | |
1033 | } | |
1034 | #endif | |
1035 | ||
09140113 | 1036 | static int do_mmc_boot_wp(struct cmd_tbl *cmdtp, int flag, |
0469d846 HS |
1037 | int argc, char * const argv[]) |
1038 | { | |
1039 | int err; | |
1040 | struct mmc *mmc; | |
1041 | ||
1042 | mmc = init_mmc_device(curr_device, false); | |
1043 | if (!mmc) | |
1044 | return CMD_RET_FAILURE; | |
1045 | if (IS_SD(mmc)) { | |
1046 | printf("It is not an eMMC device\n"); | |
1047 | return CMD_RET_FAILURE; | |
1048 | } | |
1049 | err = mmc_boot_wp(mmc); | |
1050 | if (err) | |
1051 | return CMD_RET_FAILURE; | |
1052 | printf("boot areas protected\n"); | |
1053 | return CMD_RET_SUCCESS; | |
1054 | } | |
1055 | ||
09140113 | 1056 | static struct cmd_tbl cmd_mmc[] = { |
1fd93c6e PA |
1057 | U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""), |
1058 | U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""), | |
0469d846 | 1059 | U_BOOT_CMD_MKENT(wp, 1, 0, do_mmc_boot_wp, "", ""), |
e6fa5a54 | 1060 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
1fd93c6e PA |
1061 | U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""), |
1062 | U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""), | |
c232d14d AK |
1063 | #endif |
1064 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) | |
1065 | U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""), | |
e6fa5a54 | 1066 | #endif |
19f7a34a | 1067 | U_BOOT_CMD_MKENT(rescan, 2, 1, do_mmc_rescan, "", ""), |
1fd93c6e | 1068 | U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""), |
19f7a34a | 1069 | U_BOOT_CMD_MKENT(dev, 4, 0, do_mmc_dev, "", ""), |
1fd93c6e | 1070 | U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""), |
cf17789e | 1071 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
189f963a | 1072 | U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""), |
cf17789e | 1073 | #endif |
1fd93c6e PA |
1074 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
1075 | U_BOOT_CMD_MKENT(bootbus, 5, 0, do_mmc_bootbus, "", ""), | |
fa7b8851 | 1076 | U_BOOT_CMD_MKENT(bootpart-resize, 4, 0, do_mmc_boot_resize, "", ""), |
1fd93c6e PA |
1077 | U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""), |
1078 | U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""), | |
1079 | #endif | |
5a7b11e6 | 1080 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
1081 | U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""), |
1082 | #endif | |
1083 | U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""), | |
cd3d4880 TM |
1084 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
1085 | U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""), | |
1086 | #endif | |
1fd93c6e PA |
1087 | }; |
1088 | ||
09140113 SG |
1089 | static int do_mmcops(struct cmd_tbl *cmdtp, int flag, int argc, |
1090 | char *const argv[]) | |
1fd93c6e | 1091 | { |
09140113 | 1092 | struct cmd_tbl *cp; |
1fd93c6e PA |
1093 | |
1094 | cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc)); | |
1095 | ||
1096 | /* Drop the mmc command */ | |
1097 | argc--; | |
1098 | argv++; | |
1099 | ||
1100 | if (cp == NULL || argc > cp->maxargs) | |
1101 | return CMD_RET_USAGE; | |
80a48dd4 | 1102 | if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) |
1fd93c6e | 1103 | return CMD_RET_SUCCESS; |
ea6ebe21 | 1104 | |
1fd93c6e PA |
1105 | if (curr_device < 0) { |
1106 | if (get_mmc_num() > 0) { | |
1107 | curr_device = 0; | |
1108 | } else { | |
1109 | puts("No MMC device available\n"); | |
1110 | return CMD_RET_FAILURE; | |
1111 | } | |
1112 | } | |
1113 | return cp->cmd(cmdtp, flag, argc, argv); | |
272cc70b AF |
1114 | } |
1115 | ||
1116 | U_BOOT_CMD( | |
189f963a | 1117 | mmc, 29, 1, do_mmcops, |
852dbfdd | 1118 | "MMC sub system", |
1fd93c6e PA |
1119 | "info - display info of the current MMC device\n" |
1120 | "mmc read addr blk# cnt\n" | |
ea6ebe21 | 1121 | "mmc write addr blk# cnt\n" |
c232d14d | 1122 | #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) |
732bc7ce JB |
1123 | "mmc swrite addr blk#\n" |
1124 | #endif | |
e6f99a56 | 1125 | "mmc erase blk# cnt\n" |
19f7a34a | 1126 | "mmc rescan [mode]\n" |
ea6ebe21 | 1127 | "mmc part - lists available partition on current mmc device\n" |
19f7a34a AG |
1128 | "mmc dev [dev] [part] [mode] - show or set current mmc device [partition] and set mode\n" |
1129 | " - the required speed mode is passed as the index from the following list\n" | |
1130 | " [MMC_LEGACY, MMC_HS, SD_HS, MMC_HS_52, MMC_DDR_52, UHS_SDR12, UHS_SDR25,\n" | |
1131 | " UHS_SDR50, UHS_DDR50, UHS_SDR104, MMC_HS_200, MMC_HS_400, MMC_HS_400_ES]\n" | |
2a91c913 | 1132 | "mmc list - lists available devices\n" |
a633a804 | 1133 | "mmc wp - power on write protect boot partitions\n" |
84593679 | 1134 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
8ae82c4b | 1135 | "mmc hwpartition <USER> <GP> <MODE> - does hardware partitioning\n" |
c599f53b | 1136 | " arguments (sizes in 512-byte blocks):\n" |
8ae82c4b JC |
1137 | " USER - <user> <enh> <start> <cnt> <wrrel> <{on|off}>\n" |
1138 | " : sets user data area attributes\n" | |
1139 | " GP - <{gp1|gp2|gp3|gp4}> <cnt> <enh> <wrrel> <{on|off}>\n" | |
1140 | " : general purpose partition\n" | |
1141 | " MODE - <{check|set|complete}>\n" | |
1142 | " : mode, complete set partitioning completed\n" | |
189f963a DSC |
1143 | " WARNING: Partitioning is a write-once setting once it is set to complete.\n" |
1144 | " Power cycling is required to initialize partitions after set to complete.\n" | |
84593679 | 1145 | #endif |
2a91c913 | 1146 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
1019b196 | 1147 | "mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>\n" |
5a99b9de | 1148 | " - Set the BOOT_BUS_WIDTH field of the specified device\n" |
f1fd957e TR |
1149 | "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n" |
1150 | " - Change sizes of boot and RPMB partitions of specified device\n" | |
5c2beda5 | 1151 | "mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]\n" |
bdb60996 | 1152 | " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" |
5c2beda5 | 1153 | " If showing the bits, optionally store the boot_partition field into varname\n" |
1019b196 | 1154 | "mmc rst-function <dev> <value>\n" |
33ace362 TR |
1155 | " - Change the RST_n_FUNCTION field of the specified device\n" |
1156 | " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" | |
3511b4e2 | 1157 | #endif |
5a7b11e6 | 1158 | #if CONFIG_IS_ENABLED(CMD_MMC_RPMB) |
1fd93c6e PA |
1159 | "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n" |
1160 | "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n" | |
1161 | "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n" | |
1162 | "mmc rpmb counter - read the value of the write counter\n" | |
1163 | #endif | |
1164 | "mmc setdsr <value> - set DSR register value\n" | |
cd3d4880 TM |
1165 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
1166 | "mmc bkops-enable <dev> - enable background operations handshake on device\n" | |
1167 | " WARNING: This is a write-once setting.\n" | |
1168 | #endif | |
2a91c913 | 1169 | ); |
1fd93c6e PA |
1170 | |
1171 | /* Old command kept for compatibility. Same as 'mmc info' */ | |
1172 | U_BOOT_CMD( | |
1173 | mmcinfo, 1, 0, do_mmcinfo, | |
1174 | "display MMC info", | |
1175 | "- display info of the current MMC device" | |
1176 | ); |