projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 3dd12615 JT |
1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT=y | |
| 3 | CONFIG_COUNTER_FREQUENCY=24000000 | |
| 4 | CONFIG_ARCH_ROCKCHIP=y | |
| 7b00e7eb | 5 | CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-cm3-io" |
| 3dd12615 | 6 | CONFIG_ROCKCHIP_RK3568=y |
| 3dd12615 | 7 | CONFIG_SPL_SERIAL=y |
| d8927020 | 8 | CONFIG_SYS_LOAD_ADDR=0xc00800 |
| 3dd12615 JT |
9 | CONFIG_DEBUG_UART_BASE=0xFE660000 |
| 10 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| 3dd12615 JT |
11 | CONFIG_DEBUG_UART=y |
| 12 | CONFIG_FIT=y | |
| 13 | CONFIG_FIT_VERBOSE=y | |
| 1bf49d5a | 14 | CONFIG_SPL_FIT_SIGNATURE=y |
| 3dd12615 | 15 | CONFIG_SPL_LOAD_FIT=y |
| e3765084 | 16 | CONFIG_LEGACY_IMAGE_FORMAT=y |
| 3dd12615 JT |
17 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-cm3-io.dtb" |
| 18 | # CONFIG_DISPLAY_CPUINFO is not set | |
| 19 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
| 1bf49d5a | 20 | CONFIG_SPL_MAX_SIZE=0x40000 |
| 3dd12615 | 21 | CONFIG_SPL_PAD_TO=0x7f8000 |
| 3dd12615 | 22 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 3dd12615 | 23 | CONFIG_SPL_ATF=y |
| 1bf49d5a | 24 | CONFIG_CMD_GPIO=y |
| 3dd12615 | 25 | CONFIG_CMD_GPT=y |
| fecdeeae | 26 | CONFIG_CMD_I2C=y |
| 3dd12615 | 27 | CONFIG_CMD_MMC=y |
| 5aedc8bf | 28 | CONFIG_CMD_USB=y |
| 3dd12615 | 29 | # CONFIG_CMD_SETEXPR is not set |
| fecdeeae FN |
30 | CONFIG_CMD_PMIC=y |
| 31 | CONFIG_CMD_REGULATOR=y | |
| 3dd12615 JT |
32 | # CONFIG_SPL_DOS_PARTITION is not set |
| 33 | CONFIG_SPL_OF_CONTROL=y | |
| 34 | CONFIG_OF_LIVE=y | |
| 41cb87be | 35 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 25f56459 | 36 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 3dd12615 JT |
37 | CONFIG_SPL_REGMAP=y |
| 38 | CONFIG_SPL_SYSCON=y | |
| 39 | CONFIG_SPL_CLK=y | |
| 40 | CONFIG_ROCKCHIP_GPIO=y | |
| 41 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| 42 | CONFIG_MISC=y | |
| 43 | CONFIG_SUPPORT_EMMC_RPMB=y | |
| 44 | CONFIG_MMC_DW=y | |
| 45 | CONFIG_MMC_DW_ROCKCHIP=y | |
| 46 | CONFIG_MMC_SDHCI=y | |
| 47 | CONFIG_MMC_SDHCI_SDMA=y | |
| 48 | CONFIG_MMC_SDHCI_ROCKCHIP=y | |
| 25f56459 JK |
49 | CONFIG_PHY_REALTEK=y |
| 50 | CONFIG_DWC_ETH_QOS=y | |
| 51 | CONFIG_DWC_ETH_QOS_ROCKCHIP=y | |
| 5aedc8bf MS |
52 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 53 | CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y | |
| 41cb87be | 54 | CONFIG_SPL_PINCTRL=y |
| fecdeeae FN |
55 | CONFIG_DM_PMIC=y |
| 56 | CONFIG_PMIC_RK8XX=y | |
| 57 | CONFIG_REGULATOR_RK8XX=y | |
| 3dd12615 JT |
58 | CONFIG_PWM_ROCKCHIP=y |
| 59 | CONFIG_SPL_RAM=y | |
| 60 | CONFIG_BAUDRATE=1500000 | |
| 61 | CONFIG_DEBUG_UART_SHIFT=2 | |
| 1bf49d5a | 62 | CONFIG_SYS_NS16550_MEM32=y |
| 3dd12615 | 63 | CONFIG_SYSRESET=y |
| 5aedc8bf MS |
64 | CONFIG_USB=y |
| 65 | CONFIG_USB_XHCI_HCD=y | |
| 5aedc8bf MS |
66 | CONFIG_USB_EHCI_HCD=y |
| 67 | CONFIG_USB_EHCI_GENERIC=y | |
| 68 | CONFIG_USB_DWC3=y | |
| f8a2d1c1 | 69 | CONFIG_USB_DWC3_GENERIC=y |
| 3dd12615 | 70 | CONFIG_ERRNO_STR=y |