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83d290c5 1/* SPDX-License-Identifier: GPL-2.0+ */
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2/*
3 * (C) Copyright 2012 Michal Simek <[email protected]>
3e1b61de 4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
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5 *
6 * Common configuration options for all Zynq boards.
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7 */
8
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9#ifndef __CONFIG_ZYNQ_COMMON_H
10#define __CONFIG_ZYNQ_COMMON_H
f22651cf 11
f22651cf 12/* CPU clock */
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13#ifndef CONFIG_CPU_FREQ_HZ
14# define CONFIG_CPU_FREQ_HZ 800000000
15#endif
f22651cf 16
8cfac504 17/* Cache options */
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18#define CONFIG_SYS_L2CACHE_OFF
19#ifndef CONFIG_SYS_L2CACHE_OFF
20# define CONFIG_SYS_L2_PL310
21# define CONFIG_SYS_PL310_BASE 0xf8f02000
22#endif
23
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24#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
25#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
26#define CONFIG_SYS_TIMER_COUNTS_DOWN
27#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
28
53e49f74 29/* Serial drivers */
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30/* The following table includes the supported baudrates */
31#define CONFIG_SYS_BAUDRATE_TABLE \
32 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
33
636ac181 34#define CONFIG_ARM_DCC
53e49f74 35
f22651cf 36/* Ethernet driver */
596e5782 37#if defined(CONFIG_ZYNQ_GEM)
88fcfb1c 38# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
dd1c351f 39# define CONFIG_BOOTP_MAY_FAIL
88fcfb1c 40#endif
f22651cf 41
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42/* QSPI */
43#ifdef CONFIG_ZYNQ_QSPI
44# define CONFIG_SF_DEFAULT_SPEED 30000000
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45#endif
46
fe5eddbf 47/* NOR */
e856bdcf 48#ifdef CONFIG_MTD_NOR_FLASH
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49# define CONFIG_SYS_FLASH_BASE 0xE2000000
50# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
51# define CONFIG_SYS_MAX_FLASH_BANKS 1
52# define CONFIG_SYS_MAX_FLASH_SECT 512
53# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
54# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
55# define CONFIG_FLASH_SHOW_PROGRESS 10
56# define CONFIG_SYS_FLASH_CFI
57# undef CONFIG_SYS_FLASH_EMPTY_INFO
58# define CONFIG_FLASH_CFI_DRIVER
59# undef CONFIG_SYS_FLASH_PROTECTION
60# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
61#endif
62
ba8adb26 63#ifdef CONFIG_NAND_ZYNQ
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64#define CONFIG_SYS_MAX_NAND_DEVICE 1
65#define CONFIG_SYS_NAND_ONFI_DETECTION
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66#endif
67
2cdc778b 68#ifdef CONFIG_USB_EHCI_ZYNQ
c6024c8e 69# define CONFIG_EHCI_IS_TDI
87f3dbdf 70
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71# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
72# define DFU_DEFAULT_POLL_TIMEOUT 300
87f3dbdf 73# define CONFIG_USB_CABLE_CHECK
1e8d3830 74# define CONFIG_THOR_RESET_OFF
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75# define DFU_ALT_INFO_RAM \
76 "dfu_ram_info=" \
77 "set dfu_alt_info " \
78 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
79 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
80 "${ramdisk_image} ram 0x2000000 0x600000\0" \
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81 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
82 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
87f3dbdf 83
08aa0334 84# if defined(CONFIG_MMC_SDHCI_ZYNQ)
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85# define DFU_ALT_INFO_MMC \
86 "dfu_mmc_info=" \
87 "set dfu_alt_info " \
88 "${kernel_image} fat 0 1\\\\;" \
89 "${devicetree_image} fat 0 1\\\\;" \
90 "${ramdisk_image} fat 0 1\0" \
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91 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
92 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
93
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94# define DFU_ALT_INFO \
95 DFU_ALT_INFO_RAM \
96 DFU_ALT_INFO_MMC
97# else
98# define DFU_ALT_INFO \
99 DFU_ALT_INFO_RAM
100# endif
101#endif
102
103#if !defined(DFU_ALT_INFO)
104# define DFU_ALT_INFO
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105#endif
106
8934f784 107/* I2C */
18948632 108#if defined(CONFIG_SYS_I2C_ZYNQ)
0bdffe71 109# define CONFIG_SYS_I2C
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110#endif
111
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112/* EEPROM */
113#ifdef CONFIG_ZYNQ_EEPROM
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114# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
115# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
116# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
117# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
118# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
119#endif
120
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121/* Allow to overwrite serial and ethaddr */
122#define CONFIG_ENV_OVERWRITE
123
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124/* enable preboot to be loaded before CONFIG_BOOTDELAY */
125#define CONFIG_PREBOOT
126
61d8eeb0 127/* Boot configuration */
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128#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
129
130/* Distro boot enablement */
131
132#ifdef CONFIG_SPL_BUILD
133#define BOOTENV
134#else
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135
136#ifdef CONFIG_CMD_MMC
137#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
138#else
139#define BOOT_TARGET_DEVICES_MMC(func)
140#endif
141
142#ifdef CONFIG_CMD_USB
143#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
144#else
145#define BOOT_TARGET_DEVICES_USB(func)
146#endif
147
86271b3f 148#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
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149#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
150#else
151#define BOOT_TARGET_DEVICES_PXE(func)
152#endif
153
154#if defined(CONFIG_CMD_DHCP)
155#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
156#else
157#define BOOT_TARGET_DEVICES_DHCP(func)
158#endif
159
160#define BOOT_TARGET_DEVICES(func) \
161 BOOT_TARGET_DEVICES_MMC(func) \
162 BOOT_TARGET_DEVICES_USB(func) \
163 BOOT_TARGET_DEVICES_PXE(func) \
164 BOOT_TARGET_DEVICES_DHCP(func)
165
166#include <config_distro_bootcmd.h>
167#endif /* CONFIG_SPL_BUILD */
168
e83f61a6 169/* Default environment */
b7b3efe7 170#ifndef CONFIG_EXTRA_ENV_SETTINGS
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171#define CONFIG_EXTRA_ENV_SETTINGS \
172 "fit_image=fit.itb\0" \
173 "load_addr=0x2000000\0" \
174 "fit_size=0x800000\0" \
175 "flash_off=0x100000\0" \
176 "nor_flash_off=0xE2100000\0" \
177 "fdt_high=0x20000000\0" \
178 "initrd_high=0x20000000\0" \
4d1ed9c7 179 "loadbootenv_addr=0x2000000\0" \
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180 "fdt_addr_r=0x1f00000\0" \
181 "pxefile_addr_r=0x2000000\0" \
182 "kernel_addr_r=0x2000000\0" \
183 "scriptaddr=0x3000000\0" \
184 "ramdisk_addr_r=0x3100000\0" \
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185 "bootenv=uEnv.txt\0" \
186 "bootenv_dev=mmc\0" \
187 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
188 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
189 "env import -t ${loadbootenv_addr} $filesize\0" \
190 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
191 "setbootenv=if env run bootenv_existence_test; then " \
192 "if env run loadbootenv; then " \
193 "env run importbootenv; " \
194 "fi; " \
195 "fi; \0" \
196 "sd_loadbootenv=set bootenv_dev mmc && " \
197 "run setbootenv \0" \
198 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
199 "preboot=if test $modeboot = sdboot; then " \
200 "run sd_loadbootenv; " \
201 "echo Checking if uenvcmd is set ...; " \
202 "if test -n $uenvcmd; then " \
203 "echo Running uenvcmd ...; " \
204 "run uenvcmd; " \
205 "fi; " \
206 "fi; \0" \
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207 "norboot=echo Copying FIT from NOR flash to RAM... && " \
208 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
209 "bootm ${load_addr}\0" \
210 "sdboot=echo Copying FIT from SD to RAM... && " \
e9d69c1c 211 "load mmc 0 ${load_addr} ${fit_image} && " \
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212 "bootm ${load_addr}\0" \
213 "jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058 214 "tftpboot ${load_addr} ${fit_image} && " \
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215 "bootm ${load_addr}\0" \
216 "usbboot=if usb start; then " \
217 "echo Copying FIT from USB to RAM... && " \
e9d69c1c 218 "load usb 0 ${load_addr} ${fit_image} && " \
39bc1a8c 219 "bootm ${load_addr}; fi\0" \
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220 DFU_ALT_INFO \
221 BOOTENV
b7b3efe7 222#endif
c6024c8e 223
36e0e197 224/* Miscellaneous configurable options */
36e0e197 225
6c3e61de 226#define CONFIG_CLOCKS
841426ad 227#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
f22651cf 228
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229#define CONFIG_SYS_MEMTEST_START 0
230#define CONFIG_SYS_MEMTEST_END 0x1000
7cd04192 231
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232#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
233#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
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234#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
235 CONFIG_SYS_INIT_RAM_SIZE - \
236 GENERATED_GBL_DATA_SIZE)
53e49f74 237
53e49f74 238
ae9f4899 239/* Extend size of kernel image for uncompression */
3d456eec 240#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899 241
09ed635b 242/* Boot FreeBSD/vxWorks from an ELF image */
d82d63cc 243#define CONFIG_SYS_MMC_MAX_DEVICE 1
09ed635b 244
0107f240 245#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
38716189 246
f22651cf 247/* Commands */
f22651cf 248
d7e269cf 249/* SPL part */
d7e269cf 250
d7e269cf 251/* MMC support */
08aa0334 252#ifdef CONFIG_MMC_SDHCI_ZYNQ
e2ccdf89 253#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
7f307d93 254#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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255#endif
256
257/* Disable dcache for SPL just for sure */
258#ifdef CONFIG_SPL_BUILD
259#define CONFIG_SYS_DCACHE_OFF
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260#endif
261
262/* Address in RAM where the parameters must be copied by SPL. */
263#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
264
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265#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
266#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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267
268/* Not using MMC raw mode - just for compilation purpose */
269#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
270#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
271#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
272
273/* qspi mode is working fine */
274#ifdef CONFIG_ZYNQ_QSPI
d7e269cf 275#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
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276#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
277#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
278#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
279 CONFIG_SYS_SPI_ARGS_SIZE)
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280#endif
281
282/* for booting directly linux */
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283
284/* SP location before relocation, must use scratch RAM */
285#define CONFIG_SPL_TEXT_BASE 0x0
286
287/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
288#define CONFIG_SPL_MAX_SIZE 0x30000
289
d7e269cf 290/* On the top of OCM space */
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291#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
292#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
d7e269cf 293
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294/*
295 * SPL stack position - and stack goes down
296 * 0xfffffe00 is used for putting wfi loop.
297 * Set it up as limit for now.
298 */
299#define CONFIG_SPL_STACK 0xfffffe00
300
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301/* BSS setup */
302#define CONFIG_SPL_BSS_START_ADDR 0x100000
303#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
304
305#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf 306
06fe8dae 307#endif /* __CONFIG_ZYNQ_COMMON_H */
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