[J-u-boot.git] / include / configs / bmips_bcm6348.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
 */

#ifndef __CONFIG_BMIPS_BCM6348_H
#define __CONFIG_BMIPS_BCM6348_H

/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ	128000000

/* RAM */
#define CONFIG_SYS_SDRAM_BASE		0x80000000

/* USB */
#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_OHCI_NEW

/* U-Boot */
#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000

#if defined(CONFIG_BMIPS_BOOT_RAM)
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
#endif

#define CONFIG_SYS_FLASH_BASE			0xbfc00000
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1

#endif /* __CONFIG_BMIPS_BCM6348_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
bf9012b8 ÁFR	2	/*
bf9012b8 ÁFR	3	* Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
bf9012b8 ÁFR	4	*/
	5
	6	#ifndef __CONFIG_BMIPS_BCM6348_H
	7	#define __CONFIG_BMIPS_BCM6348_H
	8
	9	/* CPU */
	10	#define CONFIG_SYS_MIPS_TIMER_FREQ 128000000
	11
	12	/* RAM */
bf9012b8 ÁFR	13	#define CONFIG_SYS_SDRAM_BASE 0x80000000
bf9012b8 ÁFR	14
d51aaf84 ÁFR	15	/* USB */
	16	#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
	17	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
	18	#define CONFIG_USB_OHCI_NEW
	19
bf9012b8 ÁFR	20	/* U-Boot */
	21	#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
	22
	23	#if defined(CONFIG_BMIPS_BOOT_RAM)
	24	#define CONFIG_SKIP_LOWLEVEL_INIT
	25	#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
	26	#endif
	27
	28	#define CONFIG_SYS_FLASH_BASE 0xbfc00000
	29	#define CONFIG_SYS_FLASH_EMPTY_INFO
	30	#define CONFIG_SYS_FLASH_PROTECTION
	31	#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
	32
	33	#endif /* __CONFIG_BMIPS_BCM6348_H */