[J-u-boot.git] / board / cray / L1 / L1.c

/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <asm/processor.h>
#include <asm/ppc4xx-i2c.h>
#include <command.h>
#include <rtc.h>
#include <post.h>
#include <net.h>
#include <malloc.h>

#define L1_MEMSIZE (32*1024*1024)

/* the std. DHCP stufff */
#define DHCP_ROUTER       3
#define DHCP_NETMASK      1
#define DHCP_BOOTFILE     67
#define DHCP_ROOTPATH     17
#define DHCP_HOSTNAME     12

/* some extras used by CRAY
 *
 * on the server this looks like:
 *
 * option L1-initrd-image code 224 = string;
 * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
 */
#define DHCP_L1_INITRD  224

/* new, [better?] way via official vendor-extensions, defining an option
 * space.
 * on the server this looks like:
 *
 * option space CRAYL1;
 * option CRAYL1.initrd     code 3 = string;
 * ..etc...
 */
#define DHCP_VENDOR_SPECX   43
#define DHCP_VX_INITRD       3
#define DHCP_VX_BOOTCMD      4
#define DHCP_VX_BOOTARGS     5
#define DHCP_VX_ROOTDEV      6
#define DHCP_VX_FROMFLASH    7
#define DHCP_VX_BOOTSCRIPT   8
#define DHCP_VX_RCFILE	     9
#define DHCP_VX_MAGIC        10

/* Things DHCP server can tellme about.  If there's no flash address, then
 * they dont participate in 'update' to flash, and we force their values
 * back to '0' every boot to be sure to get them fresh from DHCP.  Yes, I
 * know this is a pain...
 *
 * If I get no bootfile, boot from flash.  If rootpath, use that.  If no
 * rootpath use initrd in flash.
 */
typedef struct dhcp_item_s {
	u8 dhcp_option;
	u8 dhcp_vendor_option;
	char *dhcpvalue;
	char *envname;
} dhcp_item_t;
static dhcp_item_t Things[] = {
	{DHCP_ROUTER, 0, NULL, "gateway"},
	{DHCP_NETMASK, 0, NULL, "netmask"},
	{DHCP_BOOTFILE, 0, NULL, "bootfile"},
	{DHCP_ROOTPATH, 0, NULL, "rootpath"},
	{DHCP_HOSTNAME, 0, NULL, "hostname"},
	{DHCP_L1_INITRD, 0, NULL, "initrd"},
/* and the other way.. */
	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
};

#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))

extern char bootscript[];

/* Here is the boot logic as HUSH script. Overridden by any TFP provided
 * bootscript file.
 */

static void init_sdram (void);

/* ------------------------------------------------------------------------- */
int board_early_init_f (void)
{
	/* Running from ROM: global data is still READONLY */
	init_sdram ();
	mtdcr (UIC0SR, 0xFFFFFFFF);	/* clear all ints */
	mtdcr (UIC0ER, 0x00000000);	/* disable all ints */
	mtdcr (UIC0CR, 0x00000020);	/* set all but FPGA SMI to be non-critical */
	mtdcr (UIC0PR, 0xFFFFFFE0);	/* set int polarities */
	mtdcr (UIC0TR, 0x10000000);	/* set int trigger levels */
	mtdcr (UIC0VCR, 0x00000001);	/* set vect base=0,INT0 highest priority */
	mtdcr (UIC0SR, 0xFFFFFFFF);	/* clear all ints */
	return 0;
}

/* ------------------------------------------------------------------------- */
int checkboard (void)
{
	return (0);
}
/* ------------------------------------------------------------------------- */

/* ------------------------------------------------------------------------- */
int misc_init_r (void)
{
	char *s, *e;
	image_header_t *hdr;
	time_t timestamp;
	struct rtc_time tm;
	char bootcmd[32];

	hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ());
#if defined(CONFIG_FIT)
	if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) {
		puts ("Non legacy image format not supported\n");
		return -1;
	}
#endif

	timestamp = (time_t)image_get_time (hdr);
	to_tm (timestamp, &tm);
	printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d  %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);

#define FACTORY_SETTINGS 0xFFFC0000
	if ((s = getenv ("ethaddr")) == NULL) {
		e = (char *) (FACTORY_SETTINGS);
		if (*(e + 0) != '0'
			|| *(e + 1) != '0'
			|| *(e + 2) != ':'
			|| *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
			printf ("No valid MAC address in flash location 0x3C0000!\n");
		} else {
			printf ("Factory MAC: %s\n", e);
			setenv ("ethaddr", e);
		}
	}
	sprintf (bootcmd,"source %X",(unsigned)bootscript);
	setenv ("bootcmd", bootcmd);
	return (0);
}

/* ------------------------------------------------------------------------- */
/* stubs so we can print dates w/o any nvram RTC.*/
int rtc_get (struct rtc_time *tmp)
{
	return 0;
}
int rtc_set (struct rtc_time *tmp)
{
	return 0;
}
void rtc_reset (void)
{
	return;
}

/* ------------------------------------------------------------------------- */
/*  Do sdram bank init in C so I can read it..no console to print to yet!
 */
static void init_sdram (void)
{
 unsigned long tmp;

	/* write SDRAM bank 0 register */
	mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR);
	mtdcr (SDRAM0_CFGDATA, 0x00062001);

/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR.	*/
/* To set the appropriate timings, we need to know the SDRAM speed.	*/
/* We can use the PLB speed since the SDRAM speed is the same as	*/
/* the PLB speed. The PLB speed is the FBK divider times the		*/
/* 405GP reference clock, which on the L1 is 25MHz.			*/
/* Thus, if FBK div is 2, SDRAM is 50MHz; if FBK div is 3, SDRAM is	*/
/* 150MHz; if FBK is 3, SDRAM is 150MHz.				*/

	/* divisor = ((mfdcr(strap)>> 28) & 0x3); */

/* write SDRAM timing for 100MHz. */
	mtdcr (SDRAM0_CFGADDR, SDRAM0_TR);
	mtdcr (SDRAM0_CFGDATA, 0x0086400D);

/* write SDRAM refresh interval register */
	mtdcr (SDRAM0_CFGADDR, SDRAM0_RTR);
	mtdcr (SDRAM0_CFGDATA, 0x05F00000);
	udelay (200);

/* sdram controller.*/
	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
	mtdcr (SDRAM0_CFGDATA, 0x90800000);
	udelay (200);

/* initially, disable ECC on all banks */
	udelay (200);
	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
	tmp = mfdcr (SDRAM0_CFGDATA);
	tmp &= 0xff0fffff;
	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
	mtdcr (SDRAM0_CFGDATA, tmp);

	return;
}

extern int memory_post_test (int flags);

int testdram (void)
{
 unsigned long tmp;
	uint *pstart = (uint *) 0x00000000;
	uint *pend = (uint *) L1_MEMSIZE;
	uint *p;

	if (getenv_f("booted",NULL,0) <= 0)
	{
		printf ("testdram..");
	/*AA*/
		for (p = pstart; p < pend; p++)
			*p = 0xaaaaaaaa;
		for (p = pstart; p < pend; p++) {
			if (*p != 0xaaaaaaaa) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, 0xaaaaaaaa);
				return 1;
			}
		}
	/*55*/
		for (p = pstart; p < pend; p++)
			*p = 0x55555555;
		for (p = pstart; p < pend; p++) {
			if (*p != 0x55555555) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, 0x55555555);
				return 1;
			}
		}
	/*addr*/
		for (p = pstart; p < pend; p++)
			*p = (unsigned)p;
		for (p = pstart; p < pend; p++) {
			if (*p != (unsigned)p) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, (uint)p);
				return 1;
			}
		}
		printf ("Success. ");
	}
	printf ("Enable ECC..");

	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
	tmp = (mfdcr (SDRAM0_CFGDATA) & ~0xFFE00000) | 0x90800000;
	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
	mtdcr (SDRAM0_CFGDATA, tmp);
	udelay (600);
	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
		;
	udelay (400);
	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
	tmp = mfdcr (SDRAM0_CFGDATA);
	tmp |= 0x00800000;
	mtdcr (SDRAM0_CFGDATA, tmp);
	udelay (400);
	printf ("enabled.\n");
	return (0);
}

/* ------------------------------------------------------------------------- */
static u8 *dhcp_env_update (u8 thing, u8 * pop)
{
	u8 i, oplen;

	oplen = *(pop + 1);

	if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
		printf ("Whoops! failed to malloc space for DHCP thing %s\n",
				Things[thing].envname);
		return NULL;
	}
	for (i = 0; (i < oplen); i++)
		if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
			break;
	*(Things[thing].dhcpvalue + i) = '\0';

/* set env. */
	if (Things[thing].envname)
	{
		setenv (Things[thing].envname, Things[thing].dhcpvalue);
	}
	return ((u8 *)(Things[thing].dhcpvalue));
}

/* ------------------------------------------------------------------------- */
u8 *dhcp_vendorex_prep (u8 * e)
{
	u8 thing;

/* ask for the things I want. */
	*e++ = 55;					/* Parameter Request List */
	*e++ = N_THINGS;
	for (thing = 0; thing < N_THINGS; thing++)
		*e++ = Things[thing].dhcp_option;
	*e++ = 255;

	return e;
}

/* ------------------------------------------------------------------------- */
/* .. return NULL means it wasnt mine, non-null means I got it..*/
u8 *dhcp_vendorex_proc (u8 * pop)
{
	u8 oplen, *sub_op, sub_oplen, *retval;
	u8 thing = 0;

	retval = NULL;
	oplen = *(pop + 1);
/* if pop is vender spec indicator, there are sub-options. */
	if (*pop == DHCP_VENDOR_SPECX) {
		for (sub_op = pop + 2;
		     oplen && (sub_oplen = *(sub_op + 1));
		     oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
			for (thing = 0; thing < N_THINGS; thing++) {
			    if (*sub_op == Things[thing].dhcp_vendor_option) {
					if (!(retval = dhcp_env_update (thing, sub_op))) {
						return NULL;
					}
			    }
			}
		}
	} else {
		for (thing = 0; thing < N_THINGS; thing++) {
			if (*pop == Things[thing].dhcp_option)
				if (!(retval = dhcp_env_update (thing, pop)))
					return NULL;
		}
	}
	return (pop);
}
Commit	Line	Data
47d1a6e1 WD	1	/*
	2	* (C) Copyright 2000
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
47d1a6e1 WD	6	*/
	7
	8	#include <common.h>
	9	#include <asm/processor.h>
b36df561	10	#include <asm/ppc4xx-i2c.h>
47d1a6e1	11	#include <command.h>
47d1a6e1	12	#include <rtc.h>
7f70e853	13	#include <post.h>
47d1a6e1 WD	14	#include <net.h>
	15	#include <malloc.h>
	16
	17	#define L1_MEMSIZE (3210241024)
	18
	19	/* the std. DHCP stufff */
	20	#define DHCP_ROUTER 3
	21	#define DHCP_NETMASK 1
	22	#define DHCP_BOOTFILE 67
	23	#define DHCP_ROOTPATH 17
	24	#define DHCP_HOSTNAME 12
	25
	26	/* some extras used by CRAY
	27	*
	28	* on the server this looks like:
	29	*
	30	* option L1-initrd-image code 224 = string;
	31	* option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
	32	*/
	33	#define DHCP_L1_INITRD 224
	34
	35	/* new, [better?] way via official vendor-extensions, defining an option
	36	* space.
	37	* on the server this looks like:
	38	*
7f70e853 WD	39	* option space CRAYL1;
	40	* option CRAYL1.initrd code 3 = string;
	41	* ..etc...
47d1a6e1 WD	42	*/
	43	#define DHCP_VENDOR_SPECX 43
	44	#define DHCP_VX_INITRD 3
	45	#define DHCP_VX_BOOTCMD 4
7f70e853	46	#define DHCP_VX_BOOTARGS 5
47d1a6e1	47	#define DHCP_VX_ROOTDEV 6
7f70e853 WD	48	#define DHCP_VX_FROMFLASH 7
	49	#define DHCP_VX_BOOTSCRIPT 8
	50	#define DHCP_VX_RCFILE 9
	51	#define DHCP_VX_MAGIC 10
47d1a6e1 WD	52
	53	/* Things DHCP server can tellme about. If there's no flash address, then
	54	* they dont participate in 'update' to flash, and we force their values
	55	* back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
	56	* know this is a pain...
	57	*
	58	* If I get no bootfile, boot from flash. If rootpath, use that. If no
	59	* rootpath use initrd in flash.
	60	*/
	61	typedef struct dhcp_item_s {
	62	u8 dhcp_option;
	63	u8 dhcp_vendor_option;
	64	char *dhcpvalue;
	65	char *envname;
	66	} dhcp_item_t;
	67	static dhcp_item_t Things[] = {
	68	{DHCP_ROUTER, 0, NULL, "gateway"},
	69	{DHCP_NETMASK, 0, NULL, "netmask"},
	70	{DHCP_BOOTFILE, 0, NULL, "bootfile"},
	71	{DHCP_ROOTPATH, 0, NULL, "rootpath"},
	72	{DHCP_HOSTNAME, 0, NULL, "hostname"},
	73	{DHCP_L1_INITRD, 0, NULL, "initrd"},
	74	/* and the other way.. */
	75	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
	76	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
7f70e853 WD	77	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
	78	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
	79	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
	80	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
47d1a6e1	81	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
7f70e853	82	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
47d1a6e1 WD	83	};
	84
	85	#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
	86
7f70e853 WD	87	extern char bootscript[];
	88
	89	/* Here is the boot logic as HUSH script. Overridden by any TFP provided
	90	* bootscript file.
	91	*/
	92
	93	static void init_sdram (void);
47d1a6e1 WD	94
47d1a6e1 WD	95	/* ------------------------------------------------------------------------- */
c837dcb1	96	int board_early_init_f (void)
47d1a6e1	97	{
7f70e853 WD	98	/* Running from ROM: global data is still READONLY */
7f70e853 WD	99	init_sdram ();
952e7760 SR	100	mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
	101	mtdcr (UIC0ER, 0x00000000); /* disable all ints */
	102	mtdcr (UIC0CR, 0x00000020); /* set all but FPGA SMI to be non-critical */
	103	mtdcr (UIC0PR, 0xFFFFFFE0); /* set int polarities */
	104	mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
	105	mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
	106	mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
47d1a6e1 WD	107	return 0;
	108	}
	109
	110	/* ------------------------------------------------------------------------- */
	111	int checkboard (void)
	112	{
	113	return (0);
	114	}
7f70e853	115	/* ------------------------------------------------------------------------- */
47d1a6e1 WD	116
	117	/* ------------------------------------------------------------------------- */
	118	int misc_init_r (void)
	119	{
77ddac94	120	char s, e;
47d1a6e1 WD	121	image_header_t *hdr;
	122	time_t timestamp;
	123	struct rtc_time tm;
7f70e853	124	char bootcmd[32];
47d1a6e1	125
6d0f6bcf	126	hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ());
d5934ad7	127	#if defined(CONFIG_FIT)
9a4daad0	128	if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) {
d5934ad7 MB	129	puts ("Non legacy image format not supported\n");
	130	return -1;
	131	}
	132	#endif
	133
b97a2a0a	134	timestamp = (time_t)image_get_time (hdr);
47d1a6e1 WD	135	to_tm (timestamp, &tm);
	136	printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
	137
	138	#define FACTORY_SETTINGS 0xFFFC0000
	139	if ((s = getenv ("ethaddr")) == NULL) {
77ddac94	140	e = (char *) (FACTORY_SETTINGS);
47d1a6e1 WD	141	if (*(e + 0) != '0'
	142	\|\| *(e + 1) != '0'
	143	\|\| *(e + 2) != ':'
	144	\|\| (e + 3) != '4' \|\| (e + 4) != '0' \|\| *(e + 17) != '\0') {
	145	printf ("No valid MAC address in flash location 0x3C0000!\n");
	146	} else {
	147	printf ("Factory MAC: %s\n", e);
	148	setenv ("ethaddr", e);
	149	}
	150	}
74de7aef	151	sprintf (bootcmd,"source %X",(unsigned)bootscript);
7f70e853	152	setenv ("bootcmd", bootcmd);
47d1a6e1 WD	153	return (0);
	154	}
	155
47d1a6e1 WD	156	/* ------------------------------------------------------------------------- */
47d1a6e1 WD	157	/* stubs so we can print dates w/o any nvram RTC.*/
b73a19e1	158	int rtc_get (struct rtc_time *tmp)
47d1a6e1	159	{
b73a19e1	160	return 0;
47d1a6e1	161	}
d1e23194	162	int rtc_set (struct rtc_time *tmp)
47d1a6e1	163	{
d1e23194	164	return 0;
47d1a6e1 WD	165	}
	166	void rtc_reset (void)
	167	{
	168	return;
	169	}
	170
	171	/* ------------------------------------------------------------------------- */
7f70e853	172	/* Do sdram bank init in C so I can read it..no console to print to yet!
47d1a6e1	173	*/
7f70e853	174	static void init_sdram (void)
47d1a6e1	175	{
7f70e853	176	unsigned long tmp;
47d1a6e1 WD	177
47d1a6e1 WD	178	/* write SDRAM bank 0 register */
95b602ba	179	mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR);
d1c3b275	180	mtdcr (SDRAM0_CFGDATA, 0x00062001);
47d1a6e1 WD	181
	182	/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
	183	/* To set the appropriate timings, we need to know the SDRAM speed. */
	184	/* We can use the PLB speed since the SDRAM speed is the same as */
	185	/* the PLB speed. The PLB speed is the FBK divider times the */
8ed44d91 WD	186	/* 405GP reference clock, which on the L1 is 25MHz. */
	187	/* Thus, if FBK div is 2, SDRAM is 50MHz; if FBK div is 3, SDRAM is */
	188	/* 150MHz; if FBK is 3, SDRAM is 150MHz. */
47d1a6e1 WD	189
	190	/* divisor = ((mfdcr(strap)>> 28) & 0x3); */
	191
8ed44d91	192	/* write SDRAM timing for 100MHz. */
95b602ba	193	mtdcr (SDRAM0_CFGADDR, SDRAM0_TR);
d1c3b275	194	mtdcr (SDRAM0_CFGDATA, 0x0086400D);
47d1a6e1 WD	195
47d1a6e1 WD	196	/* write SDRAM refresh interval register */
95b602ba	197	mtdcr (SDRAM0_CFGADDR, SDRAM0_RTR);
d1c3b275	198	mtdcr (SDRAM0_CFGDATA, 0x05F00000);
47d1a6e1 WD	199	udelay (200);
	200
	201	/* sdram controller.*/
95b602ba	202	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
d1c3b275	203	mtdcr (SDRAM0_CFGDATA, 0x90800000);
47d1a6e1 WD	204	udelay (200);
47d1a6e1 WD	205
7f70e853 WD	206	/* initially, disable ECC on all banks */
7f70e853 WD	207	udelay (200);
95b602ba	208	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
d1c3b275	209	tmp = mfdcr (SDRAM0_CFGDATA);
47d1a6e1	210	tmp &= 0xff0fffff;
95b602ba	211	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
d1c3b275	212	mtdcr (SDRAM0_CFGDATA, tmp);
47d1a6e1	213
7f70e853 WD	214	return;
	215	}
	216
	217	extern int memory_post_test (int flags);
	218
	219	int testdram (void)
	220	{
	221	unsigned long tmp;
	222	uint pstart = (uint ) 0x00000000;
	223	uint pend = (uint ) L1_MEMSIZE;
	224	uint *p;
	225
cdb74977	226	if (getenv_f("booted",NULL,0) <= 0)
7f70e853 WD	227	{
	228	printf ("testdram..");
	229	/AA/
	230	for (p = pstart; p < pend; p++)
	231	*p = 0xaaaaaaaa;
	232	for (p = pstart; p < pend; p++) {
	233	if (*p != 0xaaaaaaaa) {
8bde7f77	234	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	235	(uint) p, *p, 0xaaaaaaaa);
	236	return 1;
	237	}
	238	}
	239	/55/
	240	for (p = pstart; p < pend; p++)
	241	*p = 0x55555555;
	242	for (p = pstart; p < pend; p++) {
	243	if (*p != 0x55555555) {
8bde7f77	244	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	245	(uint) p, *p, 0x55555555);
	246	return 1;
	247	}
	248	}
	249	/addr/
	250	for (p = pstart; p < pend; p++)
	251	*p = (unsigned)p;
	252	for (p = pstart; p < pend; p++) {
	253	if (*p != (unsigned)p) {
8bde7f77	254	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	255	(uint) p, *p, (uint)p);
	256	return 1;
	257	}
	258	}
	259	printf ("Success. ");
	260	}
	261	printf ("Enable ECC..");
	262
95b602ba	263	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
d1c3b275	264	tmp = (mfdcr (SDRAM0_CFGDATA) & ~0xFFE00000) \| 0x90800000;
95b602ba	265	mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
d1c3b275	266	mtdcr (SDRAM0_CFGDATA, tmp);
47d1a6e1	267	udelay (600);
7f70e853 WD	268	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
7f70e853 WD	269	;
47d1a6e1	270	udelay (400);
95b602ba	271	mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
d1c3b275	272	tmp = mfdcr (SDRAM0_CFGDATA);
47d1a6e1	273	tmp \|= 0x00800000;
d1c3b275	274	mtdcr (SDRAM0_CFGDATA, tmp);
47d1a6e1	275	udelay (400);
7f70e853 WD	276	printf ("enabled.\n");
7f70e853 WD	277	return (0);
47d1a6e1 WD	278	}
	279
	280	/* ------------------------------------------------------------------------- */
	281	static u8 dhcp_env_update (u8 thing, u8 pop)
	282	{
	283	u8 i, oplen;
	284
	285	oplen = *(pop + 1);
	286
	287	if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
	288	printf ("Whoops! failed to malloc space for DHCP thing %s\n",
	289	Things[thing].envname);
	290	return NULL;
	291	}
	292	for (i = 0; (i < oplen); i++)
	293	if (((Things[thing].dhcpvalue + i) = (pop + 2 + i)) == ' ')
	294	break;
	295	*(Things[thing].dhcpvalue + i) = '\0';
	296
	297	/* set env. */
	298	if (Things[thing].envname)
7f70e853	299	{
47d1a6e1	300	setenv (Things[thing].envname, Things[thing].dhcpvalue);
7f70e853	301	}
77ddac94	302	return ((u8 *)(Things[thing].dhcpvalue));
47d1a6e1 WD	303	}
	304
	305	/* ------------------------------------------------------------------------- */
	306	u8 dhcp_vendorex_prep (u8 e)
	307	{
	308	u8 thing;
	309
	310	/* ask for the things I want. */
	311	e++ = 55; / Parameter Request List */
	312	*e++ = N_THINGS;
	313	for (thing = 0; thing < N_THINGS; thing++)
	314	*e++ = Things[thing].dhcp_option;
	315	*e++ = 255;
	316
	317	return e;
	318	}
	319
	320	/* ------------------------------------------------------------------------- */
	321	/* .. return NULL means it wasnt mine, non-null means I got it..*/
	322	u8 dhcp_vendorex_proc (u8 pop)
	323	{
	324	u8 oplen, sub_op, sub_oplen, retval;
	325	u8 thing = 0;
	326
	327	retval = NULL;
	328	oplen = *(pop + 1);
	329	/* if pop is vender spec indicator, there are sub-options. */
	330	if (*pop == DHCP_VENDOR_SPECX) {
	331	for (sub_op = pop + 2;
	332	oplen && (sub_oplen = *(sub_op + 1));
	333	oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
	334	for (thing = 0; thing < N_THINGS; thing++) {
	335	if (*sub_op == Things[thing].dhcp_vendor_option) {
7f70e853 WD	336	if (!(retval = dhcp_env_update (thing, sub_op))) {
	337	return NULL;
	338	}
47d1a6e1 WD	339	}
	340	}
	341	}
	342	} else {
	343	for (thing = 0; thing < N_THINGS; thing++) {
	344	if (*pop == Things[thing].dhcp_option)
	345	if (!(retval = dhcp_env_update (thing, pop)))
	346	return NULL;
	347	}
	348	}
7f70e853	349	return (pop);
47d1a6e1	350	}