projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 4d02d206 PT |
1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y | |
| 278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0x00200000 |
| 554e5514 | 4 | CONFIG_NR_DRAM_BANKS=1 |
| 052170c6 | 5 | CONFIG_ENV_OFFSET=0x3F8000 |
| c5a6e9f8 | 6 | CONFIG_SPL_TEXT_BASE=0x00000000 |
| 4d02d206 PT |
7 | CONFIG_ROCKCHIP_RK3368=y |
| 8 | CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 | |
| 9 | CONFIG_TPL_LIBCOMMON_SUPPORT=y | |
| 10 | CONFIG_TPL_LIBGENERIC_SUPPORT=y | |
| 11 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | |
| d168bcb6 | 12 | CONFIG_SPL_STACK_R_ADDR=0x600000 |
| c9542eae | 13 | CONFIG_SPL=y |
| 358b6a20 TR |
14 | CONFIG_DEBUG_UART_BASE=0xFF180000 |
| 15 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| 358b6a20 TR |
16 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 17 | CONFIG_SPL_SPI_SUPPORT=y | |
| f7d0ae9c | 18 | CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion" |
| 4d02d206 PT |
19 | CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" |
| 20 | CONFIG_DEBUG_UART=y | |
| df35f453 | 21 | CONFIG_ANDROID_BOOT_IMAGE=y |
| 4d02d206 PT |
22 | CONFIG_FIT=y |
| 23 | CONFIG_FIT_VERBOSE=y | |
| 24 | CONFIG_SPL_LOAD_FIT=y | |
| c254b29f PT |
25 | CONFIG_BOOTSTAGE=y |
| 26 | CONFIG_SPL_BOOTSTAGE=y | |
| 27 | CONFIG_BOOTSTAGE_REPORT=y | |
| 28 | CONFIG_BOOTSTAGE_FDT=y | |
| a2a5053a | 29 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-lion-haikou.dtb" |
| 4d02d206 | 30 | # CONFIG_DISPLAY_CPUINFO is not set |
| 78eba69d | 31 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 4d02d206 | 32 | CONFIG_ARCH_EARLY_INIT_R=y |
| 4d02d206 PT |
33 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 34 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | |
| 4d02d206 PT |
35 | CONFIG_TPL_SYS_MALLOC_SIMPLE=y |
| 36 | CONFIG_SPL_STACK_R=y | |
| 37 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 | |
| ec4bf3d6 | 38 | CONFIG_SPL_ATF=y |
| 4d02d206 | 39 | CONFIG_TPL=y |
| 4d02d206 | 40 | CONFIG_TPL_DRIVERS_MISC_SUPPORT=y |
| 88663126 | 41 | CONFIG_CMD_GPIO=y |
| 4d02d206 | 42 | CONFIG_CMD_MMC=y |
| c254b29f | 43 | CONFIG_CMD_BOOTSTAGE=y |
| 4d02d206 PT |
44 | CONFIG_CMD_REGULATOR=y |
| 45 | CONFIG_CMD_MTDPARTS=y | |
| 46 | CONFIG_SPL_OF_CONTROL=y | |
| 47 | CONFIG_TPL_OF_CONTROL=y | |
| c254b29f | 48 | CONFIG_OF_LIVE=y |
| 4d02d206 PT |
49 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" |
| 50 | CONFIG_TPL_OF_PLATDATA=y | |
| 5dc4dfd2 | 51 | CONFIG_ENV_IS_IN_MMC=y |
| 8d8ee47e | 52 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 4d02d206 PT |
53 | CONFIG_NET_RANDOM_ETHADDR=y |
| 54 | CONFIG_TPL_DM=y | |
| 55 | CONFIG_REGMAP=y | |
| 56 | CONFIG_SPL_REGMAP=y | |
| 57 | CONFIG_TPL_REGMAP=y | |
| 58 | CONFIG_SYSCON=y | |
| 59 | CONFIG_SPL_SYSCON=y | |
| 60 | CONFIG_TPL_SYSCON=y | |
| 61 | CONFIG_CLK=y | |
| 62 | CONFIG_SPL_CLK=y | |
| 63 | CONFIG_TPL_CLK=y | |
| 64 | CONFIG_ROCKCHIP_GPIO=y | |
| 65 | CONFIG_MMC_DW=y | |
| 66 | CONFIG_MMC_DW_ROCKCHIP=y | |
| f6434a95 | 67 | CONFIG_MTD=y |
| 4d02d206 PT |
68 | CONFIG_SPI_FLASH_MACRONIX=y |
| 69 | CONFIG_SPI_FLASH_WINBOND=y | |
| 70 | CONFIG_PHY_MICREL=y | |
| ed6be4fc | 71 | CONFIG_PHY_MICREL_KSZ90X1=y |
| 4d02d206 PT |
72 | CONFIG_DM_ETH=y |
| 73 | CONFIG_ETH_DESIGNWARE=y | |
| 74 | CONFIG_RGMII=y | |
| 75 | CONFIG_GMAC_ROCKCHIP=y | |
| 76 | CONFIG_PINCTRL=y | |
| 77 | CONFIG_SPL_PINCTRL=y | |
| 4d02d206 PT |
78 | CONFIG_DM_PMIC=y |
| 79 | CONFIG_PMIC_RK8XX=y | |
| 80 | CONFIG_DM_REGULATOR_FIXED=y | |
| 81 | CONFIG_RAM=y | |
| 82 | CONFIG_SPL_RAM=y | |
| 83 | CONFIG_TPL_RAM=y | |
| 4d02d206 PT |
84 | CONFIG_DEBUG_UART_SHIFT=2 |
| 85 | CONFIG_DEBUG_UART_ANNOUNCE=y | |
| 86 | CONFIG_DEBUG_UART_SKIP_INIT=y | |
| 87 | CONFIG_ROCKCHIP_SPI=y | |
| 88 | CONFIG_SYSRESET=y | |
| 4d02d206 PT |
89 | CONFIG_SPL_TINY_MEMSET=y |
| 90 | CONFIG_LZO=y | |
| 91 | CONFIG_ERRNO_STR=y | |
| 92 | CONFIG_SMBIOS_MANUFACTURER="rockchip" |