[J-u-boot.git] / drivers / fpga / Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2008
# Wolfgang Denk, DENX Software Engineering, [email protected].

obj-y += fpga.o
obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
obj-$(CONFIG_FPGA_XILINX) += xilinx.o
obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
ifdef CONFIG_FPGA_ALTERA
obj-y += altera.o
obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o
obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o
endif
Commit	Line	Data
83d290c5	1	# SPDX-License-Identifier: GPL-2.0+
c8aa7dfc JCPV	2	#
	3	# (C) Copyright 2008
	4	# Wolfgang Denk, DENX Software Engineering, [email protected].
c8aa7dfc	5
710f1d3d MY	6	obj-y += fpga.o
	7	obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
	8	obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
	9	obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
	10	obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
6b245014	11	obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
710f1d3d MY	12	obj-$(CONFIG_FPGA_XILINX) += xilinx.o
710f1d3d MY	13	obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
c8aa7dfc	14	ifdef CONFIG_FPGA_ALTERA
710f1d3d MY	15	obj-y += altera.o
	16	obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
	17	obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
	18	obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
ff9c4c53	19	obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
c41e660b	20	obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o
230fe9b2	21	obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
6867e19a	22	obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
2baa9972	23	obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o
c8aa7dfc	24	endif