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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, [email protected].
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
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31In general, all boards for which a default configuration file exists in the
32configs/ directory have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
0c4759fb 35In case of problems you can use
c609719b 36
0c4759fb 37 scripts/get_maintainer.pl <path>
adb9d851 38
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39to identify the people or companies responsible for various boards and
40subsystems. Or have a look at the git log.
adb9d851 41
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42
43Where to get help:
44==================
45
24ee89b9 46In case you have questions about, problems with or contributions for
7207b366 47U-Boot, you should send a message to the U-Boot mailing list at
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48<[email protected]>. There is also an archive of previous traffic
49on the mailing list - please search the archive before asking FAQ's.
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50Please see https://lists.denx.de/pipermail/u-boot and
51https://marc.info/?l=u-boot
c609719b 52
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53Where to get source code:
54=========================
55
7207b366 56The U-Boot source code is maintained in the Git repository at
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57https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
58https://source.denx.de/u-boot/u-boot
218ca724 59
c4bd51e2 60The "Tags" links on this page allow you to download tarballs of
11ccc33f 61any version you might be interested in. Official releases are also
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62available from the DENX file server through HTTPS or FTP.
63https://ftp.denx.de/pub/u-boot/
64ftp://ftp.denx.de/pub/u-boot/
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65
66
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67Where we come from:
68===================
69
70- start from 8xxrom sources
047f6ec0 71- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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72- clean up code
73- make it easier to add custom boards
74- make it possible to add other [PowerPC] CPUs
75- extend functions, especially:
76 * Provide extended interface to Linux boot loader
77 * S-Record download
78 * network boot
9e5616de 79 * ATA disk / SCSI ... boot
047f6ec0 80- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 81- add other CPU families (starting with ARM)
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82- create U-Boot project (https://sourceforge.net/projects/u-boot)
83- current project page: see https://www.denx.de/wiki/U-Boot
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84
85
86Names and Spelling:
87===================
88
89The "official" name of this project is "Das U-Boot". The spelling
90"U-Boot" shall be used in all written text (documentation, comments
91in source files etc.). Example:
92
93 This is the README file for the U-Boot project.
94
95File names etc. shall be based on the string "u-boot". Examples:
96
97 include/asm-ppc/u-boot.h
98
99 #include <asm/u-boot.h>
100
101Variable names, preprocessor constants etc. shall be either based on
102the string "u_boot" or on "U_BOOT". Example:
103
104 U_BOOT_VERSION u_boot_logo
105 IH_OS_U_BOOT u_boot_hush_start
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106
107
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108Software Configuration:
109=======================
110
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111Selection of Processor Architecture and Board Type:
112---------------------------------------------------
113
114For all supported boards there are ready-to-use default
ab584d67 115configurations available; just type "make <board_name>_defconfig".
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116
117Example: For a TQM823L module type:
118
119 cd u-boot
ab584d67 120 make TQM823L_defconfig
c609719b 121
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122Note: If you're looking for the default configuration file for a board
123you're sure used to be there but is now missing, check the file
124doc/README.scrapyard for a list of no longer supported boards.
c609719b 125
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126Sandbox Environment:
127--------------------
128
129U-Boot can be built natively to run on a Linux host using the 'sandbox'
130board. This allows feature development which is not board- or architecture-
131specific to be undertaken on a native platform. The sandbox is also used to
132run some of U-Boot's tests.
133
cf69dc74 134See doc/arch/sandbox/sandbox.rst for more details.
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135
136
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137Board Initialisation Flow:
138--------------------------
139
140This is the intended start-up flow for boards. This should apply for both
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141SPL and U-Boot proper (i.e. they both follow the same rules).
142
143Note: "SPL" stands for "Secondary Program Loader," which is explained in
144more detail later in this file.
145
146At present, SPL mostly uses a separate code path, but the function names
147and roles of each function are the same. Some boards or architectures
148may not conform to this. At least most ARM boards which use
149CONFIG_SPL_FRAMEWORK conform to this.
150
151Execution typically starts with an architecture-specific (and possibly
152CPU-specific) start.S file, such as:
153
154 - arch/arm/cpu/armv7/start.S
155 - arch/powerpc/cpu/mpc83xx/start.S
156 - arch/mips/cpu/start.S
db910353 157
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158and so on. From there, three functions are called; the purpose and
159limitations of each of these functions are described below.
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160
161lowlevel_init():
162 - purpose: essential init to permit execution to reach board_init_f()
163 - no global_data or BSS
164 - there is no stack (ARMv7 may have one but it will soon be removed)
165 - must not set up SDRAM or use console
166 - must only do the bare minimum to allow execution to continue to
167 board_init_f()
168 - this is almost never needed
169 - return normally from this function
170
171board_init_f():
172 - purpose: set up the machine ready for running board_init_r():
173 i.e. SDRAM and serial UART
174 - global_data is available
175 - stack is in SRAM
176 - BSS is not available, so you cannot use global/static variables,
177 only stack variables and global_data
178
179 Non-SPL-specific notes:
180 - dram_init() is called to set up DRAM. If already done in SPL this
181 can do nothing
182
183 SPL-specific notes:
184 - you can override the entire board_init_f() function with your own
185 version as needed.
186 - preloader_console_init() can be called here in extremis
187 - should set up SDRAM, and anything needed to make the UART work
499696e4 188 - there is no need to clear BSS, it will be done by crt0.S
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189 - for specific scenarios on certain architectures an early BSS *can*
190 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
191 of BSS prior to entering board_init_f()) but doing so is discouraged.
192 Instead it is strongly recommended to architect any code changes
193 or additions such to not depend on the availability of BSS during
194 board_init_f() as indicated in other sections of this README to
195 maintain compatibility and consistency across the entire code base.
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196 - must return normally from this function (don't call board_init_r()
197 directly)
198
199Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
200this point the stack and global_data are relocated to below
201CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
202memory.
203
204board_init_r():
205 - purpose: main execution, common code
206 - global_data is available
207 - SDRAM is available
208 - BSS is available, all static/global variables can be used
209 - execution eventually continues to main_loop()
210
211 Non-SPL-specific notes:
212 - U-Boot is relocated to the top of memory and is now running from
213 there.
214
215 SPL-specific notes:
216 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
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217 CONFIG_SYS_FSL_HAS_CCI400
218
219 Defined For SoC that has cache coherent interconnect
220 CCN-400
7f6c2cbc 221
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222 CONFIG_SYS_FSL_HAS_CCN504
223
224 Defined for SoC that has cache coherent interconnect CCN-504
225
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226The following options need to be configured:
227
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228- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
229
230- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 231
66412c63 232- 85xx CPU Options:
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233 CONFIG_SYS_PPC64
234
235 Specifies that the core is a 64-bit PowerPC implementation (implements
236 the "64" category of the Power ISA). This is necessary for ePAPR
237 compliance, among other possible reasons.
238
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239 CONFIG_SYS_FSL_ERRATUM_A004510
240
241 Enables a workaround for erratum A004510. If set,
242 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
6cc04547 243 CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
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244
245 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
246 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
247
248 Defines one or two SoC revisions (low 8 bits of SVR)
249 for which the A004510 workaround should be applied.
250
251 The rest of SVR is either not relevant to the decision
252 of whether the erratum is present (e.g. p2040 versus
253 p2041) or is implied by the build target, which controls
254 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
255
256 See Freescale App Note 4493 for more information about
257 this erratum.
258
6cc04547 259 CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
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260
261 This is the value to write into CCSR offset 0x18600
262 according to the A004510 workaround.
263
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264 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
265 Single Source Clock is clocking mode present in some of FSL SoC's.
266 In this mode, a single differential clock is used to supply
267 clocks to the sysclock, ddrclock and usbclock.
268
6cb461b4 269- Generic CPU options:
6cb461b4 270
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271 CONFIG_SYS_FSL_DDR
272 Freescale DDR driver in use. This type of DDR controller is
1c58857a 273 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
5614e71b 274
6cc04547 275 CFG_SYS_FSL_DDR_ADDR
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276 Freescale DDR memory-mapped register base.
277
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278 CONFIG_SYS_FSL_IFC_CLK_DIV
279 Defines divider of platform clock(clock input to IFC controller).
280
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281 CONFIG_SYS_FSL_LBC_CLK_DIV
282 Defines divider of platform clock(clock input to eLBC controller).
283
6cc04547 284 CFG_SYS_FSL_DDR_SDRAM_BASE_PHY
6b9e309a 285 Physical address from the view of DDR controllers. It is the
65cc0e2a 286 same as CFG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
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287 it could be different for ARM SoCs.
288
b67d8816 289- ARM options:
65cc0e2a 290 CFG_SYS_EXCEPTION_VECTORS_HIGH
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291
292 Select high exception vectors of the ARM core, e.g., do not
293 clear the V bit of the c1 register of CP15.
294
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295 COUNTER_FREQUENCY
296 Generic timer clock source frequency.
297
298 COUNTER_FREQUENCY_REAL
299 Generic timer clock source frequency if the real clock is
300 different from COUNTER_FREQUENCY, and can only be determined
301 at run time.
302
5da627a4 303- Linux Kernel Interface:
fec6d9ee 304 CONFIG_OF_LIBFDT
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305
306 New kernel versions are expecting firmware settings to be
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307 passed using flattened device trees (based on open firmware
308 concepts).
309
310 CONFIG_OF_LIBFDT
311 * New libfdt-based support
312 * Adds the "fdt" command
3bb342fc 313 * The bootm command automatically updates the fdt
213bf8c8 314
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315 OF_TBCLK - The timebase frequency.
316
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317 boards with QUICC Engines require OF_QE to set UCC MAC
318 addresses
3bb342fc 319
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320 CONFIG_OF_IDE_FIXUP
321
322 U-Boot can detect if an IDE device is present or not.
323 If not, and this new config option is activated, U-Boot
324 removes the ATA node from the DTS before booting Linux,
325 so the Linux IDE driver does not probe the device and
326 crash. This is needed for buggy hardware (uc101) where
327 no pull down resistor is connected to the signal IDE5V_DD7.
328
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329- vxWorks boot parameters:
330
331 bootvx constructs a valid bootline using the following
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332 environments variables: bootdev, bootfile, ipaddr, netmask,
333 serverip, gatewayip, hostname, othbootargs.
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334 It loads the vxWorks image pointed bootfile.
335
81a05d9b 336 Note: If a "bootargs" environment is defined, it will override
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337 the defaults discussed just above.
338
93bc2193 339- Cache Configuration for ARM:
65cc0e2a 340 CFG_SYS_PL310_BASE - Physical base address of PL310
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341 controller register space
342
6705d81e 343- Serial Ports:
f410d0ac 344 CFG_PL011_CLOCK
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345
346 If you have Amba PrimeCell PL011 UARTs, set this variable to
347 the clock speed of the UARTs.
348
b861574b 349 CFG_PL01x_PORTS
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350
351 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
352 define this to a list of base addresses for each (supported)
353 port. See e.g. include/configs/versatile.h
354
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355 CONFIG_SERIAL_HW_FLOW_CONTROL
356
357 Define this variable to enable hw flow control in serial driver.
358 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 359
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360- Removal of commands
361 If no commands are needed to boot, you can disable
362 CONFIG_CMDLINE to remove them. In this case, the command line
363 will not be available, and when U-Boot wants to execute the
364 boot command (on start-up) it will call board_run_command()
365 instead. This can reduce image size significantly for very
366 simple boot procedures.
367
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368- Regular expression support:
369 CONFIG_REGEX
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370 If this variable is defined, U-Boot is linked against
371 the SLRE (Super Light Regular Expression) library,
372 which adds regex support to some commands, as for
373 example "env grep" and "setexpr".
a5ecbe62 374
c609719b 375- Watchdog:
6e7df1d1 376 CFG_SYS_WATCHDOG_FREQ
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377 Some platforms automatically call WATCHDOG_RESET()
378 from the timer interrupt handler every
6e7df1d1 379 CFG_SYS_WATCHDOG_FREQ interrupts. If not set by the
933ada56 380 board configuration file, a default of CONFIG_SYS_HZ/2
6e7df1d1 381 (i.e. 500) is used. Setting CFG_SYS_WATCHDOG_FREQ
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382 to 0 disables calling WATCHDOG_RESET() from the timer
383 interrupt.
384
e92739d3 385- GPIO Support:
65cc0e2a 386 The CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of
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387 chip-ngpio pairs that tell the PCA953X driver the number of
388 pins supported by a particular chip.
389
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390 Note that if the GPIO device uses I2C, then the I2C interface
391 must also be configured. See I2C Support, below.
392
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393- I/O tracing:
394 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
395 accesses and can checksum them or write a list of them out
396 to memory. See the 'iotrace' command for details. This is
397 useful for testing device drivers since it can confirm that
398 the driver behaves the same way before and after a code
399 change. Currently this is supported on sandbox and arm. To
400 add support for your architecture, add '#include <iotrace.h>'
401 to the bottom of arch/<arch>/include/asm/io.h and test.
402
403 Example output from the 'iotrace stats' command is below.
404 Note that if the trace buffer is exhausted, the checksum will
405 still continue to operate.
406
407 iotrace is enabled
408 Start: 10000000 (buffer start address)
409 Size: 00010000 (buffer size)
410 Offset: 00000120 (current buffer offset)
411 Output: 10000120 (start + offset)
412 Count: 00000018 (number of trace records)
413 CRC32: 9526fb66 (CRC32 of all trace records)
414
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415- Timestamp Support:
416
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417 When CONFIG_TIMESTAMP is selected, the timestamp
418 (date and time) of an image is printed by image
419 commands like bootm or iminfo. This option is
602ad3b3 420 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 421
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422- Partition Labels (disklabels) Supported:
423 Zero or more of the following:
424 CONFIG_MAC_PARTITION Apple's MacOS partition table.
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425 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
426 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
427 bootloader. Note 2TB partition limit; see
428 disk/part_efi.c
c649e3c9 429 CONFIG_SCSI) you must configure support for at
923c46f9 430 least one non-MTD partition type as well.
c609719b 431
c609719b 432- NETWORK Support (PCI):
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433 CONFIG_E1000_SPI
434 Utility code for direct access to the SPI bus on Intel 8257x.
435 This does not do anything useful unless you set at least one
436 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
437
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438 CONFIG_NATSEMI
439 Support for National dp83815 chips.
440
441 CONFIG_NS8382X
442 Support for National dp8382[01] gigabit chips.
443
45219c46 444- NETWORK Support (other):
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445 CONFIG_CALXEDA_XGMAC
446 Support for the Calxeda XGMAC device
447
3bb46d23 448 CONFIG_LAN91C96
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449 Support for SMSC's LAN91C96 chips.
450
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451 CONFIG_LAN91C96_USE_32_BIT
452 Define this to enable 32 bit addressing
453
6e7df1d1 454 CFG_SYS_DAVINCI_EMAC_PHY_COUNT
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455 Define this if you have more then 3 PHYs.
456
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457 CONFIG_FTGMAC100
458 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
459
460 CONFIG_FTGMAC100_EGIGA
461 Define this to use GE link update with gigabit PHY.
462 Define this if FTGMAC100 is connected to gigabit PHY.
463 If your system has 10/100 PHY only, it might not occur
464 wrong behavior. Because PHY usually return timeout or
465 useless data when polling gigabit status and gigabit
466 control registers. This behavior won't affect the
467 correctnessof 10/100 link speed update.
468
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469 CONFIG_SH_ETHER
470 Support for Renesas on-chip Ethernet controller
471
97148cb6 472 CFG_SH_ETHER_USE_PORT
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473 Define the number of ports to be used
474
7c480bab 475 CFG_SH_ETHER_PHY_ADDR
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476 Define the ETH PHY's address
477
ff53ecc3 478 CFG_SH_ETHER_CACHE_WRITEBACK
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479 If this option is set, the driver enables cache flush.
480
5e124724 481- TPM Support:
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482 CONFIG_TPM
483 Support TPM devices.
484
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485 CONFIG_TPM_TIS_INFINEON
486 Support for Infineon i2c bus TPM devices. Only one device
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487 per system is supported at this time.
488
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489 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
490 Define the burst count bytes upper limit
491
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492 CONFIG_TPM_ST33ZP24
493 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
494
495 CONFIG_TPM_ST33ZP24_I2C
496 Support for STMicroelectronics ST33ZP24 I2C devices.
497 Requires TPM_ST33ZP24 and I2C.
498
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499 CONFIG_TPM_ST33ZP24_SPI
500 Support for STMicroelectronics ST33ZP24 SPI devices.
501 Requires TPM_ST33ZP24 and SPI.
502
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503 CONFIG_TPM_ATMEL_TWI
504 Support for Atmel TWI TPM device. Requires I2C support.
505
90899cc0 506 CONFIG_TPM_TIS_LPC
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507 Support for generic parallel port TPM devices. Only one device
508 per system is supported at this time.
509
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510 CONFIG_TPM
511 Define this to enable the TPM support library which provides
512 functional interfaces to some TPM commands.
513 Requires support for a TPM device.
514
515 CONFIG_TPM_AUTH_SESSIONS
516 Define this to enable authorized functions in the TPM library.
517 Requires CONFIG_TPM and CONFIG_SHA1.
518
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519- USB Support:
520 At the moment only the UHCI host controller is
064b55cf 521 supported (PIP405, MIP405); define
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522 CONFIG_USB_UHCI to enable it.
523 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 524 and define CONFIG_USB_STORAGE to enable the USB
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525 storage devices.
526 Note:
527 Supported are USB Keyboards and USB Floppy drives
528 (TEAC FD-05PUB).
4d13cbad 529
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530 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
531 HW module registers.
532
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533- USB Device:
534 Define the below if you wish to use the USB console.
535 Once firmware is rebuilt from a serial console issue the
536 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 537 attach your USB cable. The Unix command "dmesg" should print
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538 it has found a new device. The environment variable usbtty
539 can be set to gserial or cdc_acm to enable your device to
386eda02 540 appear to a USB host as a Linux gserial device or a
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541 Common Device Class Abstract Control Model serial device.
542 If you select usbtty = gserial you should be able to enumerate
543 a Linux host by
544 # modprobe usbserial vendor=0xVendorID product=0xProductID
545 else if using cdc_acm, simply setting the environment
546 variable usbtty to be cdc_acm should suffice. The following
547 might be defined in YourBoardName.h
386eda02 548
386eda02 549 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 550 define your own vendor specific values either in BoardName.h
386eda02 551 or directly in usbd_vendor_info.h. If you don't define
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552 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
553 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
554 should pretend to be a Linux device to it's target host.
555
556 CONFIG_USBD_MANUFACTURER
557 Define this string as the name of your company for
558 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 559
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560 CONFIG_USBD_PRODUCT_NAME
561 Define this string as the name of your product
562 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
563
564 CONFIG_USBD_VENDORID
565 Define this as your assigned Vendor ID from the USB
566 Implementors Forum. This *must* be a genuine Vendor ID
567 to avoid polluting the USB namespace.
568 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 569
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570 CONFIG_USBD_PRODUCTID
571 Define this as the unique Product ID
572 for your device
573 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 574
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575- ULPI Layer Support:
576 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
577 the generic ULPI layer. The generic layer accesses the ULPI PHY
578 via the platform viewport, so you need both the genric layer and
579 the viewport enabled. Currently only Chipidea/ARC based
580 viewport is supported.
581 To enable the ULPI layer support, define CONFIG_USB_ULPI and
582 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0 583 If your ULPI phy needs a different reference clock than the
6e7df1d1 584 standard 24 MHz then you have to define CFG_ULPI_REF_CLK to
6d365ea0 585 the appropriate value in Hz.
c609719b 586
71f95118 587- MMC Support:
afb35666
YS
588 CONFIG_SH_MMCIF
589 Support for Renesas on-chip MMCIF controller
590
591 CONFIG_SH_MMCIF_ADDR
592 Define the base address of MMCIF registers
593
594 CONFIG_SH_MMCIF_CLK
595 Define the clock frequency for MMCIF
596
b3ba6e94 597- USB Device Firmware Update (DFU) class support:
bb4059a5 598 CONFIG_DFU_OVER_USB
b3ba6e94
TR
599 This enables the USB portion of the DFU USB class
600
c6631764
PA
601 CONFIG_DFU_NAND
602 This enables support for exposing NAND devices via DFU.
603
a9479f04
AM
604 CONFIG_DFU_RAM
605 This enables support for exposing RAM via DFU.
606 Note: DFU spec refer to non-volatile memory usage, but
607 allow usages beyond the scope of spec - here RAM usage,
608 one that would help mostly the developer.
609
e7e75c70
HS
610 CONFIG_SYS_DFU_DATA_BUF_SIZE
611 Dfu transfer uses a buffer before writing data to the
612 raw storage device. Make the size (in bytes) of this buffer
613 configurable. The size of this buffer is also configurable
614 through the "dfu_bufsiz" environment variable.
615
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PA
616 CONFIG_SYS_DFU_MAX_FILE_SIZE
617 When updating files rather than the raw storage device,
618 we use a static buffer to copy the file into and then write
619 the buffer once we've been given the whole file. Define
620 this to the maximum filesize (in bytes) for the buffer.
621 Default is 4 MiB if undefined.
622
001a8319
HS
623 DFU_DEFAULT_POLL_TIMEOUT
624 Poll timeout [ms], is the timeout a device can send to the
625 host. The host must wait for this timeout before sending
626 a subsequent DFU_GET_STATUS request to the device.
627
628 DFU_MANIFEST_POLL_TIMEOUT
629 Poll timeout [ms], which the device sends to the host when
630 entering dfuMANIFEST state. Host waits this timeout, before
631 sending again an USB request to the device.
632
c609719b 633- Keyboard Support:
39f615ed
SG
634 See Kconfig help for available keyboard drivers.
635
17ea1177 636- MII/PHY support:
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WD
637 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
638
639 The clock frequency of the MII bus
640
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641 CONFIG_PHY_CMD_DELAY (ppc4xx)
642
643 Some PHY like Intel LXT971A need extra delay after
644 command issued before MII status register can be read
645
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646- BOOTP Recovery Mode:
647 CONFIG_BOOTP_RANDOM_DELAY
648
649 If you have many targets in a network that try to
650 boot using BOOTP, you may want to avoid that all
651 systems send out BOOTP requests at precisely the same
652 moment (which would happen for instance at recovery
653 from a power failure, when all systems will try to
654 boot, thus flooding the BOOTP server. Defining
655 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
656 inserted before sending out BOOTP requests. The
6c33c785 657 following delays are inserted then:
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658
659 1st BOOTP request: delay 0 ... 1 sec
660 2nd BOOTP request: delay 0 ... 2 sec
661 3rd BOOTP request: delay 0 ... 4 sec
662 4th and following
663 BOOTP requests: delay 0 ... 8 sec
664
6e7df1d1 665 CFG_BOOTP_ID_CACHE_SIZE
92ac8acc
TR
666
667 BOOTP packets are uniquely identified using a 32-bit ID. The
668 server will copy the ID from client requests to responses and
669 U-Boot will use this to determine if it is the destination of
670 an incoming response. Some servers will check that addresses
671 aren't in use before handing them out (usually using an ARP
672 ping) and therefore take up to a few hundred milliseconds to
673 respond. Network congestion may also influence the time it
674 takes for a response to make it back to the client. If that
675 time is too long, U-Boot will retransmit requests. In order
676 to allow earlier responses to still be accepted after these
677 retransmissions, U-Boot's BOOTP client keeps a small cache of
6e7df1d1 678 IDs. The CFG_BOOTP_ID_CACHE_SIZE controls the size of this
92ac8acc
TR
679 cache. The default is to keep IDs for up to four outstanding
680 requests. Increasing this will allow U-Boot to accept offers
681 from a BOOTP client in networks with unusually high latency.
682
fe389a82 683- DHCP Advanced Options:
2c00e099 684
d22c338e
JH
685 - Link-local IP address negotiation:
686 Negotiate with other link-local clients on the local network
687 for an address that doesn't require explicit configuration.
688 This is especially useful if a DHCP server cannot be guaranteed
689 to exist in all environments that the device must operate.
690
691 See doc/README.link-local for more information.
692
24acb83d
PK
693 - MAC address from environment variables
694
695 FDT_SEQ_MACADDR_FROM_ENV
696
697 Fix-up device tree with MAC addresses fetched sequentially from
698 environment variables. This config work on assumption that
699 non-usable ethernet node of device-tree are either not present
700 or their status has been marked as "disabled".
701
a3d991bd 702 - CDP Options:
6e592385 703 CONFIG_CDP_DEVICE_ID
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704
705 The device id used in CDP trigger frames.
706
707 CONFIG_CDP_DEVICE_ID_PREFIX
708
709 A two character string which is prefixed to the MAC address
710 of the device.
711
712 CONFIG_CDP_PORT_ID
713
714 A printf format string which contains the ascii name of
715 the port. Normally is set to "eth%d" which sets
11ccc33f 716 eth0 for the first Ethernet, eth1 for the second etc.
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717
718 CONFIG_CDP_CAPABILITIES
719
720 A 32bit integer which indicates the device capabilities;
721 0x00000010 for a normal host which does not forwards.
722
723 CONFIG_CDP_VERSION
724
725 An ascii string containing the version of the software.
726
727 CONFIG_CDP_PLATFORM
728
729 An ascii string containing the name of the platform.
730
731 CONFIG_CDP_TRIGGER
732
733 A 32bit integer sent on the trigger.
734
735 CONFIG_CDP_POWER_CONSUMPTION
736
737 A 16bit integer containing the power consumption of the
738 device in .1 of milliwatts.
739
740 CONFIG_CDP_APPLIANCE_VLAN_TYPE
741
742 A byte containing the id of the VLAN.
743
79267edd 744- Status LED: CONFIG_LED_STATUS
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745
746 Several configurations allow to display the current
747 status using a LED. For instance, the LED will blink
748 fast while running U-Boot code, stop blinking as
749 soon as a reply to a BOOTP request was received, and
750 start blinking slow once the Linux kernel is running
751 (supported by a status LED driver in the Linux
79267edd 752 kernel). Defining CONFIG_LED_STATUS enables this
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753 feature in U-Boot.
754
1df7bbba
IG
755 Additional options:
756
79267edd 757 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
758 The status LED can be connected to a GPIO pin.
759 In such cases, the gpio_led driver can be used as a
79267edd 760 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
761 to include the gpio_led driver in the U-Boot binary.
762
6e7df1d1 763 CFG_GPIO_LED_INVERTED_TABLE
9dfdcdfe
IG
764 Some GPIO connected LEDs may have inverted polarity in which
765 case the GPIO high value corresponds to LED off state and
766 GPIO low value corresponds to LED on state.
6e7df1d1 767 In such cases CFG_GPIO_LED_INVERTED_TABLE may be defined
9dfdcdfe
IG
768 with a list of GPIO LEDs that have inverted polarity.
769
55dabcc8 770- I2C Support:
cdc5ed8f 771 CFG_SYS_NUM_I2C_BUSES
945a18e6 772 Hold the number of i2c buses you want to use.
3f4978c7 773
d8964b3e 774 CFG_SYS_I2C_DIRECT_BUS
3f4978c7 775 define this, if you don't use i2c muxes on your hardware.
65cc0e2a 776 if CFG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
3f4978c7
HS
777 omit this define.
778
65cc0e2a 779 CFG_SYS_I2C_MAX_HOPS
3f4978c7
HS
780 define how many muxes are maximal consecutively connected
781 on one i2c bus. If you not use i2c muxes, omit this
782 define.
783
65cc0e2a 784 CFG_SYS_I2C_BUSES
b445bbb4 785 hold a list of buses you want to use, only used if
d8964b3e 786 CFG_SYS_I2C_DIRECT_BUS is not defined, for example
65cc0e2a 787 a board with CFG_SYS_I2C_MAX_HOPS = 1 and
cdc5ed8f 788 CFG_SYS_NUM_I2C_BUSES = 9:
3f4978c7 789
65cc0e2a 790 CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
3f4978c7
HS
791 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
792 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
793 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
794 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
795 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
796 {1, {I2C_NULL_HOP}}, \
797 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
798 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
799 }
800
801 which defines
802 bus 0 on adapter 0 without a mux
ea818dbb
HS
803 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
804 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
805 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
806 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
807 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 808 bus 6 on adapter 1 without a mux
ea818dbb
HS
809 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
810 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
811
812 If you do not have i2c muxes on your board, omit this define.
813
ce3b5d69 814- Legacy I2C Support:
ea818dbb 815 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
816 then the following macros need to be defined (examples are
817 from include/configs/lwmon.h):
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WD
818
819 I2C_INIT
820
b37c7e5e 821 (Optional). Any commands necessary to enable the I2C
43d9616c 822 controller or configure ports.
c609719b 823
ba56f625 824 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 825
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WD
826 I2C_ACTIVE
827
828 The code necessary to make the I2C data line active
829 (driven). If the data line is open collector, this
830 define can be null.
831
b37c7e5e
WD
832 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
833
c609719b
WD
834 I2C_TRISTATE
835
836 The code necessary to make the I2C data line tri-stated
837 (inactive). If the data line is open collector, this
838 define can be null.
839
b37c7e5e
WD
840 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
841
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WD
842 I2C_READ
843
472d5460
YS
844 Code that returns true if the I2C data line is high,
845 false if it is low.
c609719b 846
b37c7e5e
WD
847 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
848
c609719b
WD
849 I2C_SDA(bit)
850
472d5460
YS
851 If <bit> is true, sets the I2C data line high. If it
852 is false, it clears it (low).
c609719b 853
b37c7e5e 854 eg: #define I2C_SDA(bit) \
2535d602 855 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 856 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 857
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WD
858 I2C_SCL(bit)
859
472d5460
YS
860 If <bit> is true, sets the I2C clock line high. If it
861 is false, it clears it (low).
c609719b 862
b37c7e5e 863 eg: #define I2C_SCL(bit) \
2535d602 864 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 865 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 866
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WD
867 I2C_DELAY
868
869 This delay is invoked four times per clock cycle so this
870 controls the rate of data transfer. The data rate thus
b37c7e5e 871 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
872 like:
873
b37c7e5e 874 #define I2C_DELAY udelay(2)
c609719b 875
793b5726
MF
876 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
877
878 If your arch supports the generic GPIO framework (asm/gpio.h),
879 then you may alternatively define the two GPIOs that are to be
880 used as SCL / SDA. Any of the previous I2C_xxx macros will
881 have GPIO-based defaults assigned to them as appropriate.
882
883 You should define these to the GPIO value as given directly to
884 the generic GPIO functions.
885
e06b9b8d 886 CFG_I2C_MULTI_BUS
bb99ad6d
BW
887
888 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
889 must have a controller. At any point in time, only one bus is
890 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
891 Note that bus numbering is zero-based.
892
65cc0e2a 893 CFG_SYS_I2C_NOPROBES
bb99ad6d
BW
894
895 This option specifies a list of I2C devices that will be skipped
1353b25e 896 when the 'i2c probe' command is issued.
bb99ad6d
BW
897
898 e.g.
65cc0e2a 899 #define CFG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
900
901 will skip addresses 0x50 and 0x68 on a board with one I2C bus
902
65cc0e2a 903 CFG_SYS_RTC_BUS_NUM
0dc018ec
SR
904
905 If defined, then this indicates the I2C bus number for the RTC.
906 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
907
2ac6985a
AD
908 CONFIG_SOFT_I2C_READ_REPEATED_START
909
910 defining this will force the i2c_read() function in
911 the soft_i2c driver to perform an I2C repeated start
912 between writing the address pointer and reading the
913 data. If this define is omitted the default behaviour
914 of doing a stop-start sequence will be used. Most I2C
915 devices can use either method, but some require one or
916 the other.
be5e6181 917
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WD
918- SPI Support: CONFIG_SPI
919
920 Enables SPI driver (so far only tested with
921 SPI EEPROM, also an instance works with Crystal A/D and
922 D/As on the SACSng board)
923
6e7df1d1 924 CFG_SYS_SPI_MXC_WAIT
f659b573
HS
925 Timeout for waiting until spi transfer completed.
926 default: (CONFIG_SYS_HZ/100) /* 10 ms */
927
0133502e 928- FPGA Support: CONFIG_FPGA
c609719b 929
0133502e
MF
930 Enables FPGA subsystem.
931
932 CONFIG_FPGA_<vendor>
933
934 Enables support for specific chip vendors.
935 (ALTERA, XILINX)
c609719b 936
0133502e 937 CONFIG_FPGA_<family>
c609719b 938
0133502e
MF
939 Enables support for FPGA family.
940 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
941
6d0f6bcf 942 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 943
43d9616c
WD
944 Enable checks on FPGA configuration interface busy
945 status by the configuration function. This option
946 will require a board or device specific function to
947 be written.
c609719b 948
72fc2645 949 CFG_FPGA_DELAY
c609719b
WD
950
951 If defined, a function that provides delays in the FPGA
952 configuration driver.
953
6e7df1d1 954 CFG_SYS_FPGA_CHECK_ERROR
c609719b 955
43d9616c
WD
956 Check for configuration errors during FPGA bitfile
957 loading. For example, abort during Virtex II
958 configuration if the INIT_B line goes low (which
959 indicated a CRC error).
c609719b 960
65cc0e2a 961 CFG_SYS_FPGA_WAIT_INIT
c609719b 962
b445bbb4
JM
963 Maximum time to wait for the INIT_B line to de-assert
964 after PROB_B has been de-asserted during a Virtex II
43d9616c 965 FPGA configuration sequence. The default time is 500
11ccc33f 966 ms.
c609719b 967
65cc0e2a 968 CFG_SYS_FPGA_WAIT_BUSY
c609719b 969
b445bbb4 970 Maximum time to wait for BUSY to de-assert during
11ccc33f 971 Virtex II FPGA configuration. The default is 5 ms.
c609719b 972
65cc0e2a 973 CFG_SYS_FPGA_WAIT_CONFIG
c609719b 974
43d9616c 975 Time to wait after FPGA configuration. The default is
11ccc33f 976 200 ms.
c609719b 977
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WD
978- Vendor Parameter Protection:
979
43d9616c
WD
980 U-Boot considers the values of the environment
981 variables "serial#" (Board Serial Number) and
7152b1d0 982 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
983 are set once by the board vendor / manufacturer, and
984 protects these variables from casual modification by
985 the user. Once set, these variables are read-only,
986 and write or delete attempts are rejected. You can
11ccc33f 987 change this behaviour:
c609719b
WD
988
989 If CONFIG_ENV_OVERWRITE is #defined in your config
990 file, the write protection for vendor parameters is
47cd00fa 991 completely disabled. Anybody can change or delete
c609719b
WD
992 these parameters.
993
2598090b
JH
994 The same can be accomplished in a more flexible way
995 for any variable by configuring the type of access
996 to allow for those variables in the ".flags" variable
acf29d8c 997 or define CFG_ENV_FLAGS_LIST_STATIC.
2598090b 998
c609719b 999- Protected RAM:
7c5c137c 1000 CFG_PRAM
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WD
1001
1002 Define this variable to enable the reservation of
1003 "protected RAM", i. e. RAM which is not overwritten
7c5c137c 1004 by U-Boot. Define CFG_PRAM to hold the number of
c609719b
WD
1005 kB you want to reserve for pRAM. You can overwrite
1006 this default value by defining an environment
1007 variable "pram" to the number of kB you want to
1008 reserve. Note that the board info structure will
1009 still show the full amount of RAM. If pRAM is
1010 reserved, a new environment variable "mem" will
1011 automatically be defined to hold the amount of
1012 remaining RAM in a form that can be passed as boot
1013 argument to Linux, for instance like that:
1014
fe126d8b 1015 setenv bootargs ... mem=\${mem}
c609719b
WD
1016 saveenv
1017
1018 This way you can tell Linux not to use this memory,
1019 either, which results in a memory region that will
1020 not be affected by reboots.
1021
1022 *WARNING* If your board configuration uses automatic
1023 detection of the RAM size, you must make sure that
1024 this memory test is non-destructive. So far, the
1025 following board configurations are known to be
1026 "pRAM-clean":
1027
5b8e76c3 1028 IVMS8, IVML24, SPD8xx,
1b0757ec 1029 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1030 FLAGADM
c609719b
WD
1031
1032- Error Recovery:
c609719b
WD
1033 Note:
1034
8bde7f77
WD
1035 In the current implementation, the local variables
1036 space and global environment variables space are
1037 separated. Local variables are those you define by
1038 simply typing `name=value'. To access a local
1039 variable later on, you have write `$name' or
1040 `${name}'; to execute the contents of a variable
1041 directly type `$name' at the command prompt.
c609719b 1042
43d9616c
WD
1043 Global environment variables are those you use
1044 setenv/printenv to work with. To run a command stored
1045 in such a variable, you need to use the run command,
1046 and you must not use the '$' sign to access them.
c609719b
WD
1047
1048 To store commands and special characters in a
1049 variable, please use double quotation marks
1050 surrounding the whole text of the variable, instead
1051 of the backslashes before semicolons and special
1052 symbols.
1053
a8c7c708 1054- Default Environment:
0613c36a 1055 CFG_EXTRA_ENV_SETTINGS
c609719b 1056
43d9616c
WD
1057 Define this to contain any number of null terminated
1058 strings (variable = value pairs) that will be part of
7152b1d0 1059 the default environment compiled into the boot image.
2262cfee 1060
43d9616c
WD
1061 For example, place something like this in your
1062 board's config file:
c609719b 1063
0613c36a 1064 #define CFG_EXTRA_ENV_SETTINGS \
c609719b
WD
1065 "myvar1=value1\0" \
1066 "myvar2=value2\0"
1067
43d9616c
WD
1068 Warning: This method is based on knowledge about the
1069 internal format how the environment is stored by the
1070 U-Boot code. This is NOT an official, exported
1071 interface! Although it is unlikely that this format
7152b1d0 1072 will change soon, there is no guarantee either.
c609719b
WD
1073 You better know what you are doing here.
1074
43d9616c
WD
1075 Note: overly (ab)use of the default environment is
1076 discouraged. Make sure to check other ways to preset
74de7aef 1077 the environment like the "source" command or the
43d9616c 1078 boot command first.
c609719b 1079
06fd8538
SG
1080 CONFIG_DELAY_ENVIRONMENT
1081
1082 Normally the environment is loaded when the board is
b445bbb4 1083 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1084 that so that the environment is not available until
1085 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1086 this is instead controlled by the value of
1087 /config/load-environment.
1088
cccfc2ab
DZ
1089- Automatic software updates via TFTP server
1090 CONFIG_UPDATE_TFTP
1091 CONFIG_UPDATE_TFTP_CNT_MAX
1092 CONFIG_UPDATE_TFTP_MSEC_MAX
1093
1094 These options enable and control the auto-update feature;
1095 for a more detailed description refer to doc/README.update.
1096
1097- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1098 CONFIG_MTD_UBI_WL_THRESHOLD
1099 This parameter defines the maximum difference between the highest
1100 erase counter value and the lowest erase counter value of eraseblocks
1101 of UBI devices. When this threshold is exceeded, UBI starts performing
1102 wear leveling by means of moving data from eraseblock with low erase
1103 counter to eraseblocks with high erase counter.
1104
1105 The default value should be OK for SLC NAND flashes, NOR flashes and
1106 other flashes which have eraseblock life-cycle 100000 or more.
1107 However, in case of MLC NAND flashes which typically have eraseblock
1108 life-cycle less than 10000, the threshold should be lessened (e.g.,
1109 to 128 or 256, although it does not have to be power of 2).
1110
1111 default: 4096
c654b517 1112
ff94bc40
HS
1113 CONFIG_MTD_UBI_BEB_LIMIT
1114 This option specifies the maximum bad physical eraseblocks UBI
1115 expects on the MTD device (per 1024 eraseblocks). If the
1116 underlying flash does not admit of bad eraseblocks (e.g. NOR
1117 flash), this value is ignored.
1118
1119 NAND datasheets often specify the minimum and maximum NVM
1120 (Number of Valid Blocks) for the flashes' endurance lifetime.
1121 The maximum expected bad eraseblocks per 1024 eraseblocks
1122 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1123 which gives 20 for most NANDs (MaxNVB is basically the total
1124 count of eraseblocks on the chip).
1125
1126 To put it differently, if this value is 20, UBI will try to
1127 reserve about 1.9% of physical eraseblocks for bad blocks
1128 handling. And that will be 1.9% of eraseblocks on the entire
1129 NAND chip, not just the MTD partition UBI attaches. This means
1130 that if you have, say, a NAND flash chip admits maximum 40 bad
1131 eraseblocks, and it is split on two MTD partitions of the same
1132 size, UBI will reserve 40 eraseblocks when attaching a
1133 partition.
1134
1135 default: 20
1136
1137 CONFIG_MTD_UBI_FASTMAP
1138 Fastmap is a mechanism which allows attaching an UBI device
1139 in nearly constant time. Instead of scanning the whole MTD device it
1140 only has to locate a checkpoint (called fastmap) on the device.
1141 The on-flash fastmap contains all information needed to attach
1142 the device. Using fastmap makes only sense on large devices where
1143 attaching by scanning takes long. UBI will not automatically install
1144 a fastmap on old images, but you can set the UBI parameter
1145 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1146 that fastmap-enabled images are still usable with UBI implementations
1147 without fastmap support. On typical flash devices the whole fastmap
1148 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1149
1150 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1151 Set this parameter to enable fastmap automatically on images
1152 without a fastmap.
1153 default: 0
1154
0195a7bb
HS
1155 CONFIG_MTD_UBI_FM_DEBUG
1156 Enable UBI fastmap debug
1157 default: 0
1158
6a11cf48 1159- SPL framework
04e5ae79
WD
1160 CONFIG_SPL
1161 Enable building of SPL globally.
6a11cf48 1162
8c80eb3b
AA
1163 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1164 When defined, SPL will panic() if the image it has
1165 loaded does not have a signature.
1166 Defining this is useful when code which loads images
1167 in SPL cannot guarantee that absolutely all read errors
1168 will be caught.
1169 An example is the LPC32XX MLC NAND driver, which will
1170 consider that a completely unreadable NAND block is bad,
1171 and thus should be skipped silently.
1172
861a86f4
TR
1173 CONFIG_SPL_DISPLAY_PRINT
1174 For ARM, enable an optional function to print more information
1175 about the running system.
1176
06f60ae3
SW
1177 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1178 Set this for NAND SPL on PPC mpc83xx targets, so that
1179 start.S waits for the rest of the SPL to load before
1180 continuing (the hardware starts execution after just
1181 loading the first page rather than the full 4K).
1182
6f4e7d3c
TG
1183 CONFIG_SPL_UBI
1184 Support for a lightweight UBI (fastmap) scanner and
1185 loader
1186
601b8901
SA
1187 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,
1188 CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,
1189 CONFIG_SYS_NAND_BAD_BLOCK_POS, CFG_SYS_NAND_ECCPOS,
1190 CFG_SYS_NAND_ECCSIZE, CFG_SYS_NAND_ECCBYTES
95579793 1191 Defines the size and behavior of the NAND that SPL uses
7d4b7955 1192 to read U-Boot
95579793 1193
4e590945 1194 CFG_SYS_NAND_U_BOOT_DST
7d4b7955
SW
1195 Location in memory to load U-Boot to
1196
4e590945 1197 CFG_SYS_NAND_U_BOOT_SIZE
7d4b7955 1198 Size of image to load
95579793 1199
4e590945 1200 CFG_SYS_NAND_U_BOOT_START
7d4b7955 1201 Entry point in loaded image to jump to
95579793 1202
c57b953d
PM
1203 CONFIG_SPL_RAM_DEVICE
1204 Support for running image already present in ram, in SPL binary
6a11cf48 1205
b527b9c6 1206 CONFIG_SPL_FIT_PRINT
87ebee39
SG
1207 Printing information about a FIT image adds quite a bit of
1208 code to SPL. So this is normally disabled in SPL. Use this
1209 option to re-enable it. This will affect the output of the
1210 bootm command when booting a FIT image.
1211
a8c7c708
WD
1212- Interrupt support (PPC):
1213
d4ca31c4
WD
1214 There are common interrupt_init() and timer_interrupt()
1215 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 1216 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 1217 should set decrementer_count to appropriate value. If
11ccc33f 1218 CPU resets decrementer automatically after interrupt
d4ca31c4 1219 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 1220 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
1221 specific handling. If board has watchdog / status_led
1222 / other_activity_monitor it works automatically from
1223 general timer_interrupt().
a8c7c708 1224
c609719b 1225
9660e442
HR
1226Board initialization settings:
1227------------------------------
1228
1229During Initialization u-boot calls a number of board specific functions
1230to allow the preparation of board specific prerequisites, e.g. pin setup
1231before drivers are initialized. To enable these callbacks the
1232following configuration macros have to be defined. Currently this is
1233architecture specific, so please check arch/your_architecture/lib/board.c
1234typically in board_init_f() and board_init_r().
1235
1236- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
1237- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
1238- CONFIG_BOARD_LATE_INIT: Call board_late_init()
c609719b 1239
c609719b
WD
1240Configuration Settings:
1241-----------------------
1242
6d0f6bcf 1243- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
1244 undefine this when you're short of memory.
1245
6e7df1d1 1246- CFG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
2fb2604d
PT
1247 width of the commands listed in the 'help' command output.
1248
6d0f6bcf 1249- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
1250 prompt for user input.
1251
65cc0e2a 1252- CFG_SYS_BAUDRATE_TABLE:
c609719b
WD
1253 List of legal baudrate settings for this board.
1254
65cc0e2a 1255- CFG_SYS_MEM_RESERVE_SECURE
e61a7534 1256 Only implemented for ARMv8 for now.
65cc0e2a 1257 If defined, the size of CFG_SYS_MEM_RESERVE_SECURE memory
e8149522
YS
1258 is substracted from total RAM and won't be reported to OS.
1259 This memory can be used as secure memory. A variable
e61a7534 1260 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
1261 the RAM base is not zero, or RAM is divided into banks,
1262 this variable needs to be recalcuated to get the address.
1263
aa6e94de 1264- CFG_SYS_SDRAM_BASE:
c609719b
WD
1265 Physical start address of SDRAM. _Must_ be 0 here.
1266
65cc0e2a 1267- CFG_SYS_FLASH_BASE:
c609719b
WD
1268 Physical start address of Flash memory.
1269
6d0f6bcf 1270- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
1271 Size of DRAM reserved for malloc() use.
1272
65cc0e2a 1273- CFG_SYS_BOOTMAPSZ:
c609719b
WD
1274 Maximum size of memory mapped by the startup code of
1275 the Linux kernel; all data that must be processed by
7d721e34
BS
1276 the Linux kernel (bd_info, boot arguments, FDT blob if
1277 used) must be put below this limit, unless "bootm_low"
1bce2aeb 1278 environment variable is defined and non-zero. In such case
7d721e34 1279 all data for the Linux kernel must be between "bootm_low"
65cc0e2a 1280 and "bootm_low" + CFG_SYS_BOOTMAPSZ. The environment
c3624e6e 1281 variable "bootm_mapsize" will override the value of
65cc0e2a 1282 CFG_SYS_BOOTMAPSZ. If CFG_SYS_BOOTMAPSZ is undefined,
c3624e6e 1283 then the value in "bootm_size" will be used instead.
c609719b 1284
fca43cc8
JR
1285- CONFIG_SYS_BOOT_GET_CMDLINE:
1286 Enables allocating and saving kernel cmdline in space between
1287 "bootm_low" and "bootm_low" + BOOTMAPSZ.
1288
1289- CONFIG_SYS_BOOT_GET_KBD:
1290 Enables allocating and saving a kernel copy of the bd_info in
1291 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
1292
6d0f6bcf 1293- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
1294 If defined, hardware flash sectors protection is used
1295 instead of U-Boot software protection.
1296
6d0f6bcf 1297- CONFIG_SYS_FLASH_CFI:
43d9616c 1298 Define if the flash driver uses extra elements in the
5653fc33
WD
1299 common flash structure for storing flash geometry.
1300
00b1883a 1301- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
1302 This option also enables the building of the cfi_flash driver
1303 in the drivers directory
c609719b 1304
91809ed5
PZ
1305- CONFIG_FLASH_CFI_MTD
1306 This option enables the building of the cfi_mtd driver
1307 in the drivers directory. The driver exports CFI flash
1308 to the MTD layer.
1309
6d0f6bcf 1310- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
1311 Use buffered writes to flash.
1312
2598090b 1313- CONFIG_ENV_FLAGS_LIST_DEFAULT
acf29d8c 1314- CFG_ENV_FLAGS_LIST_STATIC
1bce2aeb 1315 Enable validation of the values given to environment variables when
2598090b
JH
1316 calling env set. Variables can be restricted to only decimal,
1317 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
1318 the variables can also be restricted to IP address or MAC address.
1319
1320 The format of the list is:
1321 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
1322 access_attribute = [a|r|o|c]
1323 attributes = type_attribute[access_attribute]
2598090b
JH
1324 entry = variable_name[:attributes]
1325 list = entry[,list]
1326
1327 The type attributes are:
1328 s - String (default)
1329 d - Decimal
1330 x - Hexadecimal
1331 b - Boolean ([1yYtT|0nNfF])
1332 i - IP address
1333 m - MAC address
1334
267541f7
JH
1335 The access attributes are:
1336 a - Any (default)
1337 r - Read-only
1338 o - Write-once
1339 c - Change-default
1340
2598090b
JH
1341 - CONFIG_ENV_FLAGS_LIST_DEFAULT
1342 Define this to a list (string) to define the ".flags"
b445bbb4 1343 environment variable in the default or embedded environment.
2598090b 1344
acf29d8c 1345 - CFG_ENV_FLAGS_LIST_STATIC
2598090b
JH
1346 Define this to a list (string) to define validation that
1347 should be done if an entry is not found in the ".flags"
1348 environment variable. To override a setting in the static
1349 list, simply add an entry for the same variable name to the
1350 ".flags" variable.
1351
bdf1fe4e
JH
1352 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
1353 regular expression. This allows multiple variables to define the same
1354 flags without explicitly listing them for each variable.
1355
c609719b
WD
1356The following definitions that deal with the placement and management
1357of environment data (variable area); in general, we support the
1358following configurations:
1359
c609719b 1360BE CAREFUL! The first access to the environment happens quite early
b445bbb4 1361in U-Boot initialization (when we try to get the setting of for the
11ccc33f 1362console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
1363U-Boot will hang.
1364
1365Please note that even with NVRAM we still use a copy of the
1366environment in RAM: we could work on NVRAM directly, but we want to
1367keep settings there always unmodified except somebody uses "saveenv"
1368to save the current settings.
1369
0a85a9e7
LG
1370BE CAREFUL! For some special cases, the local device can not use
1371"saveenv" command. For example, the local device will get the
fc54c7fa
LG
1372environment stored in a remote NOR flash by SRIO or PCIE link,
1373but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 1374
b74ab737
GL
1375- CONFIG_NAND_ENV_DST
1376
1377 Defines address in RAM to which the nand_spl code should copy the
1378 environment. If redundant environment is used, it will be copied to
1379 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
1380
e881cb56 1381Please note that the environment is read-only until the monitor
c609719b 1382has been relocated to RAM and a RAM copy of the environment has been
00caae6d 1383created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
1384until then to read environment variables.
1385
85ec0bcc
WD
1386The environment is protected by a CRC32 checksum. Before the monitor
1387is relocated into RAM, as a result of a bad CRC you will be working
1388with the compiled-in default environment - *silently*!!! [This is
1389necessary, because the first environment variable we need is the
1390"baudrate" setting for the console - if we have a bad CRC, we don't
1391have any device yet where we could complain.]
c609719b
WD
1392
1393Note: once the monitor has been relocated, then it will complain if
1394the default environment is used; a new CRC is computed as soon as you
85ec0bcc 1395use the "saveenv" command to store a valid environment.
c609719b 1396
6d0f6bcf 1397- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 1398 MII address of the PHY to check for the Ethernet link state.
c609719b 1399
b2b92f53
SG
1400- CONFIG_DISPLAY_BOARDINFO
1401 Display information about the board that U-Boot is running on
1402 when U-Boot starts up. The board function checkboard() is called
1403 to do this.
1404
e2e3e2b1
SG
1405- CONFIG_DISPLAY_BOARDINFO_LATE
1406 Similar to the previous option, but display this information
1407 later, once stdio is running and output goes to the LCD, if
1408 present.
1409
c609719b 1410Low Level (hardware related) configuration options:
dc7c9a1a 1411---------------------------------------------------
c609719b 1412
6d0f6bcf 1413- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
1414 Cache Line Size of the CPU.
1415
e46fedfe
TT
1416- CONFIG_SYS_CCSRBAR_DEFAULT:
1417 Default (power-on reset) physical address of CCSR on Freescale
1418 PowerPC SOCs.
1419
65cc0e2a 1420- CFG_SYS_CCSRBAR:
e46fedfe
TT
1421 Virtual address of CCSR. On a 32-bit build, this is typically
1422 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
1423
65cc0e2a 1424- CFG_SYS_CCSRBAR_PHYS:
e46fedfe
TT
1425 Physical address of CCSR. CCSR can be relocated to a new
1426 physical address, if desired. In this case, this macro should
c0f40859 1427 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
1428 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
1429 is typically relocated on 36-bit builds. It is recommended
1430 that this macro be defined via the _HIGH and _LOW macros:
1431
65cc0e2a
TR
1432 #define CFG_SYS_CCSRBAR_PHYS ((CFG_SYS_CCSRBAR_PHYS_HIGH
1433 * 1ull) << 32 | CFG_SYS_CCSRBAR_PHYS_LOW)
e46fedfe 1434
65cc0e2a
TR
1435- CFG_SYS_CCSRBAR_PHYS_HIGH:
1436 Bits 33-36 of CFG_SYS_CCSRBAR_PHYS. This value is typically
4cf2609b 1437 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
1438 used in assembly code, so it must not contain typecasts or
1439 integer size suffixes (e.g. "ULL").
1440
65cc0e2a
TR
1441- CFG_SYS_CCSRBAR_PHYS_LOW:
1442 Lower 32-bits of CFG_SYS_CCSRBAR_PHYS. This macro is
e46fedfe
TT
1443 used in assembly code, so it must not contain typecasts or
1444 integer size suffixes (e.g. "ULL").
1445
6d0f6bcf 1446- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 1447 DO NOT CHANGE unless you know exactly what you're
907208c4 1448 doing! (11-4) [MPC8xx systems only]
c609719b 1449
65cc0e2a 1450- CFG_SYS_INIT_RAM_ADDR:
c609719b 1451
7152b1d0 1452 Start address of memory area that can be used for
c609719b
WD
1453 initial data and stack; please note that this must be
1454 writable memory that is working WITHOUT special
1455 initialization, i. e. you CANNOT use normal RAM which
1456 will become available only after programming the
1457 memory controller and running certain initialization
1458 sequences.
1459
1460 U-Boot uses the following memory types:
907208c4 1461 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 1462
6d0f6bcf 1463- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 1464
6d0f6bcf 1465- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
1466 SDRAM timing
1467
a09b9b68
KG
1468- CONFIG_SYS_SRIOn_MEM_VIRT:
1469 Virtual Address of SRIO port 'n' memory region
1470
62f9b654 1471- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
1472 Physical Address of SRIO port 'n' memory region
1473
1474- CONFIG_SYS_SRIOn_MEM_SIZE:
1475 Size of SRIO port 'n' memory region
1476
66bd1846
FE
1477- CONFIG_SYS_NAND_BUSWIDTH_16BIT
1478 Defined to tell the NAND controller that the NAND chip is using
1479 a 16 bit bus.
1480 Not all NAND drivers use this symbol.
a430e916 1481 Example of drivers that use it:
a430fa06
MR
1482 - drivers/mtd/nand/raw/ndfc.c
1483 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
1484
1485- CONFIG_SYS_NDFC_EBC0_CFG
1486 Sets the EBC0_CFG register for the NDFC. If not defined
1487 a default value will be used.
1488
6d0f6bcf 1489- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
1490 If SPD EEPROM is on an I2C bus other than the first
1491 one, specify here. Note that the value must resolve
1492 to something your driver can deal with.
bb99ad6d 1493
6f5e1dc5
YS
1494- CONFIG_FSL_DDR_INTERACTIVE
1495 Enable interactive DDR debugging. See doc/README.fsl-ddr.
1496
e32d59a2
YS
1497- CONFIG_FSL_DDR_SYNC_REFRESH
1498 Enable sync of refresh for multiple controllers.
1499
4516ff81
YS
1500- CONFIG_FSL_DDR_BIST
1501 Enable built-in memory test for Freescale DDR controllers.
1502
c26e454d
WD
1503- CONFIG_RMII
1504 Enable RMII mode for all FECs.
1505 Note that this is a global option, we can't
1506 have one FEC in standard MII mode and another in RMII mode.
1507
5cf91d6b
WD
1508- CONFIG_CRC32_VERIFY
1509 Add a verify option to the crc32 command.
1510 The syntax is:
1511
1512 => crc32 -v <address> <count> <crc32>
1513
1514 Where address/count indicate a memory area
1515 and crc32 is the correct crc32 which the
1516 area should have.
1517
56523f12
WD
1518- CONFIG_LOOPW
1519 Add the "loopw" memory command. This only takes effect if
493f420e 1520 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 1521
72732318 1522- CONFIG_CMD_MX_CYCLIC
7b466641
SR
1523 Add the "mdc" and "mwc" memory commands. These are cyclic
1524 "md/mw" commands.
1525 Examples:
1526
efe2a4d5 1527 => mdc.b 10 4 500
7b466641
SR
1528 This command will print 4 bytes (10,11,12,13) each 500 ms.
1529
efe2a4d5 1530 => mwc.l 100 12345678 10
7b466641
SR
1531 This command will write 12345678 to address 100 all 10 ms.
1532
efe2a4d5 1533 This only takes effect if the memory commands are activated
493f420e 1534 globally (CONFIG_CMD_MEMORY).
7b466641 1535
401bb30b 1536- CONFIG_SPL_BUILD
1d38722e
SG
1537 Set when the currently running compilation is for an artifact
1538 that will end up in one of the 'xPL' builds, i.e. SPL, TPL or
1539 VPL. Code that needs phase-specific behaviour can check this,
1540 or (where possible) use spl_phase() instead.
1541
1542 Note that CONFIG_SPL_BUILD *is* always defined when either
1543 of CONFIG_TPL_BUILD / CONFIG_VPL_BUILD is defined. This can be
1544 counter-intuitive and should perhaps be changed.
400558b5 1545
3aa29de0 1546- CONFIG_TPL_BUILD
1d38722e
SG
1547 Set when the currently running compilation is for an artifact
1548 that will end up in the TPL build (as opposed to SPL, VPL or
1549 U-Boot proper). Code that needs phase-specific behaviour can
1550 check this, or (where possible) use spl_phase() instead.
1551
1552- CONFIG_VPL_BUILD
1553 Set when the currently running compilation is for an artifact
1554 that will end up in the VPL build (as opposed to the SPL, TPL
1555 or U-Boot proper). Code that needs phase-specific behaviour can
1556 check this, or (where possible) use spl_phase() instead.
3aa29de0 1557
4213fc29
SG
1558- CONFIG_ARCH_MAP_SYSMEM
1559 Generally U-Boot (and in particular the md command) uses
1560 effective address. It is therefore not necessary to regard
1561 U-Boot address as virtual addresses that need to be translated
1562 to physical addresses. However, sandbox requires this, since
1563 it maintains its own little RAM buffer which contains all
1564 addressable memory. This option causes some memory accesses
1565 to be mapped through map_sysmem() / unmap_sysmem().
1566
588a13f7
SG
1567- CONFIG_X86_RESET_VECTOR
1568 If defined, the x86 reset vector code is included. This is not
1569 needed when U-Boot is running from Coreboot.
b16f521a 1570
f2717b47
TT
1571Freescale QE/FMAN Firmware Support:
1572-----------------------------------
1573
1574The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
1575loading of "firmware", which is encoded in the QE firmware binary format.
1576This firmware often needs to be loaded during U-Boot booting, so macros
1577are used to identify the storage device (NOR flash, SPI, etc) and the address
1578within that device.
1579
dcf1d774
ZQ
1580- CONFIG_SYS_FMAN_FW_ADDR
1581 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 1582 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
1583 is also specified.
1584
1585- CONFIG_SYS_QE_FW_ADDR
1586 The address in the storage device where the QE microcode is located. The
cc1e98b5 1587 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
1588 is also specified.
1589
1590- CONFIG_SYS_QE_FMAN_FW_LENGTH
1591 The maximum possible size of the firmware. The firmware binary format
1592 has a field that specifies the actual size of the firmware, but it
1593 might not be possible to read any part of the firmware unless some
1594 local storage is allocated to hold the entire firmware first.
1595
1596- CONFIG_SYS_QE_FMAN_FW_IN_NOR
1597 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
1598 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
1599 virtual address in NOR flash.
1600
1601- CONFIG_SYS_QE_FMAN_FW_IN_NAND
1602 Specifies that QE/FMAN firmware is located in NAND flash.
1603 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
1604
1605- CONFIG_SYS_QE_FMAN_FW_IN_MMC
1606 Specifies that QE/FMAN firmware is located on the primary SD/MMC
1607 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
1608
292dc6c5
LG
1609- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
1610 Specifies that QE/FMAN firmware is located in the remote (master)
1611 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
1612 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
1613 window->master inbound window->master LAW->the ucode address in
1614 master's memory space.
f2717b47 1615
b940ca64
GR
1616Freescale Layerscape Management Complex Firmware Support:
1617---------------------------------------------------------
1618The Freescale Layerscape Management Complex (MC) supports the loading of
1619"firmware".
1620This firmware often needs to be loaded during U-Boot booting, so macros
1621are used to identify the storage device (NOR flash, SPI, etc) and the address
1622within that device.
1623
1624- CONFIG_FSL_MC_ENET
1625 Enable the MC driver for Layerscape SoCs.
1626
5c055089
PK
1627Freescale Layerscape Debug Server Support:
1628-------------------------------------------
1629The Freescale Layerscape Debug Server Support supports the loading of
1630"Debug Server firmware" and triggering SP boot-rom.
1631This firmware often needs to be loaded during U-Boot booting.
1632
c0492141
YS
1633- CONFIG_SYS_MC_RSV_MEM_ALIGN
1634 Define alignment of reserved memory MC requires
5c055089 1635
f3f431a7 1636
c609719b
WD
1637Building the Software:
1638======================
1639
218ca724
WD
1640Building U-Boot has been tested in several native build environments
1641and in many different cross environments. Of course we cannot support
1642all possibly existing versions of cross development tools in all
1643(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 1644recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 1645which is extensively used to build and test U-Boot.
c609719b 1646
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1647If you are not using a native environment, it is assumed that you
1648have GNU cross compiling tools available in your path. In this case,
1649you must set the environment variable CROSS_COMPILE in your shell.
1650Note that no changes to the Makefile or any other source files are
1651necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 1652
218ca724
WD
1653 $ CROSS_COMPILE=ppc_4xx-
1654 $ export CROSS_COMPILE
c609719b 1655
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1656U-Boot is intended to be simple to build. After installing the
1657sources you must configure U-Boot for one specific board type. This
c609719b
WD
1658is done by typing:
1659
ab584d67 1660 make NAME_defconfig
c609719b 1661
ab584d67 1662where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 1663rations; see configs/*_defconfig for supported names.
db01a2ea 1664
ecb3a0a1 1665Note: for some boards special configuration names may exist; check if
2729af9d
WD
1666 additional information is available from the board vendor; for
1667 instance, the TQM823L systems are available without (standard)
1668 or with LCD support. You can select such additional "features"
11ccc33f 1669 when choosing the configuration, i. e.
2729af9d 1670
ab584d67 1671 make TQM823L_defconfig
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1672 - will configure for a plain TQM823L, i. e. no LCD support
1673
ab584d67 1674 make TQM823L_LCD_defconfig
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1675 - will configure for a TQM823L with U-Boot console on LCD
1676
1677 etc.
1678
1679
1680Finally, type "make all", and you should get some working U-Boot
1681images ready for download to / installation on your system:
1682
1683- "u-boot.bin" is a raw binary image
1684- "u-boot" is an image in ELF binary format
1685- "u-boot.srec" is in Motorola S-Record format
1686
215bb1c1
DS
1687User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
1688setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
1689For example to treat all compiler warnings as errors:
1690
1691 make KCFLAGS=-Werror
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1692
1693Please be aware that the Makefiles assume you are using GNU make, so
1694for instance on NetBSD you might need to use "gmake" instead of
1695native "make".
1696
1697
1698If the system board that you have is not listed, then you will need
1699to port U-Boot to your hardware platform. To do this, follow these
1700steps:
1701
3c1496cd 17021. Create a new directory to hold your board specific code. Add any
2729af9d 1703 files you need. In your board directory, you will need at least
3c1496cd
PS
1704 the "Makefile" and a "<board>.c".
17052. Create a new configuration file "include/configs/<board>.h" for
1706 your board.
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17073. If you're porting U-Boot to a new CPU, then also create a new
1708 directory to hold your CPU specific code. Add any files you need.
ab584d67 17094. Run "make <board>_defconfig" with your new name.
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17105. Type "make", and you should get a working "u-boot.srec" file
1711 to be installed on your target system.
17126. Debug and solve any problems that might arise.
1713 [Of course, this last step is much harder than it sounds.]
1714
1715
1716Testing of U-Boot Modifications, Ports to New Hardware, etc.:
1717==============================================================
1718
218ca724
WD
1719If you have modified U-Boot sources (for instance added a new board
1720or support for new devices, a new CPU, etc.) you are expected to
2729af9d 1721provide feedback to the other developers. The feedback normally takes
32f2ca2a 1722the form of a "patch", i.e. a context diff against a certain (latest
218ca724 1723official or latest in the git repository) version of U-Boot sources.
2729af9d 1724
218ca724
WD
1725But before you submit such a patch, please verify that your modifi-
1726cation did not break existing code. At least make sure that *ALL* of
2729af9d 1727the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
1728just run the buildman script (tools/buildman/buildman), which will
1729configure and build U-Boot for ALL supported system. Be warned, this
1730will take a while. Please see the buildman README, or run 'buildman -H'
1731for documentation.
baf31249
MB
1732
1733
2729af9d
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1734See also "U-Boot Porting Guide" below.
1735
1736
1737Monitor Commands - Overview:
1738============================
1739
1740go - start application at address 'addr'
1741run - run commands in an environment variable
1742bootm - boot application image from memory
1743bootp - boot image via network using BootP/TFTP protocol
44f074c7 1744bootz - boot zImage from memory
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1745tftpboot- boot image via network using TFTP protocol
1746 and env variables "ipaddr" and "serverip"
1747 (and eventually "gatewayip")
1fb7cd49 1748tftpput - upload a file via network using TFTP protocol
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1749rarpboot- boot image via network using RARP/TFTP protocol
1750diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
1751loads - load S-Record file over serial line
1752loadb - load binary file over serial line (kermit mode)
bfef72e4 1753loadm - load binary blob from source address to destination address
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1754md - memory display
1755mm - memory modify (auto-incrementing)
1756nm - memory modify (constant address)
1757mw - memory write (fill)
bdded201 1758ms - memory search
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1759cp - memory copy
1760cmp - memory compare
1761crc32 - checksum calculation
0f89c54b 1762i2c - I2C sub-system
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1763sspi - SPI utility commands
1764base - print or set address offset
1765printenv- print environment variables
9e9a530a 1766pwm - control pwm channels
41a29f28 1767seama - load SEAMA NAND image
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1768setenv - set environment variables
1769saveenv - save environment variables to persistent storage
1770protect - enable or disable FLASH write protection
1771erase - erase FLASH memory
1772flinfo - print FLASH memory information
10635afa 1773nand - NAND memory operations (see doc/README.nand)
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1774bdinfo - print Board Info structure
1775iminfo - print header information for application image
1776coninfo - print console devices and informations
1777ide - IDE sub-system
1778loop - infinite loop on address range
56523f12 1779loopw - infinite write loop on address range
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1780mtest - simple RAM test
1781icache - enable or disable instruction cache
1782dcache - enable or disable data cache
1783reset - Perform RESET of the CPU
1784echo - echo args to console
1785version - print monitor version
1786help - print online help
1787? - alias for 'help'
1788
1789
1790Monitor Commands - Detailed Description:
1791========================================
1792
1793TODO.
1794
1795For now: just type "help <command>".
1796
1797
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1798Note for Redundant Ethernet Interfaces:
1799=======================================
c609719b 1800
11ccc33f 1801Some boards come with redundant Ethernet interfaces; U-Boot supports
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1802such configurations and is capable of automatic selection of a
1803"working" interface when needed. MAC assignment works as follows:
c609719b 1804
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1805Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
1806MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
1807"eth1addr" (=>eth1), "eth2addr", ...
c609719b 1808
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1809If the network interface stores some valid MAC address (for instance
1810in SROM), this is used as default address if there is NO correspon-
1811ding setting in the environment; if the corresponding environment
1812variable is set, this overrides the settings in the card; that means:
c609719b 1813
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1814o If the SROM has a valid MAC address, and there is no address in the
1815 environment, the SROM's address is used.
c609719b 1816
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1817o If there is no valid address in the SROM, and a definition in the
1818 environment exists, then the value from the environment variable is
1819 used.
c609719b 1820
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WD
1821o If both the SROM and the environment contain a MAC address, and
1822 both addresses are the same, this MAC address is used.
c609719b 1823
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WD
1824o If both the SROM and the environment contain a MAC address, and the
1825 addresses differ, the value from the environment is used and a
1826 warning is printed.
c609719b 1827
2729af9d 1828o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
1829 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
1830 a random, locally-assigned MAC is used.
c609719b 1831
ecee9324 1832If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 1833will be programmed into hardware as part of the initialization process. This
ecee9324
BW
1834may be skipped by setting the appropriate 'ethmacskip' environment variable.
1835The naming convention is as follows:
1836"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 1837
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1838Image Formats:
1839==============
c609719b 1840
3310c549
MB
1841U-Boot is capable of booting (and performing other auxiliary operations on)
1842images in two formats:
1843
1844New uImage format (FIT)
1845-----------------------
1846
1847Flexible and powerful format based on Flattened Image Tree -- FIT (similar
1848to Flattened Device Tree). It allows the use of images with multiple
1849components (several kernels, ramdisks, etc.), with contents protected by
1850SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
1851
1852
1853Old uImage format
1854-----------------
1855
1856Old image format is based on binary files which can be basically anything,
1857preceded by a special header; see the definitions in include/image.h for
1858details; basically, the header defines the following image properties:
c609719b 1859
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1860* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
1861 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39 1862 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
0797e736 1863 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
daab59ac 1864* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
11232139
TR
1865 IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
1866 Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).
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1867* Compression Type (uncompressed, gzip, bzip2)
1868* Load Address
1869* Entry Point
1870* Image Name
1871* Image Timestamp
c609719b 1872
2729af9d
WD
1873The header is marked by a special Magic Number, and both the header
1874and the data portions of the image are secured against corruption by
1875CRC32 checksums.
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WD
1876
1877
2729af9d
WD
1878Linux Support:
1879==============
c609719b 1880
2729af9d
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1881Although U-Boot should support any OS or standalone application
1882easily, the main focus has always been on Linux during the design of
1883U-Boot.
c609719b 1884
2729af9d
WD
1885U-Boot includes many features that so far have been part of some
1886special "boot loader" code within the Linux kernel. Also, any
1887"initrd" images to be used are no longer part of one big Linux image;
1888instead, kernel and "initrd" are separate images. This implementation
1889serves several purposes:
c609719b 1890
2729af9d
WD
1891- the same features can be used for other OS or standalone
1892 applications (for instance: using compressed images to reduce the
1893 Flash memory footprint)
c609719b 1894
2729af9d
WD
1895- it becomes much easier to port new Linux kernel versions because
1896 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 1897
2729af9d
WD
1898- the same Linux kernel image can now be used with different "initrd"
1899 images; of course this also means that different kernel images can
1900 be run with the same "initrd". This makes testing easier (you don't
1901 have to build a new "zImage.initrd" Linux image when you just
1902 change a file in your "initrd"). Also, a field-upgrade of the
1903 software is easier now.
c609719b 1904
c609719b 1905
2729af9d
WD
1906Linux HOWTO:
1907============
c609719b 1908
2729af9d
WD
1909Porting Linux to U-Boot based systems:
1910---------------------------------------
c609719b 1911
2729af9d
WD
1912U-Boot cannot save you from doing all the necessary modifications to
1913configure the Linux device drivers for use with your target hardware
1914(no, we don't intend to provide a full virtual machine interface to
1915Linux :-).
c609719b 1916
a47a12be 1917But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 1918
2729af9d
WD
1919Just make sure your machine specific header file (for instance
1920include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
1921Information structure as we define in include/asm-<arch>/u-boot.h,
1922and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 1923as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 1924
2eb31b13
SG
1925Note that U-Boot now has a driver model, a unified model for drivers.
1926If you are adding a new driver, plumb it into driver model. If there
1927is no uclass available, you are encouraged to create one. See
1928doc/driver-model.
1929
c609719b 1930
2729af9d
WD
1931Configuring the Linux kernel:
1932-----------------------------
c609719b 1933
2729af9d
WD
1934No specific requirements for U-Boot. Make sure you have some root
1935device (initial ramdisk, NFS) for your target system.
1936
1937
1938Building a Linux Image:
1939-----------------------
c609719b 1940
2729af9d
WD
1941With U-Boot, "normal" build targets like "zImage" or "bzImage" are
1942not used. If you use recent kernel source, a new build target
1943"uImage" will exist which automatically builds an image usable by
1944U-Boot. Most older kernels also have support for a "pImage" target,
1945which was introduced for our predecessor project PPCBoot and uses a
1946100% compatible format.
1947
1948Example:
1949
ab584d67 1950 make TQM850L_defconfig
2729af9d
WD
1951 make oldconfig
1952 make dep
1953 make uImage
1954
1955The "uImage" build target uses a special tool (in 'tools/mkimage') to
1956encapsulate a compressed Linux kernel image with header information,
1957CRC32 checksum etc. for use with U-Boot. This is what we are doing:
1958
1959* build a standard "vmlinux" kernel image (in ELF binary format):
1960
1961* convert the kernel into a raw binary image:
1962
1963 ${CROSS_COMPILE}-objcopy -O binary \
1964 -R .note -R .comment \
1965 -S vmlinux linux.bin
1966
1967* compress the binary image:
1968
1969 gzip -9 linux.bin
1970
1971* package compressed binary image for U-Boot:
1972
1973 mkimage -A ppc -O linux -T kernel -C gzip \
1974 -a 0 -e 0 -n "Linux Kernel Image" \
1975 -d linux.bin.gz uImage
c609719b 1976
c609719b 1977
2729af9d
WD
1978The "mkimage" tool can also be used to create ramdisk images for use
1979with U-Boot, either separated from the Linux kernel image, or
1980combined into one file. "mkimage" encapsulates the images with a 64
1981byte header containing information about target architecture,
1982operating system, image type, compression method, entry points, time
1983stamp, CRC32 checksums, etc.
1984
1985"mkimage" can be called in two ways: to verify existing images and
1986print the header information, or to build new images.
1987
1988In the first form (with "-l" option) mkimage lists the information
1989contained in the header of an existing U-Boot image; this includes
1990checksum verification:
c609719b 1991
2729af9d
WD
1992 tools/mkimage -l image
1993 -l ==> list image header information
1994
1995The second form (with "-d" option) is used to build a U-Boot image
1996from a "data file" which is used as image payload:
1997
1998 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
1999 -n name -d data_file image
2000 -A ==> set architecture to 'arch'
2001 -O ==> set operating system to 'os'
2002 -T ==> set image type to 'type'
2003 -C ==> set compression type 'comp'
2004 -a ==> set load address to 'addr' (hex)
2005 -e ==> set entry point to 'ep' (hex)
2006 -n ==> set image name to 'name'
2007 -d ==> use image data from 'datafile'
2008
69459791
WD
2009Right now, all Linux kernels for PowerPC systems use the same load
2010address (0x00000000), but the entry point address depends on the
2011kernel version:
2729af9d
WD
2012
2013- 2.2.x kernels have the entry point at 0x0000000C,
2014- 2.3.x and later kernels have the entry point at 0x00000000.
2015
2016So a typical call to build a U-Boot image would read:
2017
2018 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2019 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 2020 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
2021 > examples/uImage.TQM850L
2022 Image Name: 2.4.4 kernel for TQM850L
2023 Created: Wed Jul 19 02:34:59 2000
2024 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2025 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2026 Load Address: 0x00000000
2027 Entry Point: 0x00000000
2028
2029To verify the contents of the image (or check for corruption):
2030
2031 -> tools/mkimage -l examples/uImage.TQM850L
2032 Image Name: 2.4.4 kernel for TQM850L
2033 Created: Wed Jul 19 02:34:59 2000
2034 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2035 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2036 Load Address: 0x00000000
2037 Entry Point: 0x00000000
2038
2039NOTE: for embedded systems where boot time is critical you can trade
2040speed for memory and install an UNCOMPRESSED image instead: this
2041needs more space in Flash, but boots much faster since it does not
2042need to be uncompressed:
2043
a47a12be 2044 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
2045 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2046 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 2047 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
2048 > examples/uImage.TQM850L-uncompressed
2049 Image Name: 2.4.4 kernel for TQM850L
2050 Created: Wed Jul 19 02:34:59 2000
2051 Image Type: PowerPC Linux Kernel Image (uncompressed)
2052 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
2053 Load Address: 0x00000000
2054 Entry Point: 0x00000000
2055
2056
2057Similar you can build U-Boot images from a 'ramdisk.image.gz' file
2058when your kernel is intended to use an initial ramdisk:
2059
2060 -> tools/mkimage -n 'Simple Ramdisk Image' \
2061 > -A ppc -O linux -T ramdisk -C gzip \
2062 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
2063 Image Name: Simple Ramdisk Image
2064 Created: Wed Jan 12 14:01:50 2000
2065 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2066 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
2067 Load Address: 0x00000000
2068 Entry Point: 0x00000000
2069
e157a111
TH
2070The "dumpimage" tool can be used to disassemble or list the contents of images
2071built by mkimage. See dumpimage's help output (-h) for details.
2729af9d
WD
2072
2073Installing a Linux Image:
2074-------------------------
2075
2076To downloading a U-Boot image over the serial (console) interface,
2077you must convert the image to S-Record format:
2078
2079 objcopy -I binary -O srec examples/image examples/image.srec
2080
2081The 'objcopy' does not understand the information in the U-Boot
2082image header, so the resulting S-Record file will be relative to
2083address 0x00000000. To load it to a given address, you need to
2084specify the target address as 'offset' parameter with the 'loads'
2085command.
2086
2087Example: install the image to address 0x40100000 (which on the
2088TQM8xxL is in the first Flash bank):
2089
2090 => erase 40100000 401FFFFF
2091
2092 .......... done
2093 Erased 8 sectors
2094
2095 => loads 40100000
2096 ## Ready for S-Record download ...
2097 ~>examples/image.srec
2098 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
2099 ...
2100 15989 15990 15991 15992
2101 [file transfer complete]
2102 [connected]
2103 ## Start Addr = 0x00000000
2104
2105
2106You can check the success of the download using the 'iminfo' command;
218ca724 2107this includes a checksum verification so you can be sure no data
2729af9d
WD
2108corruption happened:
2109
2110 => imi 40100000
2111
2112 ## Checking Image at 40100000 ...
2113 Image Name: 2.2.13 for initrd on TQM850L
2114 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2115 Data Size: 335725 Bytes = 327 kB = 0 MB
2116 Load Address: 00000000
2117 Entry Point: 0000000c
2118 Verifying Checksum ... OK
2119
2120
2121Boot Linux:
2122-----------
2123
2124The "bootm" command is used to boot an application that is stored in
2125memory (RAM or Flash). In case of a Linux kernel image, the contents
2126of the "bootargs" environment variable is passed to the kernel as
2127parameters. You can check and modify this variable using the
2128"printenv" and "setenv" commands:
2129
2130
2131 => printenv bootargs
2132 bootargs=root=/dev/ram
2133
2134 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2135
2136 => printenv bootargs
2137 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2138
2139 => bootm 40020000
2140 ## Booting Linux kernel at 40020000 ...
2141 Image Name: 2.2.13 for NFS on TQM850L
2142 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2143 Data Size: 381681 Bytes = 372 kB = 0 MB
2144 Load Address: 00000000
2145 Entry Point: 0000000c
2146 Verifying Checksum ... OK
2147 Uncompressing Kernel Image ... OK
2148 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
2149 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2150 time_init: decrementer frequency = 187500000/60
2151 Calibrating delay loop... 49.77 BogoMIPS
2152 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
2153 ...
2154
11ccc33f 2155If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
2156the memory addresses of both the kernel and the initrd image (PPBCOOT
2157format!) to the "bootm" command:
2158
2159 => imi 40100000 40200000
2160
2161 ## Checking Image at 40100000 ...
2162 Image Name: 2.2.13 for initrd on TQM850L
2163 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2164 Data Size: 335725 Bytes = 327 kB = 0 MB
2165 Load Address: 00000000
2166 Entry Point: 0000000c
2167 Verifying Checksum ... OK
2168
2169 ## Checking Image at 40200000 ...
2170 Image Name: Simple Ramdisk Image
2171 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2172 Data Size: 566530 Bytes = 553 kB = 0 MB
2173 Load Address: 00000000
2174 Entry Point: 00000000
2175 Verifying Checksum ... OK
2176
2177 => bootm 40100000 40200000
2178 ## Booting Linux kernel at 40100000 ...
2179 Image Name: 2.2.13 for initrd on TQM850L
2180 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2181 Data Size: 335725 Bytes = 327 kB = 0 MB
2182 Load Address: 00000000
2183 Entry Point: 0000000c
2184 Verifying Checksum ... OK
2185 Uncompressing Kernel Image ... OK
2186 ## Loading RAMDisk Image at 40200000 ...
2187 Image Name: Simple Ramdisk Image
2188 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2189 Data Size: 566530 Bytes = 553 kB = 0 MB
2190 Load Address: 00000000
2191 Entry Point: 00000000
2192 Verifying Checksum ... OK
2193 Loading Ramdisk ... OK
2194 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
2195 Boot arguments: root=/dev/ram
2196 time_init: decrementer frequency = 187500000/60
2197 Calibrating delay loop... 49.77 BogoMIPS
2198 ...
2199 RAMDISK: Compressed image found at block 0
2200 VFS: Mounted root (ext2 filesystem).
2201
2202 bash#
2203
0267768e
MM
2204Boot Linux and pass a flat device tree:
2205-----------
2206
2207First, U-Boot must be compiled with the appropriate defines. See the section
2208titled "Linux Kernel Interface" above for a more in depth explanation. The
2209following is an example of how to start a kernel and pass an updated
2210flat device tree:
2211
2212=> print oftaddr
2213oftaddr=0x300000
2214=> print oft
2215oft=oftrees/mpc8540ads.dtb
2216=> tftp $oftaddr $oft
2217Speed: 1000, full duplex
2218Using TSEC0 device
2219TFTP from server 192.168.1.1; our IP address is 192.168.1.101
2220Filename 'oftrees/mpc8540ads.dtb'.
2221Load address: 0x300000
2222Loading: #
2223done
2224Bytes transferred = 4106 (100a hex)
2225=> tftp $loadaddr $bootfile
2226Speed: 1000, full duplex
2227Using TSEC0 device
2228TFTP from server 192.168.1.1; our IP address is 192.168.1.2
2229Filename 'uImage'.
2230Load address: 0x200000
2231Loading:############
2232done
2233Bytes transferred = 1029407 (fb51f hex)
2234=> print loadaddr
2235loadaddr=200000
2236=> print oftaddr
2237oftaddr=0x300000
2238=> bootm $loadaddr - $oftaddr
2239## Booting image at 00200000 ...
a9398e01
WD
2240 Image Name: Linux-2.6.17-dirty
2241 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2242 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 2243 Load Address: 00000000
a9398e01 2244 Entry Point: 00000000
0267768e
MM
2245 Verifying Checksum ... OK
2246 Uncompressing Kernel Image ... OK
2247Booting using flat device tree at 0x300000
2248Using MPC85xx ADS machine description
2249Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
2250[snip]
2251
2252
2729af9d
WD
2253More About U-Boot Image Types:
2254------------------------------
2255
2256U-Boot supports the following image types:
2257
2258 "Standalone Programs" are directly runnable in the environment
2259 provided by U-Boot; it is expected that (if they behave
2260 well) you can continue to work in U-Boot after return from
2261 the Standalone Program.
2262 "OS Kernel Images" are usually images of some Embedded OS which
2263 will take over control completely. Usually these programs
2264 will install their own set of exception handlers, device
2265 drivers, set up the MMU, etc. - this means, that you cannot
2266 expect to re-enter U-Boot except by resetting the CPU.
2267 "RAMDisk Images" are more or less just data blocks, and their
2268 parameters (address, size) are passed to an OS kernel that is
2269 being started.
2270 "Multi-File Images" contain several images, typically an OS
2271 (Linux) kernel image and one or more data images like
2272 RAMDisks. This construct is useful for instance when you want
2273 to boot over the network using BOOTP etc., where the boot
2274 server provides just a single image file, but you want to get
2275 for instance an OS kernel and a RAMDisk image.
2276
2277 "Multi-File Images" start with a list of image sizes, each
2278 image size (in bytes) specified by an "uint32_t" in network
2279 byte order. This list is terminated by an "(uint32_t)0".
2280 Immediately after the terminating 0 follow the images, one by
2281 one, all aligned on "uint32_t" boundaries (size rounded up to
2282 a multiple of 4 bytes).
2283
2284 "Firmware Images" are binary images containing firmware (like
2285 U-Boot or FPGA images) which usually will be programmed to
2286 flash memory.
2287
2288 "Script files" are command sequences that will be executed by
2289 U-Boot's command interpreter; this feature is especially
2290 useful when you configure U-Boot to use a real shell (hush)
2291 as command interpreter.
2292
44f074c7
MV
2293Booting the Linux zImage:
2294-------------------------
2295
2296On some platforms, it's possible to boot Linux zImage. This is done
2297using the "bootz" command. The syntax of "bootz" command is the same
2298as the syntax of "bootm" command.
2299
8ac28563 2300Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
2301kernel with raw initrd images. The syntax is slightly different, the
2302address of the initrd must be augmented by it's size, in the following
2303format: "<initrd addres>:<initrd size>".
2304
2729af9d
WD
2305
2306Standalone HOWTO:
2307=================
2308
2309One of the features of U-Boot is that you can dynamically load and
2310run "standalone" applications, which can use some resources of
2311U-Boot like console I/O functions or interrupt services.
2312
2313Two simple examples are included with the sources:
2314
2315"Hello World" Demo:
2316-------------------
2317
2318'examples/hello_world.c' contains a small "Hello World" Demo
2319application; it is automatically compiled when you build U-Boot.
2320It's configured to run at address 0x00040004, so you can play with it
2321like that:
2322
2323 => loads
2324 ## Ready for S-Record download ...
2325 ~>examples/hello_world.srec
2326 1 2 3 4 5 6 7 8 9 10 11 ...
2327 [file transfer complete]
2328 [connected]
2329 ## Start Addr = 0x00040004
2330
2331 => go 40004 Hello World! This is a test.
2332 ## Starting application at 0x00040004 ...
2333 Hello World
2334 argc = 7
2335 argv[0] = "40004"
2336 argv[1] = "Hello"
2337 argv[2] = "World!"
2338 argv[3] = "This"
2339 argv[4] = "is"
2340 argv[5] = "a"
2341 argv[6] = "test."
2342 argv[7] = "<NULL>"
2343 Hit any key to exit ...
2344
2345 ## Application terminated, rc = 0x0
2346
2347Another example, which demonstrates how to register a CPM interrupt
2348handler with the U-Boot code, can be found in 'examples/timer.c'.
2349Here, a CPM timer is set up to generate an interrupt every second.
2350The interrupt service routine is trivial, just printing a '.'
2351character, but this is just a demo program. The application can be
2352controlled by the following keys:
2353
2354 ? - print current values og the CPM Timer registers
2355 b - enable interrupts and start timer
2356 e - stop timer and disable interrupts
2357 q - quit application
2358
2359 => loads
2360 ## Ready for S-Record download ...
2361 ~>examples/timer.srec
2362 1 2 3 4 5 6 7 8 9 10 11 ...
2363 [file transfer complete]
2364 [connected]
2365 ## Start Addr = 0x00040004
2366
2367 => go 40004
2368 ## Starting application at 0x00040004 ...
2369 TIMERS=0xfff00980
2370 Using timer 1
2371 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
2372
2373Hit 'b':
2374 [q, b, e, ?] Set interval 1000000 us
2375 Enabling timer
2376Hit '?':
2377 [q, b, e, ?] ........
2378 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
2379Hit '?':
2380 [q, b, e, ?] .
2381 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
2382Hit '?':
2383 [q, b, e, ?] .
2384 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
2385Hit '?':
2386 [q, b, e, ?] .
2387 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
2388Hit 'e':
2389 [q, b, e, ?] ...Stopping timer
2390Hit 'q':
2391 [q, b, e, ?] ## Application terminated, rc = 0x0
2392
2393
2729af9d
WD
2394Implementation Internals:
2395=========================
2396
2397The following is not intended to be a complete description of every
2398implementation detail. However, it should help to understand the
2399inner workings of U-Boot and make it easier to port it to custom
2400hardware.
2401
2402
2403Initial Stack, Global Data:
2404---------------------------
2405
2406The implementation of U-Boot is complicated by the fact that U-Boot
2407starts running out of ROM (flash memory), usually without access to
2408system RAM (because the memory controller is not initialized yet).
2409This means that we don't have writable Data or BSS segments, and BSS
2410is not initialized as zero. To be able to get a C environment working
2411at all, we have to allocate at least a minimal stack. Implementation
2412options for this are defined and restricted by the CPU used: Some CPU
2413models provide on-chip memory (like the IMMR area on MPC8xx and
2414MPC826x processors), on others (parts of) the data cache can be
2415locked as (mis-) used as memory, etc.
2416
218ca724 2417 Chris Hallinan posted a good summary of these issues to the
0668236b 2418 U-Boot mailing list:
2729af9d
WD
2419
2420 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
2421 From: "Chris Hallinan" <[email protected]>
2422 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
2423 ...
2424
2425 Correct me if I'm wrong, folks, but the way I understand it
2426 is this: Using DCACHE as initial RAM for Stack, etc, does not
2427 require any physical RAM backing up the cache. The cleverness
2428 is that the cache is being used as a temporary supply of
2429 necessary storage before the SDRAM controller is setup. It's
11ccc33f 2430 beyond the scope of this list to explain the details, but you
2729af9d
WD
2431 can see how this works by studying the cache architecture and
2432 operation in the architecture and processor-specific manuals.
2433
2434 OCM is On Chip Memory, which I believe the 405GP has 4K. It
2435 is another option for the system designer to use as an
11ccc33f 2436 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
2437 option should work for you. Using CS 4 should be fine if your
2438 board designers haven't used it for something that would
2439 cause you grief during the initial boot! It is frequently not
2440 used.
2441
65cc0e2a 2442 CFG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
2443 with your processor/board/system design. The default value
2444 you will find in any recent u-boot distribution in
8a316c9b 2445 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
2446 than your SDRAM module. If you have a 64MB SDRAM module, set
2447 it above 400_0000. Just make sure your board has no resources
2448 that are supposed to respond to that address! That code in
2449 start.S has been around a while and should work as is when
2450 you get the config right.
2451
2452 -Chris Hallinan
2453 DS4.COM, Inc.
2454
2455It is essential to remember this, since it has some impact on the C
2456code for the initialization procedures:
2457
2458* Initialized global data (data segment) is read-only. Do not attempt
2459 to write it.
2460
b445bbb4 2461* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
2462 as zero data - BSS segment) at all - this is undefined, initiali-
2463 zation is performed later (when relocating to RAM).
2464
2465* Stack space is very limited. Avoid big data buffers or things like
2466 that.
2467
2468Having only the stack as writable memory limits means we cannot use
b445bbb4 2469normal global data to share information between the code. But it
2729af9d
WD
2470turned out that the implementation of U-Boot can be greatly
2471simplified by making a global data structure (gd_t) available to all
2472functions. We could pass a pointer to this data as argument to _all_
2473functions, but this would bloat the code. Instead we use a feature of
2474the GCC compiler (Global Register Variables) to share the data: we
2475place a pointer (gd) to the global data into a register which we
2476reserve for this purpose.
2477
2478When choosing a register for such a purpose we are restricted by the
2479relevant (E)ABI specifications for the current architecture, and by
2480GCC's implementation.
2481
2482For PowerPC, the following registers have specific use:
2483 R1: stack pointer
e7670f6c 2484 R2: reserved for system use
2729af9d
WD
2485 R3-R4: parameter passing and return values
2486 R5-R10: parameter passing
2487 R13: small data area pointer
2488 R30: GOT pointer
2489 R31: frame pointer
2490
e6bee808
JT
2491 (U-Boot also uses R12 as internal GOT pointer. r12
2492 is a volatile register so r12 needs to be reset when
2493 going back and forth between asm and C)
2729af9d 2494
e7670f6c 2495 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
2496
2497 Note: on PPC, we could use a static initializer (since the
2498 address of the global data structure is known at compile time),
2499 but it turned out that reserving a register results in somewhat
2500 smaller code - although the code savings are not that big (on
2501 average for all boards 752 bytes for the whole U-Boot image,
2502 624 text + 127 data).
2503
2504On ARM, the following registers are used:
2505
2506 R0: function argument word/integer result
2507 R1-R3: function argument word
12eba1b4
JH
2508 R9: platform specific
2509 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
2510 R11: argument (frame) pointer
2511 R12: temporary workspace
2512 R13: stack pointer
2513 R14: link register
2514 R15: program counter
2515
12eba1b4
JH
2516 ==> U-Boot will use R9 to hold a pointer to the global data
2517
2518 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 2519
0df01fd3 2520On Nios II, the ABI is documented here:
047f6ec0 2521 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
2522
2523 ==> U-Boot will use gp to hold a pointer to the global data
2524
2525 Note: on Nios II, we give "-G0" option to gcc and don't use gp
2526 to access small data sections, so gp is free.
2527
3fafced7
RC
2528On RISC-V, the following registers are used:
2529
2530 x0: hard-wired zero (zero)
2531 x1: return address (ra)
2532 x2: stack pointer (sp)
2533 x3: global pointer (gp)
2534 x4: thread pointer (tp)
2535 x5: link register (t0)
2536 x8: frame pointer (fp)
2537 x10-x11: arguments/return values (a0-1)
2538 x12-x17: arguments (a2-7)
2539 x28-31: temporaries (t3-6)
2540 pc: program counter (pc)
2541
2542 ==> U-Boot will use gp to hold a pointer to the global data
2543
2729af9d
WD
2544Memory Management:
2545------------------
2546
2547U-Boot runs in system state and uses physical addresses, i.e. the
2548MMU is not used either for address mapping nor for memory protection.
2549
2550The available memory is mapped to fixed addresses using the memory
2551controller. In this process, a contiguous block is formed for each
2552memory type (Flash, SDRAM, SRAM), even when it consists of several
2553physical memory banks.
2554
2555U-Boot is installed in the first 128 kB of the first Flash bank (on
2556TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
2557booting and sizing and initializing DRAM, the code relocates itself
2558to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 2559memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
2560configuration setting]. Below that, a structure with global Board
2561Info data is placed, followed by the stack (growing downward).
2562
2563Additionally, some exception handler code is copied to the low 8 kB
2564of DRAM (0x00000000 ... 0x00001FFF).
2565
2566So a typical memory configuration with 16 MB of DRAM could look like
2567this:
2568
2569 0x0000 0000 Exception Vector code
2570 :
2571 0x0000 1FFF
2572 0x0000 2000 Free for Application Use
2573 :
2574 :
2575
2576 :
2577 :
2578 0x00FB FF20 Monitor Stack (Growing downward)
2579 0x00FB FFAC Board Info Data and permanent copy of global data
2580 0x00FC 0000 Malloc Arena
2581 :
2582 0x00FD FFFF
2583 0x00FE 0000 RAM Copy of Monitor Code
2584 ... eventually: LCD or video framebuffer
2585 ... eventually: pRAM (Protected RAM - unchanged by reset)
2586 0x00FF FFFF [End of RAM]
2587
2588
2589System Initialization:
2590----------------------
c609719b 2591
2729af9d 2592In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 2593(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 2594configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
2595To be able to re-map memory U-Boot then jumps to its link address.
2596To be able to implement the initialization code in C, a (small!)
2597initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
2598which provide such a feature like), or in a locked part of the data
2599cache. After that, U-Boot initializes the CPU core, the caches and
2600the SIU.
2729af9d
WD
2601
2602Next, all (potentially) available memory banks are mapped using a
2603preliminary mapping. For example, we put them on 512 MB boundaries
2604(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
2605on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
2606programmed for SDRAM access. Using the temporary configuration, a
2607simple memory test is run that determines the size of the SDRAM
2608banks.
2609
2610When there is more than one SDRAM bank, and the banks are of
2611different size, the largest is mapped first. For equal size, the first
2612bank (CS2#) is mapped first. The first mapping is always for address
26130x00000000, with any additional banks following immediately to create
2614contiguous memory starting from 0.
2615
2616Then, the monitor installs itself at the upper end of the SDRAM area
2617and allocates memory for use by malloc() and for the global Board
2618Info data; also, the exception vector code is copied to the low RAM
2619pages, and the final stack is set up.
2620
2621Only after this relocation will you have a "normal" C environment;
2622until that you are restricted in several ways, mostly because you are
2623running from ROM, and because the code will have to be relocated to a
2624new address in RAM.
2625
2626
1405bfdf
HS
2627Contributing
2628============
90dc6704 2629
1405bfdf
HS
2630The U-Boot projects depends on contributions from the user community.
2631If you want to participate, please, have a look at the 'General'
4c4977cb 2632section of https://docs.u-boot.org/en/latest/develop/index.html
1405bfdf 2633where we describe coding standards and the patch submission process.
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