[J-u-boot.git] / include / configs / snapper9260.h

/*
 * Bluewater Systems Snapper 9260 and 9G20 modules
 *
 * (C) Copyright 2011 Bluewater Systems
 *   Author: Andre Renaud <[email protected]>
 *   Author: Ryan Mallon <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SoC type is defined in boards.cfg */
#include <asm/hardware.h>
#include <linux/sizes.h>

#define CONFIG_SYS_TEXT_BASE		0x21f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* External Crystal, in Hz */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
#define CONFIG_SYS_GENERIC_BOARD

/* CPU */
#define CONFIG_ARCH_CPU_INIT

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_FIT

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024) /* 64MB */
#define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM1 + 0x1000 - \
					 GENERATED_GBL_DATA_SIZE)

/* Mem test settings */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))

/* NAND Flash */
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
#define CONFIG_TFTP_PORT
#define CONFIG_TFTP_TSIZE

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE

/* GPIOs and IO expander */
#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP		1
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR	0x28
#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x28, 16} }

/* UARTs/Serial console */
#define CONFIG_ATMEL_USART
#ifndef CONFIG_DM_SERIAL
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#endif
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_PROMPT		"Snapper> "

/* I2C - Bit-bashed */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED	100000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define I2C_INIT do {							\
		at91_set_gpio_output(AT91_PIN_PA23, 1);			\
		at91_set_gpio_output(AT91_PIN_PA24, 1);			\
		at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);	\
		at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);	\
	} while (0)
#define I2C_SOFT_DECLARATIONS
#define I2C_ACTIVE
#define I2C_TRISTATE	at91_set_gpio_input(AT91_PIN_PA23, 1);
#define I2C_READ	at91_get_gpio_value(AT91_PIN_PA23);
#define I2C_SDA(bit) do {						\
		if (bit) {						\
			at91_set_gpio_input(AT91_PIN_PA23, 1);		\
		} else {						\
			at91_set_gpio_output(AT91_PIN_PA23, 1);		\
			at91_set_gpio_value(AT91_PIN_PA23, bit);	\
		}							\
	} while (0)
#define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
#define I2C_DELAY	udelay(2)

/* Boot options */
#define CONFIG_SYS_LOAD_ADDR		0x23000000
#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK

#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Environment settings */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		(512 << 10)
#define CONFIG_ENV_SIZE			(256 << 10)
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BOOTARGS			"console=ttyS0,115200 ip=any"

/* Console settings */
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
					 sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER

/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)

/* Command line configuration */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_SOURCE

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_I2C
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_USB
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO

#endif /* __CONFIG_H */
Commit	Line	Data
b8d41dda RM	1	/*
	2	* Bluewater Systems Snapper 9260 and 9G20 modules
	3	*
	4	* (C) Copyright 2011 Bluewater Systems
	5	* Author: Andre Renaud <[email protected]>
	6	* Author: Ryan Mallon <[email protected]>
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
b8d41dda RM	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
	14	/* SoC type is defined in boards.cfg */
	15	#include <asm/hardware.h>
1ace4022	16	#include <linux/sizes.h>
b8d41dda	17
5e8a749c	18	#define CONFIG_SYS_TEXT_BASE 0x21f00000
b8d41dda RM	19
	20	/* ARM asynchronous clock */
	21	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
	22	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
cd052cd9	23	#define CONFIG_SYS_GENERIC_BOARD
b8d41dda RM	24
	25	/* CPU */
	26	#define CONFIG_ARCH_CPU_INIT
b8d41dda RM	27
	28	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	29	#define CONFIG_SETUP_MEMORY_TAGS
	30	#define CONFIG_INITRD_TAG
	31	#define CONFIG_SKIP_LOWLEVEL_INIT
b8d41dda RM	32	#define CONFIG_DISPLAY_CPUINFO
	33	#define CONFIG_FIT
	34
	35	/* SDRAM */
	36	#define CONFIG_NR_DRAM_BANKS 1
	37	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
	38	#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
	39	#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
	40	GENERATED_GBL_DATA_SIZE)
	41
	42	/* Mem test settings */
	43	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	44	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
	45
	46	/* NAND Flash */
	47	#define CONFIG_NAND_ATMEL
	48	#define CONFIG_SYS_NO_FLASH
	49	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	50	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	51	#define CONFIG_SYS_NAND_DBW_8
	52	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
	53	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
	54	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	55	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
	56
	57	/* Ethernet */
	58	#define CONFIG_MACB
	59	#define CONFIG_RMII
b8d41dda RM	60	#define CONFIG_NET_RETRY_COUNT 20
b8d41dda RM	61	#define CONFIG_RESET_PHY_R
4535a24c	62	#define CONFIG_AT91_WANTS_COMMON_PHY
b8d41dda RM	63	#define CONFIG_TFTP_PORT
	64	#define CONFIG_TFTP_TSIZE
	65
	66	/* USB */
	67	#define CONFIG_USB_ATMEL
dcd2f1a0	68	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
b8d41dda RM	69	#define CONFIG_USB_OHCI_NEW
	70	#define CONFIG_DOS_PARTITION
	71	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	72	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
	73	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
	74	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
	75	#define CONFIG_USB_STORAGE
	76
	77	/* GPIOs and IO expander */
b8d41dda RM	78	#define CONFIG_ATMEL_LEGACY
	79	#define CONFIG_AT91_GPIO
	80	#define CONFIG_AT91_GPIO_PULLUP 1
	81	#define CONFIG_PCA953X
	82	#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
	83	#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
	84
	85	/* UARTs/Serial console */
	86	#define CONFIG_ATMEL_USART
1a1927f3	87	#ifndef CONFIG_DM_SERIAL
b8d41dda RM	88	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
b8d41dda RM	89	#define CONFIG_USART_ID ATMEL_ID_SYS
1a1927f3	90	#endif
b8d41dda	91	#define CONFIG_BAUDRATE 115200
b8d41dda RM	92	#define CONFIG_SYS_PROMPT "Snapper> "
	93
	94	/* I2C - Bit-bashed */
ea818dbb HS	95	#define CONFIG_SYS_I2C
	96	#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
	97	#define CONFIG_SYS_I2C_SOFT_SPEED 100000
	98	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
b8d41dda	99	#define CONFIG_SOFT_I2C_READ_REPEATED_START
b8d41dda RM	100	#define I2C_INIT do { \
	101	at91_set_gpio_output(AT91_PIN_PA23, 1); \
	102	at91_set_gpio_output(AT91_PIN_PA24, 1); \
	103	at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
	104	at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
	105	} while (0)
	106	#define I2C_SOFT_DECLARATIONS
	107	#define I2C_ACTIVE
	108	#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
	109	#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
	110	#define I2C_SDA(bit) do { \
	111	if (bit) { \
	112	at91_set_gpio_input(AT91_PIN_PA23, 1); \
	113	} else { \
	114	at91_set_gpio_output(AT91_PIN_PA23, 1); \
	115	at91_set_gpio_value(AT91_PIN_PA23, bit); \
	116	} \
	117	} while (0)
	118	#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
	119	#define I2C_DELAY udelay(2)
	120
	121	/* Boot options */
	122	#define CONFIG_SYS_LOAD_ADDR 0x23000000
	123	#define CONFIG_BOOTDELAY 3
	124	#define CONFIG_ZERO_BOOTDELAY_CHECK
	125
	126	#define CONFIG_BOOTP_BOOTFILESIZE
	127	#define CONFIG_BOOTP_BOOTPATH
	128	#define CONFIG_BOOTP_GATEWAY
	129	#define CONFIG_BOOTP_HOSTNAME
	130
	131	/* Environment settings */
	132	#define CONFIG_ENV_IS_IN_NAND
	133	#define CONFIG_ENV_OFFSET (512 << 10)
	134	#define CONFIG_ENV_SIZE (256 << 10)
	135	#define CONFIG_ENV_OVERWRITE
	136	#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
	137
	138	/* Console settings */
	139	#define CONFIG_SYS_CBSIZE 256
	140	#define CONFIG_SYS_MAXARGS 16
	141	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	142	sizeof(CONFIG_SYS_PROMPT) + 16)
	143	#define CONFIG_SYS_LONGHELP
b8d41dda RM	144	#define CONFIG_CMDLINE_EDITING
	145	#define CONFIG_AUTO_COMPLETE
	146	#define CONFIG_SYS_HUSH_PARSER
b8d41dda RM	147
	148	/* U-Boot memory settings */
	149	#define CONFIG_SYS_MALLOC_LEN (1 << 20)
b8d41dda RM	150
	151	/* Command line configuration */
	152	#include <config_cmd_default.h>
	153	#undef CONFIG_CMD_BDI
	154	#undef CONFIG_CMD_FPGA
	155	#undef CONFIG_CMD_IMI
	156	#undef CONFIG_CMD_IMLS
	157	#undef CONFIG_CMD_LOADS
	158	#undef CONFIG_CMD_SOURCE
	159
	160	#define CONFIG_CMD_PING
	161	#define CONFIG_CMD_DHCP
	162	#define CONFIG_CMD_FAT
	163	#define CONFIG_CMD_I2C
1a1927f3	164	#define CONFIG_CMD_GPIO
b8d41dda RM	165	#define CONFIG_CMD_USB
	166	#define CONFIG_CMD_MII
	167	#define CONFIG_CMD_NAND
	168	#define CONFIG_CMD_PCA953X
	169	#define CONFIG_CMD_PCA953X_INFO
	170
	171	#endif /* __CONFIG_H */