[J-u-boot.git] / include / configs / pico-imx8mq.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2018 NXP
 */

#ifndef __IMX8M_PICOPI_H
#define __IMX8M_PICOPI_H

#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>

#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300

#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_POWER
#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK		0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR	0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE		0x2000	/* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000	/* 512 KB */
#define CONFIG_SYS_SPL_PTE_RAM_BASE	0x41580000

/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR		0x182000
/* For RAW image gives a error info not panic */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE

#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

#define CONFIG_POWER
#define CONFIG_POWER_I2C
#endif

#define CONFIG_REMAKE_ELF

/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME			"FEC"

#define CONFIG_FEC_MXC
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_FEC_MXC_PHYADDR		1
#define FEC_QUIRK_ENET_MAC

#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE			0x30BE0000

#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#endif

/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	"script=boot.scr\0"						\
	"image=Image\0"							\
	"console=ttymxc0,115200\0"					\
	"fdt_addr=0x43000000\0"						\
	"fdt_high=0xffffffffffffffff\0"					\
	"fdt_file=imx8mq-pico-pi.dtb\0"					\
	"initrd_addr=0x43800000\0"					\
	"initrd_high=0xffffffffffffffff\0"				\
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"		\
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0"	\
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0"			\
	"mmcautodetect=yes\0"						\
	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 "	\
	"loadbootscript="						\
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; source\0"	\
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; "				\
		"run mmcargs; "						\
		"echo wait for boot; "					\
		"fi;\0"							\
	"netargs=setenv bootargs console=${console} "			\
		"root=/dev/nfs "					\
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"	\
	"netboot=echo Booting from net ...; "				\
		"run netargs;  "					\
		"if test ${ip_dyn} = yes; then "			\
			"setenv get_cmd dhcp; "				\
		"else "							\
			"setenv get_cmd tftp; "				\
		"fi; "							\
		"${get_cmd} ${loadaddr} ${image}; "			\
		"booti; "

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then "			\
		"if run loadbootscript; then "				\
			"run bootscript; "				\
		"else "							\
			"if run loadimage; then "			\
				"run mmcboot; "				\
			"else run netboot; "				\
			"fi; "						\
		"fi; "							\
	"else booti ${loadaddr} - ${fdt_addr}; fi"

/* Link Definitions */

#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE	0x80000
#define CONFIG_SYS_INIT_SP_OFFSET	\
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		\
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_MMCROOT			"/dev/mmcblk1p2"	/* USDHC2 */

#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define PHYS_SDRAM			0x40000000
#define PHYS_SDRAM_SIZE			0x80000000	/* 2 GiB DDR */

#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
					(PHYS_SDRAM_SIZE >> 1))

#define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR

/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE		1024
#define CONFIG_SYS_MAXARGS		64
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_IMX_BOOTAUX

#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_SYS_FSL_ESDHC_ADDR	0

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#define CONFIG_MXC_GPIO

#define CONFIG_OF_SYSTEM_SETUP

#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_PMIC
#endif

#define CONFIG_SYS_BOOTM_LEN		SZ_128M

#endif
Commit	Line	Data
b52fb0b0 MV	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* Copyright 2018 NXP
	4	*/
	5
	6	#ifndef __IMX8M_PICOPI_H
	7	#define __IMX8M_PICOPI_H
	8
	9	#include <linux/sizes.h>
	10	#include <asm/arch/imx-regs.h>
	11
	12	#define CONFIG_SPL_MAX_SIZE (124 * 1024)
	13	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	14	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
	15	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
b52fb0b0 MV	16
	17	#ifdef CONFIG_SPL_BUILD
	18	/#define CONFIG_ENABLE_DDR_TRAINING_DEBUG/
078111b9	19	#define CONFIG_SPL_WATCHDOG
9ca00684	20	#define CONFIG_SPL_DRIVERS_MISC
933b2f09	21	#define CONFIG_SPL_POWER
975e7cf3	22	#define CONFIG_SPL_I2C
b52fb0b0 MV	23	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
	24	#define CONFIG_SPL_STACK 0x187FF0
	25	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	26	#define CONFIG_SPL_LIBGENERIC_SUPPORT
83061dbd	27	#define CONFIG_SPL_GPIO
103c5f18	28	#define CONFIG_SPL_MMC
b52fb0b0 MV	29	#define CONFIG_SPL_BSS_START_ADDR 0x00180000
	30	#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
	31	#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
	32	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
	33	#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
	34
	35	/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
	36	#define CONFIG_MALLOC_F_ADDR 0x182000
	37	/* For RAW image gives a error info not panic */
	38	#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
	39
	40	#undef CONFIG_DM_MMC
	41	#undef CONFIG_DM_PMIC
	42
b52fb0b0 MV	43	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	44
	45	#define CONFIG_POWER
	46	#define CONFIG_POWER_I2C
	47	#endif
	48
	49	#define CONFIG_REMAKE_ELF
	50
b52fb0b0 MV	51	/* ENET Config */
	52	/* ENET1 */
	53	#if defined(CONFIG_CMD_NET)
b52fb0b0 MV	54	#define CONFIG_MII
	55	#define CONFIG_ETHPRIME "FEC"
	56
	57	#define CONFIG_FEC_MXC
	58	#define CONFIG_FEC_XCV_TYPE RGMII
	59	#define CONFIG_FEC_MXC_PHYADDR 1
	60	#define FEC_QUIRK_ENET_MAC
	61
	62	#define CONFIG_PHY_GIGE
	63	#define IMX_FEC_BASE 0x30BE0000
	64
	65	#define CONFIG_PHYLIB
	66	#define CONFIG_PHY_ATHEROS
	67	#endif
	68
	69	/* Initial environment variables */
	70	#define CONFIG_EXTRA_ENV_SETTINGS \
	71	"script=boot.scr\0" \
	72	"image=Image\0" \
	73	"console=ttymxc0,115200\0" \
	74	"fdt_addr=0x43000000\0" \
	75	"fdt_high=0xffffffffffffffff\0" \
	76	"fdt_file=imx8mq-pico-pi.dtb\0" \
	77	"initrd_addr=0x43800000\0" \
	78	"initrd_high=0xffffffffffffffff\0" \
	79	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	80	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	81	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	82	"mmcautodetect=yes\0" \
	83	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
	84	"loadbootscript=" \
	85	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	86	"bootscript=echo Running bootscript from mmc ...; source\0" \
	87	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	88	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	89	"mmcboot=echo Booting from mmc ...; " \
	90	"run mmcargs; " \
	91	"echo wait for boot; " \
	92	"fi;\0" \
	93	"netargs=setenv bootargs console=${console} " \
	94	"root=/dev/nfs " \
	95	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	96	"netboot=echo Booting from net ...; " \
	97	"run netargs; " \
	98	"if test ${ip_dyn} = yes; then " \
	99	"setenv get_cmd dhcp; " \
	100	"else " \
	101	"setenv get_cmd tftp; " \
	102	"fi; " \
	103	"${get_cmd} ${loadaddr} ${image}; " \
	104	"booti; "
	105
	106	#define CONFIG_BOOTCOMMAND \
	107	"mmc dev ${mmcdev}; if mmc rescan; then " \
	108	"if run loadbootscript; then " \
	109	"run bootscript; " \
	110	"else " \
	111	"if run loadimage; then " \
	112	"run mmcboot; " \
	113	"else run netboot; " \
	114	"fi; " \
	115	"fi; " \
	116	"else booti ${loadaddr} - ${fdt_addr}; fi"
	117
118	/* Link Definitions */
b52fb0b0 MV	119
	120	#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
	121	#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
	122	#define CONFIG_SYS_INIT_SP_OFFSET \
	123	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	124	#define CONFIG_SYS_INIT_SP_ADDR \
	125	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	126
b52fb0b0 MV	127	#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
b52fb0b0 MV	128
b52fb0b0 MV	129	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	130	#define PHYS_SDRAM 0x40000000
	131	#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
	132
	133	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
	134	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
	135	(PHYS_SDRAM_SIZE >> 1))
	136
b52fb0b0 MV	137	#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
	138
	139	/* Monitor Command Prompt */
	140	#define CONFIG_SYS_CBSIZE 1024
	141	#define CONFIG_SYS_MAXARGS 64
	142	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	143	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	144	sizeof(CONFIG_SYS_PROMPT) + 16)
	145
	146	#define CONFIG_IMX_BOOTAUX
	147
b52fb0b0 MV	148	#define CONFIG_SYS_FSL_USDHC_NUM 2
	149	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	150
	151	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	152
	153	#define CONFIG_MXC_GPIO
	154
b52fb0b0 MV	155	#define CONFIG_OF_SYSTEM_SETUP
	156
	157	#ifndef CONFIG_SPL_BUILD
	158	#define CONFIG_DM_PMIC
	159	#endif
	160
	161	#define CONFIG_SYS_BOOTM_LEN SZ_128M
	162
	163	#endif