[J-u-boot.git] / include / configs / mx7dsabresd.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2015 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX7D SABRESD board.
 */

#ifndef __MX7D_SABRESD_CONFIG_H
#define __MX7D_SABRESD_CONFIG_H

#include "mx7_common.h"

#define PHYS_SDRAM_SIZE			SZ_1G

#define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)

/* Network */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_XCV_TYPE             RGMII
#define CONFIG_ETHPRIME                 "FEC"
#define CONFIG_FEC_MXC_PHYADDR          0

#define CONFIG_PHY_BROADCOM
/* ENET1 */
#define IMX_FEC_BASE			ENET_IPS_BASE_ADDR

/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR       0

#undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_PLAN9
#undef CONFIG_BOOTM_RTEMS

/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		100000

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#ifdef CONFIG_IMX_BOOTAUX
/* Set to QSPI1 A flash at default */
#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000

#define UPDATE_M4_ENV \
	"m4image=m4_qspi.bin\0" \
	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
	"update_m4_from_sd=" \
		"if sf probe 0:0; then " \
			"if run loadm4image; then " \
				"setexpr fw_sz ${filesize} + 0xffff; " \
				"setexpr fw_sz ${fw_sz} / 0x10000; "	\
				"setexpr fw_sz ${fw_sz} * 0x10000; "	\
				"sf erase 0x0 ${fw_sz}; " \
				"sf write ${loadaddr} 0x0 ${filesize}; " \
			"fi; " \
		"fi\0" \
	"m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
#else
#define UPDATE_M4_ENV ""
#endif

#define CONFIG_MFG_ENV_SETTINGS \
	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
		"rdinit=/linuxrc " \
		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
		"g_mass_storage.iSerialNumber=\"\" "\
		"clk_ignore_unused "\
		"\0" \
	"initrd_addr=0x83800000\0" \
	"initrd_high=0xffffffff\0" \
	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \

#define CONFIG_DFU_ENV_SETTINGS \
	"dfu_alt_info=image raw 0 0x800000;"\
		"u-boot raw 0 0x4000;"\
		"bootimg part 0 1;"\
		"rootfs part 0 2\0" \

#define CONFIG_EXTRA_ENV_SETTINGS \
	UPDATE_M4_ENV \
	CONFIG_MFG_ENV_SETTINGS \
	CONFIG_DFU_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx7d-sdb.dtb\0" \
	"fdt_addr=0x83000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev};" \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ			1000

/* Physical Memory Map */
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_ENV_SIZE			SZ_8K

/*
 * If want to use nand, define CONFIG_NAND_MXS and rework board
 * to support nand, since emmc has pin conflicts with nand
 */
#ifdef CONFIG_NAND_MXS
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION

/* DMA stuff, needed for GPMI/MXS NAND support */
#endif

#define CONFIG_ENV_OFFSET		(12 * SZ_64K)
#ifdef CONFIG_NAND_MXS
#define CONFIG_SYS_FSL_USDHC_NUM	1
#else
#define CONFIG_SYS_FSL_USDHC_NUM	2
#endif

#define CONFIG_SYS_MMC_ENV_DEV		0   /* USDHC1 */
#define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
#define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* USDHC1 */

/* USB Configs */
#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)

#define CONFIG_IMX_THERMAL

#define CONFIG_USBD_HS

#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#endif

#ifdef CONFIG_FSL_QSPI
#define CONFIG_SYS_FSL_QSPI_AHB
#define FSL_QSPI_FLASH_NUM		1
#define FSL_QSPI_FLASH_SIZE		SZ_64M
#define QSPI0_BASE_ADDR			QSPI1_IPS_BASE_ADDR
#define QSPI0_AMBA_BASE			QSPI0_ARB_BASE_ADDR
#endif

#endif	/* __CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
1a8150d4 AA	2	/*
	3	* Copyright (C) 2015 Freescale Semiconductor, Inc.
	4	*
	5	* Configuration settings for the Freescale i.MX7D SABRESD board.
1a8150d4 AA	6	*/
	7
	8	#ifndef __MX7D_SABRESD_CONFIG_H
	9	#define __MX7D_SABRESD_CONFIG_H
	10
	11	#include "mx7_common.h"
	12
1a8150d4 AA	13	#define PHYS_SDRAM_SIZE SZ_1G
1a8150d4 AA	14
5d69269d FE	15	#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
5d69269d FE	16
6baa2616 FE	17	/* Size of malloc() pool */
	18	#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
	19
1a8150d4	20	/* Network */
1a8150d4	21	#define CONFIG_FEC_MXC
1a8150d4 AA	22	#define CONFIG_FEC_XCV_TYPE RGMII
	23	#define CONFIG_ETHPRIME "FEC"
	24	#define CONFIG_FEC_MXC_PHYADDR 0
	25
1a8150d4	26	#define CONFIG_PHY_BROADCOM
1a8150d4 AA	27	/* ENET1 */
	28	#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
	29
	30	/* MMC Config*/
	31	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	32
1a8150d4 AA	33	#undef CONFIG_BOOTM_NETBSD
	34	#undef CONFIG_BOOTM_PLAN9
	35	#undef CONFIG_BOOTM_RTEMS
	36
1a8150d4	37	/* I2C configs */
1a8150d4	38	#define CONFIG_SYS_I2C_MXC
1a8150d4 AA	39	#define CONFIG_SYS_I2C_SPEED 100000
1a8150d4 AA	40
1a8150d4 AA	41	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
1a8150d4 AA	42
79e355fb PF	43	#ifdef CONFIG_IMX_BOOTAUX
	44	/* Set to QSPI1 A flash at default */
	45	#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
79e355fb PF	46
	47	#define UPDATE_M4_ENV \
	48	"m4image=m4_qspi.bin\0" \
	49	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
	50	"update_m4_from_sd=" \
	51	"if sf probe 0:0; then " \
	52	"if run loadm4image; then " \
	53	"setexpr fw_sz ${filesize} + 0xffff; " \
	54	"setexpr fw_sz ${fw_sz} / 0x10000; " \
	55	"setexpr fw_sz ${fw_sz} * 0x10000; " \
	56	"sf erase 0x0 ${fw_sz}; " \
	57	"sf write ${loadaddr} 0x0 ${filesize}; " \
	58	"fi; " \
	59	"fi\0" \
	60	"m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
	61	#else
	62	#define UPDATE_M4_ENV ""
	63	#endif
	64
1a8150d4 AA	65	#define CONFIG_MFG_ENV_SETTINGS \
	66	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
	67	"rdinit=/linuxrc " \
	68	"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
	69	"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
	70	"g_mass_storage.iSerialNumber=\"\" "\
	71	"clk_ignore_unused "\
	72	"\0" \
	73	"initrd_addr=0x83800000\0" \
	74	"initrd_high=0xffffffff\0" \
	75	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
	76
73f1b80c TJL	77	#define CONFIG_DFU_ENV_SETTINGS \
	78	"dfu_alt_info=image raw 0 0x800000;"\
	79	"u-boot raw 0 0x4000;"\
	80	"bootimg part 0 1;"\
	81	"rootfs part 0 2\0" \
	82
1a8150d4	83	#define CONFIG_EXTRA_ENV_SETTINGS \
79e355fb	84	UPDATE_M4_ENV \
1a8150d4	85	CONFIG_MFG_ENV_SETTINGS \
73f1b80c	86	CONFIG_DFU_ENV_SETTINGS \
1a8150d4 AA	87	"script=boot.scr\0" \
	88	"image=zImage\0" \
	89	"console=ttymxc0\0" \
	90	"fdt_high=0xffffffff\0" \
	91	"initrd_high=0xffffffff\0" \
	92	"fdt_file=imx7d-sdb.dtb\0" \
	93	"fdt_addr=0x83000000\0" \
	94	"boot_fdt=try\0" \
	95	"ip_dyn=yes\0" \
ebe517b6	96	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
1a8150d4 AA	97	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	98	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	99	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	100	"mmcautodetect=yes\0" \
	101	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	102	"root=${mmcroot}\0" \
	103	"loadbootscript=" \
	104	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	105	"bootscript=echo Running bootscript from mmc ...; " \
	106	"source\0" \
	107	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	108	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	109	"mmcboot=echo Booting from mmc ...; " \
	110	"run mmcargs; " \
	111	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	112	"if run loadfdt; then " \
	113	"bootz ${loadaddr} - ${fdt_addr}; " \
	114	"else " \
	115	"if test ${boot_fdt} = try; then " \
	116	"bootz; " \
	117	"else " \
	118	"echo WARN: Cannot load the DT; " \
	119	"fi; " \
	120	"fi; " \
	121	"else " \
	122	"bootz; " \
	123	"fi;\0" \
	124	"netargs=setenv bootargs console=${console},${baudrate} " \
	125	"root=/dev/nfs " \
	126	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	127	"netboot=echo Booting from net ...; " \
	128	"run netargs; " \
	129	"if test ${ip_dyn} = yes; then " \
	130	"setenv get_cmd dhcp; " \
	131	"else " \
	132	"setenv get_cmd tftp; " \
	133	"fi; " \
	134	"${get_cmd} ${image}; " \
	135	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	136	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	137	"bootz ${loadaddr} - ${fdt_addr}; " \
	138	"else " \
	139	"if test ${boot_fdt} = try; then " \
	140	"bootz; " \
	141	"else " \
	142	"echo WARN: Cannot load the DT; " \
	143	"fi; " \
	144	"fi; " \
	145	"else " \
	146	"bootz; " \
	147	"fi;\0"
	148
	149	#define CONFIG_BOOTCOMMAND \
	150	"mmc dev ${mmcdev};" \
	151	"mmc dev ${mmcdev}; if mmc rescan; then " \
	152	"if run loadbootscript; then " \
	153	"run bootscript; " \
	154	"else " \
	155	"if run loadimage; then " \
	156	"run mmcboot; " \
	157	"else run netboot; " \
	158	"fi; " \
	159	"fi; " \
	160	"else run netboot; fi"
161
1a8150d4 AA	162	#define CONFIG_SYS_MEMTEST_START 0x80000000
	163	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
	164
	165	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	166	#define CONFIG_SYS_HZ 1000
	167
1a8150d4	168	/* Physical Memory Map */
1a8150d4 AA	169	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	170
	171	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	172	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	173	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	174
	175	#define CONFIG_SYS_INIT_SP_OFFSET \
	176	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	177	#define CONFIG_SYS_INIT_SP_ADDR \
	178	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	179
e856bdcf	180	/* environment organization */
1a8150d4	181	#define CONFIG_ENV_SIZE SZ_8K
6e1a41cd PF	182
	183	/*
	184	* If want to use nand, define CONFIG_NAND_MXS and rework board
	185	* to support nand, since emmc has pin conflicts with nand
	186	*/
	187	#ifdef CONFIG_NAND_MXS
6e1a41cd PF	188	/* NAND stuff */
	189	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	190	#define CONFIG_SYS_NAND_BASE 0x40000000
	191	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	192	#define CONFIG_SYS_NAND_ONFI_DETECTION
	193
	194	/* DMA stuff, needed for GPMI/MXS NAND support */
6e1a41cd PF	195	#endif
6e1a41cd PF	196
da384fc6	197	#define CONFIG_ENV_OFFSET (12 * SZ_64K)
6e1a41cd PF	198	#ifdef CONFIG_NAND_MXS
	199	#define CONFIG_SYS_FSL_USDHC_NUM 1
	200	#else
1a8150d4	201	#define CONFIG_SYS_FSL_USDHC_NUM 2
6e1a41cd	202	#endif
1a8150d4 AA	203
	204	#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
	205	#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
	206	#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
	207
1a8150d4	208	/* USB Configs */
1a8150d4	209	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
1a8150d4 AA	210
	211	#define CONFIG_IMX_THERMAL
	212
73f1b80c	213	#define CONFIG_USBD_HS
73f1b80c	214
ebe517b6	215	#ifdef CONFIG_VIDEO
ebe517b6 PF	216	#define CONFIG_VIDEO_MXS
ebe517b6 PF	217	#define CONFIG_VIDEO_LOGO
ebe517b6 PF	218	#define CONFIG_SPLASH_SCREEN
ebe517b6 PF	219	#define CONFIG_SPLASH_SCREEN_ALIGN
ebe517b6 PF	220	#define CONFIG_BMP_16BPP
	221	#define CONFIG_VIDEO_BMP_RLE8
	222	#define CONFIG_VIDEO_BMP_LOGO
	223	#endif
	224
53cc647d	225	#ifdef CONFIG_FSL_QSPI
3b823350	226	#define CONFIG_SYS_FSL_QSPI_AHB
53cc647d PF	227	#define FSL_QSPI_FLASH_NUM 1
	228	#define FSL_QSPI_FLASH_SIZE SZ_64M
	229	#define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
	230	#define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
	231	#endif
	232
1a8150d4	233	#endif /* __CONFIG_H */