[J-u-boot.git] / include / configs / taurus.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
 * (C) Copyright 2013 Siemens AG
 *
 * Based on:
 * U-Boot file: include/configs/at91sam9260ek.h
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <[email protected]>
 * Lead Tech Design <www.leadtechdesign.com>
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>
#include <linux/sizes.h>

/*
 * Warning: changing CONFIG_SYS_TEXT_BASE requires
 * adapting the initial boot program.
 * Since the linker has to swallow that define, we must use a pure
 * hex number here!
 */

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */

/* Misc CPU related */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */

#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS

/*
 * SDRAM: 1 bank, min 32, max 128 MB
 * Initialized before u-boot gets started.
 */
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_AT91_WANTS_COMMON_PHY

/* USB */
#if defined(CONFIG_BOARD_TAURUS)
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2

/* USB DFU support */

#define CONFIG_USB_GADGET_AT91

/* DFU class support */
#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
#define DFU_MANIFEST_POLL_TIMEOUT	25000
#endif

/* SPI EEPROM */
#define TAURUS_SPI_MASK (1 << 4)

#if defined(CONFIG_SPL_BUILD)
/* SPL related */
#endif

/* load address */
#define CONFIG_SYS_LOAD_ADDR			0x22000000

/* bootstrap in spi flash , u-boot + env + linux in nandflash */

#ifndef CONFIG_SPL_BUILD
#if defined(CONFIG_BOARD_AXM)
#define CONFIG_EXTRA_ENV_SETTINGS \
	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
		"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
	"boot_retries=0\0" \
	"ethact=macb0\0" \
	"flash_nfs=run nand_kernel;run nfsargs;run addip;" \
		"upgrade_available;bootm ${kernel_ram};reset\0" \
	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
		"bootm ${kernel_ram};reset\0" \
	"flash_self_test=run nand_kernel;run setbootargs addtest;" \
		"upgrade_available;bootm ${kernel_ram};reset\0" \
	"hostname=systemone\0" \
	"kernel_Off=0x00200000\0" \
	"kernel_Off_fallback=0x03800000\0" \
	"kernel_ram=0x21500000\0" \
	"kernel_size=0x00400000\0" \
	"kernel_size_fallback=0x00400000\0" \
	"loads_echo=1\0" \
	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
		"${kernel_size}\0" \
	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
		"run nfsargs;run addip;upgrade_available;" \
		"bootm ${kernel_ram};reset\0" \
	"netdev=eth0\0" \
	"nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
		"rw nfsroot=${serverip}:${rootpath} " \
		"at91sam9_wdt.wdt_timeout=16\0" \
	"partitionset_active=A\0" \
	"preboot=echo;echo Type 'run flash_self' to use kernel and root " \
		"filesystem on memory;echo Type 'run flash_nfs' to use " \
		"kernel from memory and root filesystem over NFS;echo Type " \
		"'run net_nfs' to get Kernel over TFTP and mount root " \
		"filesystem over NFS;echo\0" \
	"project_dir=systemone\0" \
	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
	"rootfs=/dev/mtdblock5\0" \
	"rootfs_fallback=/dev/mtdblock7\0" \
	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
		"root=${rootfs} rootfstype=jffs2 panic=7 " \
		"at91sam9_wdt.wdt_timeout=16\0" \
	"stderr=serial\0" \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"upgrade_available=0\0"
#endif
#endif /* #ifndef CONFIG_SPL_BUILD */
/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN \
	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)

/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE		(31 * SZ_512)
#define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
					CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN

#define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)

#define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
#define CONFIG_SYS_USE_NANDFLASH	1
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
#define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
#define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_5_ADDR_CYCLE

#define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
#define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
#define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCSIZE		256
#define CONFIG_SYS_NAND_ECCBYTES	3
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
					  48, 49, 50, 51, 52, 53, 54, 55, \
					  56, 57, 58, 59, 60, 61, 62, 63, }

#define CONFIG_SPL_ATMEL_SIZE
#define CONFIG_SYS_MASTER_CLOCK		132096000
#define AT91_PLL_LOCK_TIMEOUT		1000000
#define CONFIG_SYS_AT91_PLLA		0x202A3F01
#define CONFIG_SYS_MCKR			0x1300
#define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
#define CONFIG_SYS_AT91_PLLB		0x10193F05

#define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
0f8bc283 HS	2	/*
	3	* Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
	4	* (C) Copyright 2013 Siemens AG
	5	*
	6	* Based on:
	7	* U-Boot file: include/configs/at91sam9260ek.h
	8	*
	9	* (C) Copyright 2007-2008
	10	* Stelian Pop <[email protected]>
	11	* Lead Tech Design <www.leadtechdesign.com>
0f8bc283 HS	12	*/
	13
	14	#ifndef __CONFIG_H
	15	#define __CONFIG_H
	16
	17	/*
	18	* SoC must be defined first, before hardware.h is included.
	19	* In this case SoC is defined in boards.cfg.
	20	*/
	21	#include <asm/hardware.h>
40540823	22	#include <linux/sizes.h>
0f8bc283	23
0f8bc283 HS	24	/*
	25	* Warning: changing CONFIG_SYS_TEXT_BASE requires
	26	* adapting the initial boot program.
	27	* Since the linker has to swallow that define, we must use a pure
	28	* hex number here!
	29	*/
	30
0f8bc283 HS	31	/* ARM asynchronous clock */
	32	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	33	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
0f8bc283 HS	34
0f8bc283 HS	35	/* Misc CPU related */
0f8bc283 HS	36	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	37	#define CONFIG_SETUP_MEMORY_TAGS
	38	#define CONFIG_INITRD_TAG
0cac0fb0	39
8e6e8221	40	#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
0f8bc283	41
0f8bc283 HS	42	/* general purpose I/O */
0f8bc283 HS	43	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
0f8bc283 HS	44	#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
0f8bc283 HS	45
0f8bc283 HS	46	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
0f8bc283 HS	47	#define CONFIG_USART_ID ATMEL_ID_SYS
0f8bc283	48
0f8bc283 HS	49	/*
	50	* SDRAM: 1 bank, min 32, max 128 MB
	51	* Initialized before u-boot gets started.
	52	*/
0f8bc283	53	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
0ed366ff	54	#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
0f8bc283 HS	55
	56	/*
	57	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	58	* leaving the correct space for initial global data structure above
	59	* that address while providing maximum stack area below.
	60	*/
0ed366ff	61	#define CONFIG_SYS_INIT_SP_ADDR \
0f8bc283 HS	62	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
	63
	64	/* NAND flash */
	65	#ifdef CONFIG_CMD_NAND
0f8bc283 HS	66	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	67	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	68	#define CONFIG_SYS_NAND_DBW_8
	69	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	70	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	71	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	72	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
	73	#endif
	74
0f8bc283 HS	75	/* Ethernet */
	76	#define CONFIG_MACB
	77	#define CONFIG_RMII
	78	#define CONFIG_AT91_WANTS_COMMON_PHY
	79
	80	/* USB */
	81	#if defined(CONFIG_BOARD_TAURUS)
	82	#define CONFIG_USB_ATMEL
e8b81eef	83	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
0f8bc283 HS	84	#define CONFIG_USB_OHCI_NEW
	85	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	86	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
	87	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
	88	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
e8b81eef HS	89
e8b81eef HS	90	/* USB DFU support */
e8b81eef	91
e8b81eef HS	92	#define CONFIG_USB_GADGET_AT91
	93
	94	/* DFU class support */
e8b81eef HS	95	#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
e8b81eef HS	96	#define DFU_MANIFEST_POLL_TIMEOUT 25000
0f8bc283 HS	97	#endif
0f8bc283 HS	98
50921cdc	99	/* SPI EEPROM */
50921cdc	100	#define TAURUS_SPI_MASK (1 << 4)
50921cdc	101
a1655bb2 HS	102	#if defined(CONFIG_SPL_BUILD)
a1655bb2 HS	103	/* SPL related */
a1655bb2 HS	104	#endif
a1655bb2 HS	105
0f8bc283 HS	106	/* load address */
	107	#define CONFIG_SYS_LOAD_ADDR 0x22000000
	108
	109	/* bootstrap in spi flash , u-boot + env + linux in nandflash */
40540823	110
0cac0fb0 HS	111	#ifndef CONFIG_SPL_BUILD
	112	#if defined(CONFIG_BOARD_AXM)
	113	#define CONFIG_EXTRA_ENV_SETTINGS \
	114	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
	115	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
	116	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
	117	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
	118	"boot_retries=0\0" \
	119	"ethact=macb0\0" \
	120	"flash_nfs=run nand_kernel;run nfsargs;run addip;" \
	121	"upgrade_available;bootm ${kernel_ram};reset\0" \
	122	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
	123	"bootm ${kernel_ram};reset\0" \
	124	"flash_self_test=run nand_kernel;run setbootargs addtest;" \
	125	"upgrade_available;bootm ${kernel_ram};reset\0" \
	126	"hostname=systemone\0" \
	127	"kernel_Off=0x00200000\0" \
	128	"kernel_Off_fallback=0x03800000\0" \
	129	"kernel_ram=0x21500000\0" \
	130	"kernel_size=0x00400000\0" \
	131	"kernel_size_fallback=0x00400000\0" \
	132	"loads_echo=1\0" \
	133	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
	134	"${kernel_size}\0" \
	135	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
	136	"run nfsargs;run addip;upgrade_available;" \
	137	"bootm ${kernel_ram};reset\0" \
	138	"netdev=eth0\0" \
	139	"nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
	140	"rw nfsroot=${serverip}:${rootpath} " \
	141	"at91sam9_wdt.wdt_timeout=16\0" \
	142	"partitionset_active=A\0" \
	143	"preboot=echo;echo Type 'run flash_self' to use kernel and root " \
	144	"filesystem on memory;echo Type 'run flash_nfs' to use " \
	145	"kernel from memory and root filesystem over NFS;echo Type " \
	146	"'run net_nfs' to get Kernel over TFTP and mount root " \
	147	"filesystem over NFS;echo\0" \
	148	"project_dir=systemone\0" \
	149	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
	150	"rootfs=/dev/mtdblock5\0" \
	151	"rootfs_fallback=/dev/mtdblock7\0" \
	152	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
	153	"root=${rootfs} rootfstype=jffs2 panic=7 " \
	154	"at91sam9_wdt.wdt_timeout=16\0" \
	155	"stderr=serial\0" \
	156	"stdin=serial\0" \
	157	"stdout=serial\0" \
	158	"upgrade_available=0\0"
	159	#endif
	160	#endif /* #ifndef CONFIG_SPL_BUILD */
0f8bc283 HS	161	/*
	162	* Size of malloc() pool
	163	*/
	164	#define CONFIG_SYS_MALLOC_LEN \
e8b81eef	165	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
0f8bc283	166
237e3793	167	/* Defines for SPL */
40540823 HS	168	#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
40540823 HS	169	#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
a1655bb2 HS	170	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
	171	CONFIG_SYS_MALLOC_LEN)
	172	#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
237e3793 HS	173
237e3793 HS	174	#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
0ed366ff	175	#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
237e3793	176
237e3793	177	#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
237e3793	178	#define CONFIG_SYS_USE_NANDFLASH 1
237e3793	179	#define CONFIG_SPL_NAND_BASE
237e3793 HS	180	#define CONFIG_SPL_NAND_RAW_ONLY
	181	#define CONFIG_SPL_NAND_SOFTECC
	182	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
e8b81eef	183	#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
237e3793 HS	184	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	185	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
	186	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	187
0ed366ff HS	188	#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
	189	#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
	190	#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
237e3793 HS	191	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	192	CONFIG_SYS_NAND_PAGE_SIZE)
	193	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	194	#define CONFIG_SYS_NAND_ECCSIZE 256
	195	#define CONFIG_SYS_NAND_ECCBYTES 3
	196	#define CONFIG_SYS_NAND_OOBSIZE 64
	197	#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
	198	48, 49, 50, 51, 52, 53, 54, 55, \
	199	56, 57, 58, 59, 60, 61, 62, 63, }
	200
237e3793 HS	201	#define CONFIG_SPL_ATMEL_SIZE
	202	#define CONFIG_SYS_MASTER_CLOCK 132096000
	203	#define AT91_PLL_LOCK_TIMEOUT 1000000
	204	#define CONFIG_SYS_AT91_PLLA 0x202A3F01
	205	#define CONFIG_SYS_MCKR 0x1300
	206	#define CONFIG_SYS_MCKR_CSS (0x02 \| CONFIG_SYS_MCKR)
	207	#define CONFIG_SYS_AT91_PLLB 0x10193F05
40540823	208
fc89afba SR	209	#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
	210	#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
	211
0f8bc283	212	#endif