[J-u-boot.git] / cmd / x86 / mtrr.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2014 Google, Inc
 */

#include <common.h>
#include <command.h>
#include <asm/msr.h>
#include <asm/mtrr.h>

static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
	"Uncacheable",
	"Combine",
	"2",
	"3",
	"Through",
	"Protect",
	"Back",
};

static int do_mtrr_list(void)
{
	int i;

	printf("Reg Valid Write-type   %-16s %-16s %-16s\n", "Base   ||",
	       "Mask   ||", "Size   ||");
	for (i = 0; i < MTRR_COUNT; i++) {
		const char *type = "Invalid";
		uint64_t base, mask, size;
		bool valid;

		base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
		mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
		size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
		size |= (1 << 12) - 1;
		size += 1;
		valid = mask & MTRR_PHYS_MASK_VALID;
		type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK];
		printf("%d   %-5s %-12s %016llx %016llx %016llx\n", i,
		       valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK,
		       mask & ~MTRR_PHYS_MASK_VALID, size);
	}

	return 0;
}

static int do_mtrr_set(uint reg, int argc, char *const argv[])
{
	const char *typename = argv[0];
	struct mtrr_state state;
	uint32_t start, size;
	uint64_t base, mask;
	int i, type = -1;
	bool valid;

	if (argc < 3)
		return CMD_RET_USAGE;
	for (i = 0; i < MTRR_TYPE_COUNT; i++) {
		if (*typename == *mtrr_type_name[i])
			type = i;
	}
	if (type == -1) {
		printf("Invalid type name %s\n", typename);
		return CMD_RET_USAGE;
	}
	start = simple_strtoul(argv[1], NULL, 16);
	size = simple_strtoul(argv[2], NULL, 16);

	base = start | type;
	valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID;
	mask = ~((uint64_t)size - 1);
	mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1;
	if (valid)
		mask |= MTRR_PHYS_MASK_VALID;

	printf("base=%llx, mask=%llx\n", base, mask);
	mtrr_open(&state, true);
	wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
	wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
	mtrr_close(&state, true);

	return 0;
}

static int mtrr_set_valid(int reg, bool valid)
{
	struct mtrr_state state;
	uint64_t mask;

	mtrr_open(&state, true);
	mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg));
	if (valid)
		mask |= MTRR_PHYS_MASK_VALID;
	else
		mask &= ~MTRR_PHYS_MASK_VALID;
	wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
	mtrr_close(&state, true);

	return 0;
}

static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
		   char *const argv[])
{
	const char *cmd;
	uint reg;

	cmd = argv[1];
	if (argc < 2 || *cmd == 'l')
		return do_mtrr_list();
	argc -= 2;
	argv += 2;
	if (argc <= 0)
		return CMD_RET_USAGE;
	reg = simple_strtoul(argv[0], NULL, 16);
	if (reg >= MTRR_COUNT) {
		printf("Invalid register number\n");
		return CMD_RET_USAGE;
	}
	if (*cmd == 'e')
		return mtrr_set_valid(reg, true);
	else if (*cmd == 'd')
		return mtrr_set_valid(reg, false);
	else if (*cmd == 's')
		return do_mtrr_set(reg, argc - 1, argv + 1);
	else
		return CMD_RET_USAGE;

	return 0;
}

U_BOOT_CMD(
	mtrr,	6,	1,	do_mtrr,
	"Use x86 memory type range registers (32-bit only)",
	"[list]        - list current registers\n"
	"set <reg> <type> <start> <size>   - set a register\n"
	"\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
	"disable <reg>      - disable a register\n"
	"ensable <reg>      - enable a register"
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
cb3b2e62 SG	2	/*
cb3b2e62 SG	3	* (C) Copyright 2014 Google, Inc
cb3b2e62 SG	4	*/
	5
	6	#include <common.h>
09140113	7	#include <command.h>
cb3b2e62 SG	8	#include <asm/msr.h>
	9	#include <asm/mtrr.h>
	10
	11	static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
	12	"Uncacheable",
	13	"Combine",
	14	"2",
	15	"3",
	16	"Through",
	17	"Protect",
	18	"Back",
	19	};
	20
	21	static int do_mtrr_list(void)
	22	{
	23	int i;
	24
	25	printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base \|\|",
	26	"Mask \|\|", "Size \|\|");
	27	for (i = 0; i < MTRR_COUNT; i++) {
	28	const char *type = "Invalid";
	29	uint64_t base, mask, size;
	30	bool valid;
	31
	32	base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
	33	mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
	34	size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
	35	size \|= (1 << 12) - 1;
	36	size += 1;
	37	valid = mask & MTRR_PHYS_MASK_VALID;
	38	type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK];
	39	printf("%d %-5s %-12s %016llx %016llx %016llx\n", i,
df07d919 BM	40	valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK,
df07d919 BM	41	mask & ~MTRR_PHYS_MASK_VALID, size);
cb3b2e62 SG	42	}
	43
	44	return 0;
	45	}
	46
09140113	47	static int do_mtrr_set(uint reg, int argc, char *const argv[])
cb3b2e62 SG	48	{
	49	const char *typename = argv[0];
	50	struct mtrr_state state;
	51	uint32_t start, size;
	52	uint64_t base, mask;
	53	int i, type = -1;
	54	bool valid;
	55
	56	if (argc < 3)
	57	return CMD_RET_USAGE;
	58	for (i = 0; i < MTRR_TYPE_COUNT; i++) {
	59	if (typename == mtrr_type_name[i])
	60	type = i;
	61	}
	62	if (type == -1) {
	63	printf("Invalid type name %s\n", typename);
	64	return CMD_RET_USAGE;
	65	}
	66	start = simple_strtoul(argv[1], NULL, 16);
	67	size = simple_strtoul(argv[2], NULL, 16);
	68
	69	base = start \| type;
	70	valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID;
	71	mask = ~((uint64_t)size - 1);
	72	mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1;
	73	if (valid)
	74	mask \|= MTRR_PHYS_MASK_VALID;
	75
	76	printf("base=%llx, mask=%llx\n", base, mask);
590cee83	77	mtrr_open(&state, true);
cb3b2e62 SG	78	wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
cb3b2e62 SG	79	wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
590cee83	80	mtrr_close(&state, true);
cb3b2e62 SG	81
	82	return 0;
	83	}
	84
	85	static int mtrr_set_valid(int reg, bool valid)
	86	{
	87	struct mtrr_state state;
	88	uint64_t mask;
	89
590cee83	90	mtrr_open(&state, true);
cb3b2e62 SG	91	mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg));
	92	if (valid)
	93	mask \|= MTRR_PHYS_MASK_VALID;
	94	else
	95	mask &= ~MTRR_PHYS_MASK_VALID;
	96	wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
590cee83	97	mtrr_close(&state, true);
cb3b2e62 SG	98
	99	return 0;
	100	}
	101
09140113 SG	102	static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	103	char *const argv[])
cb3b2e62 SG	104	{
	105	const char *cmd;
	106	uint reg;
	107
	108	cmd = argv[1];
	109	if (argc < 2 \|\| *cmd == 'l')
	110	return do_mtrr_list();
	111	argc -= 2;
	112	argv += 2;
	113	if (argc <= 0)
	114	return CMD_RET_USAGE;
	115	reg = simple_strtoul(argv[0], NULL, 16);
	116	if (reg >= MTRR_COUNT) {
	117	printf("Invalid register number\n");
	118	return CMD_RET_USAGE;
	119	}
	120	if (*cmd == 'e')
	121	return mtrr_set_valid(reg, true);
	122	else if (*cmd == 'd')
	123	return mtrr_set_valid(reg, false);
	124	else if (*cmd == 's')
	125	return do_mtrr_set(reg, argc - 1, argv + 1);
	126	else
	127	return CMD_RET_USAGE;
	128
	129	return 0;
	130	}
	131
	132	U_BOOT_CMD(
	133	mtrr, 6, 1, do_mtrr,
	134	"Use x86 memory type range registers (32-bit only)",
	135	"[list] - list current registers\n"
	136	"set <reg> <type> <start> <size> - set a register\n"
	137	"\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
	138	"disable <reg> - disable a register\n"
	139	"ensable <reg> - enable a register"
	140	);