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9755e3db MS |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * (C) Copyright 2014 - 2019 Xilinx, Inc. | |
4 | * Michal Simek <[email protected]> | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
09140113 | 8 | #include <env.h> |
fc274a59 | 9 | #include <asm/sections.h> |
9755e3db MS |
10 | #include <dm/uclass.h> |
11 | #include <i2c.h> | |
a29511ee | 12 | #include <linux/sizes.h> |
80fdef12 | 13 | #include "board.h" |
9755e3db | 14 | |
829e8c73 MS |
15 | int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) |
16 | { | |
17 | int ret = -EINVAL; | |
18 | ||
19 | #if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) | |
20 | struct udevice *dev; | |
21 | ofnode eeprom; | |
22 | ||
23 | eeprom = ofnode_get_chosen_node("xlnx,eeprom"); | |
24 | if (!ofnode_valid(eeprom)) | |
25 | return -ENODEV; | |
26 | ||
27 | debug("%s: Path to EEPROM %s\n", __func__, | |
14ca9f7f | 28 | ofnode_read_chosen_string("xlnx,eeprom")); |
829e8c73 MS |
29 | |
30 | ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev); | |
31 | if (ret) | |
32 | return ret; | |
33 | ||
34 | ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6); | |
35 | if (ret) | |
36 | debug("%s: I2C EEPROM MAC address read failed\n", __func__); | |
37 | else | |
38 | debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr); | |
39 | #endif | |
40 | ||
41 | return ret; | |
42 | } | |
fec657be | 43 | |
fc274a59 | 44 | #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) |
fec657be IE |
45 | void *board_fdt_blob_setup(void) |
46 | { | |
453bb77d MS |
47 | static void *fdt_blob; |
48 | ||
49 | #if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR) | |
50 | fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR; | |
fec657be | 51 | |
fc274a59 MS |
52 | if (fdt_magic(fdt_blob) == FDT_MAGIC) |
53 | return fdt_blob; | |
fec657be | 54 | |
fc274a59 | 55 | debug("DTB is not passed via %p\n", fdt_blob); |
453bb77d | 56 | #endif |
fc274a59 MS |
57 | |
58 | #ifdef CONFIG_SPL_BUILD | |
59 | /* FDT is at end of BSS unless it is in a different memory region */ | |
60 | if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) | |
61 | fdt_blob = (ulong *)&_image_binary_end; | |
62 | else | |
63 | fdt_blob = (ulong *)&__bss_end; | |
64 | #else | |
65 | /* FDT is at end of image */ | |
66 | fdt_blob = (ulong *)&_end; | |
67 | #endif | |
68 | ||
69 | if (fdt_magic(fdt_blob) == FDT_MAGIC) | |
70 | return fdt_blob; | |
71 | ||
72 | debug("DTB is also not passed via %p\n", fdt_blob); | |
73 | ||
74 | return NULL; | |
fec657be IE |
75 | } |
76 | #endif | |
80fdef12 MS |
77 | |
78 | int board_late_init_xilinx(void) | |
79 | { | |
a29511ee MS |
80 | ulong initrd_hi; |
81 | ||
80fdef12 MS |
82 | env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); |
83 | ||
a29511ee MS |
84 | initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE; |
85 | initrd_hi = round_down(initrd_hi, SZ_16M); | |
86 | env_set_addr("initrd_high", (void *)initrd_hi); | |
87 | ||
80fdef12 MS |
88 | return 0; |
89 | } |