]> Git Repo - J-u-boot.git/blame - board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
command: Remove the cmd_tbl_t typedef
[J-u-boot.git] / board / advantech / imx8qm_rom7720_a1 / imx8qm_rom7720_a1.c
CommitLineData
eef72440
OG
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017-2018 NXP
4 * Copyright (C) 2019 Oliver Graute <[email protected]>
5 */
6
7#include <common.h>
9a3b4ceb 8#include <cpu_func.h>
09140113 9#include <env.h>
eef72440 10#include <errno.h>
691d719d 11#include <init.h>
eef72440
OG
12#include <linux/libfdt.h>
13#include <asm/io.h>
14#include <asm/gpio.h>
15#include <asm/arch/clock.h>
16#include <asm/arch/sci/sci.h>
17#include <asm/arch/imx8-pins.h>
18#include <asm/arch/iomux.h>
19#include <asm/arch/sys_proto.h>
20
21DECLARE_GLOBAL_DATA_PTR;
22
23#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
24 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
25 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
26 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
27
28static iomux_cfg_t uart0_pads[] = {
29 SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
30 SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
31};
32
33static void setup_iomux_uart(void)
34{
35 imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
36}
37
38int board_early_init_f(void)
39{
40 sc_pm_clock_rate_t rate = SC_80MHZ;
41 int ret;
42
43 /* Set UART0 clock root to 80 MHz */
44 ret = sc_pm_setup_uart(SC_R_UART_0, rate);
45 if (ret)
46 return ret;
47
48 setup_iomux_uart();
49
50 /* This is needed to because Kernel do not Power Up DC_0 */
51 sc_pm_set_resource_power_mode(-1, SC_R_DC_0, SC_PM_PW_MODE_ON);
52 sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
53
54 return 0;
55}
56
57#if IS_ENABLED(CONFIG_FEC_MXC)
58#include <miiphy.h>
59
60int board_phy_config(struct phy_device *phydev)
61{
62#ifdef CONFIG_FEC_ENABLE_MAX7322
63 u8 value;
64
65 /* This is needed to drive the pads to 1.8V instead of 1.5V */
66 i2c_set_bus_num(CONFIG_MAX7322_I2C_BUS);
67
68 if (!i2c_probe(CONFIG_MAX7322_I2C_ADDR)) {
69 /* Write 0x1 to enable O0 output, this device has no addr */
70 /* hence addr length is 0 */
71 value = 0x1;
72 if (dm_i2c_write(CONFIG_MAX7322_I2C_ADDR, 0, 0, &value, 1))
73 printf("MAX7322 write failed\n");
74 } else {
75 printf("MAX7322 Not found\n");
76 }
77 mdelay(1);
78#endif
79
80 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
81 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
82
83 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
84 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
85 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
86 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
87
88 if (phydev->drv->config)
89 phydev->drv->config(phydev);
90
91 return 0;
92}
93#endif
94
95int checkboard(void)
96{
97 puts("Board: ROM-7720-A1 4GB\n");
98
99 build_info();
100 print_bootinfo();
101
102 return 0;
103}
104
105int board_init(void)
106{
107 /* Power up base board */
108 sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
109
110 return 0;
111}
112
eef72440
OG
113/*
114 * Board specific reset that is system reset.
115 */
116void reset_cpu(ulong addr)
117{
118 /* TODO */
119}
120
121int board_mmc_get_env_dev(int devno)
122{
123 return devno;
124}
125
126int board_late_init(void)
127{
128#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
129 env_set("board_name", "ROM-7720-A1");
130 env_set("board_rev", "iMX8QM");
131#endif
132
133 env_set("sec_boot", "no");
134#ifdef CONFIG_AHAB_BOOT
135 env_set("sec_boot", "yes");
136#endif
137
138 return 0;
139}
This page took 0.061649 seconds and 4 git commands to generate.