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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
9acb626f 2/*
35cf3b57 3 * (C) Copyright 2005-2009
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4 * BuS Elektronik GmbH & Co.KG <[email protected]>
5 *
6 * (C) Copyright 2000-2003
7 * Wolfgang Denk, DENX Software Engineering, [email protected].
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8 */
9
10#include <common.h>
11#include <command.h>
12#include "asm/m5282.h"
35cf3b57 13#include <bmp_layout.h>
7b51b576 14#include <env.h>
49acd56e 15#include <init.h>
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16#include <status_led.h>
17#include <bus_vcxk.h>
18
19/*---------------------------------------------------------------------------*/
20
21DECLARE_GLOBAL_DATA_PTR;
22
d858c335 23#ifdef CONFIG_VIDEO
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24unsigned long display_width;
25unsigned long display_height;
d858c335 26#endif
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27
28/*---------------------------------------------------------------------------*/
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29
30int checkboard (void)
31{
d858c335 32 puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
14d0a02a 33#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
d858c335 34 puts(" Boot from Internal FLASH\n");
9acb626f 35#endif
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36 return 0;
37}
38
f1683aa7 39int dram_init(void)
9acb626f 40{
0fe34058 41 int size, i;
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42
43 size = 0;
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44 MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
45 MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4);
46 asm (" nop");
6d0f6bcf 47#ifdef CONFIG_SYS_SDRAM_BASE0
d858c335
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48 MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)|
49 MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
50 MCFSDRAMC_DACR_PS_32;
51 asm (" nop");
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52
53 MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
d858c335 54 asm (" nop");
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55
56 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
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57 asm (" nop");
58 for (i = 0; i < 10; i++)
59 asm (" nop");
0fe34058 60
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61 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
62 asm (" nop");
0fe34058 63 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
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64 asm (" nop");
65
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66 for (i = 0; i < 2000; i++)
67 asm (" nop");
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68
69 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
70 asm (" nop");
71 /* write SDRAM mode register */
72 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
73 asm (" nop");
74 size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024;
0fe34058 75#endif
d858c335 76#ifdef CONFIG_SYS_SDRAM_BASE1xx
6d0f6bcf 77 MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
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78 | MCFSDRAMC_DACR_CASL (1)
79 | MCFSDRAMC_DACR_CBM (3)
80 | MCFSDRAMC_DACR_PS_16;
81
82 MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
83
84 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
85
6d0f6bcf 86 *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
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87 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
88
89 for (i = 0; i < 2000; i++)
90 asm (" nop");
91
92 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
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93 *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
94 size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
0fe34058 95#endif
088454cd
SG
96 gd->ram_size = size;
97
98 return 0;
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99}
100
6d0f6bcf 101#if defined(CONFIG_SYS_DRAM_TEST)
49acd56e 102int testdram(void)
9acb626f 103{
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104 uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
105 uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
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106 uint *p;
107
108 printf("SDRAM test phase 1:\n");
109 for (p = pstart; p < pend; p++)
110 *p = 0xaaaaaaaa;
111
112 for (p = pstart; p < pend; p++) {
113 if (*p != 0xaaaaaaaa) {
114 printf ("SDRAM test fails at: %08x\n", (uint) p);
115 return 1;
116 }
117 }
118
119 printf("SDRAM test phase 2:\n");
120 for (p = pstart; p < pend; p++)
121 *p = 0x55555555;
122
123 for (p = pstart; p < pend; p++) {
124 if (*p != 0x55555555) {
125 printf ("SDRAM test fails at: %08x\n", (uint) p);
126 return 1;
127 }
128 }
129
130 printf("SDRAM test passed.\n");
131 return 0;
132}
133#endif
134
d858c335
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135#if defined(CONFIG_HW_WATCHDOG)
136
137void hw_watchdog_init(void)
138{
139 char *s;
140 int enable;
141
142 enable = 1;
00caae6d 143 s = env_get("watchdog");
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144 if (s != NULL)
145 if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
146 enable = 0;
147 if (enable)
148 MCFGPTA_GPTDDR |= (1<<2);
149 else
150 MCFGPTA_GPTDDR &= ~(1<<2);
151}
152
153void hw_watchdog_reset(void)
154{
155 MCFGPTA_GPTPORT ^= (1<<2);
156}
157#endif
158
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159int misc_init_r(void)
160{
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161#ifdef CONFIG_HW_WATCHDOG
162 hw_watchdog_init();
35cf3b57 163#endif
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164 return 1;
165}
166
d858c335
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167void __led_toggle(led_id_t mask)
168{
169 MCFGPTA_GPTPORT ^= (1 << 3);
170}
35cf3b57 171
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172void __led_init(led_id_t mask, int state)
173{
174 __led_set(mask, state);
175 MCFGPTA_GPTDDR |= (1 << 3);
176}
177
178void __led_set(led_id_t mask, int state)
179{
2d8d190c 180 if (state == CONFIG_LED_STATUS_ON)
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181 MCFGPTA_GPTPORT |= (1 << 3);
182 else
183 MCFGPTA_GPTPORT &= ~(1 << 3);
184}
185
186#if defined(CONFIG_VIDEO)
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187
188int drv_video_init(void)
189{
190 char *s;
d858c335 191#ifdef CONFIG_SPLASH_SCREEN
35cf3b57 192 unsigned long splash;
d858c335 193#endif
35cf3b57 194 printf("Init Video as ");
00caae6d 195 s = env_get("displaywidth");
d858c335 196 if (s != NULL)
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197 display_width = simple_strtoul(s, NULL, 10);
198 else
199 display_width = 256;
200
00caae6d 201 s = env_get("displayheight");
d858c335 202 if (s != NULL)
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203 display_height = simple_strtoul(s, NULL, 10);
204 else
205 display_height = 256;
206
207 printf("%lu x %lu pixel matrix\n", display_width, display_height);
208
209 MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
210 MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
211
212 vcxk_init(display_width, display_height);
213
214#ifdef CONFIG_SPLASH_SCREEN
00caae6d 215 s = env_get("splashimage");
d858c335 216 if (s != NULL) {
35cf3b57 217 splash = simple_strtoul(s, NULL, 16);
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218 vcxk_acknowledge_wait();
219 video_display_bitmap(splash, 0, 0);
220 }
221#endif
222 return 0;
223}
224#endif
225
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226/*---------------------------------------------------------------------------*/
227
35cf3b57 228#ifdef CONFIG_VIDEO
09140113 229int do_brightness(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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230{
231 int rcode = 0;
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232 ulong side;
233 ulong bright;
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234
235 switch (argc) {
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236 case 3:
237 side = simple_strtoul(argv[1], NULL, 10);
238 bright = simple_strtoul(argv[2], NULL, 10);
239 if ((side >= 0) && (side <= 3) &&
240 (bright >= 0) && (bright <= 1000)) {
241 vcxk_setbrightness(side, bright);
242 rcode = 0;
243 } else {
244 printf("parameters out of range\n");
245 printf("Usage:\n%s\n", cmdtp->usage);
246 rcode = 1;
247 }
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248 break;
249 default:
35cf3b57 250 printf("Usage:\n%s\n", cmdtp->usage);
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251 rcode = 1;
252 break;
253 }
254 return rcode;
255}
256
35cf3b57 257/*---------------------------------------------------------------------------*/
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258
259U_BOOT_CMD(
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260 bright, 3, 0, do_brightness,
261 "sets the display brightness\n",
262 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
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263);
264
35cf3b57
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265#endif
266
267/* EOF EB+MCF-EV123.c */
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