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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
4a442d31 TL |
2 | /* |
3 | * | |
4 | * (C) Copyright 2000-2003 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
c6d88630 | 7 | * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. |
4a442d31 | 8 | * TsiChung Liew ([email protected]) |
4a442d31 TL |
9 | */ |
10 | ||
11 | #include <common.h> | |
691d719d | 12 | #include <init.h> |
90526e9f | 13 | #include <net.h> |
2189d5f1 | 14 | #include <vsprintf.h> |
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15 | #include <watchdog.h> |
16 | #include <command.h> | |
89973f8a | 17 | #include <netdev.h> |
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18 | |
19 | #include <asm/immap.h> | |
c6d88630 | 20 | #include <asm/io.h> |
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21 | |
22 | DECLARE_GLOBAL_DATA_PTR; | |
23 | ||
09140113 | 24 | int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
4a442d31 | 25 | { |
c6d88630 | 26 | ccm_t *ccm = (ccm_t *) MMAP_CCM; |
4a442d31 | 27 | |
c6d88630 | 28 | out_8(&ccm->rcr, CCM_RCR_SOFTRST); |
4a442d31 TL |
29 | /* we don't return! */ |
30 | return 0; | |
c6d88630 | 31 | } |
4a442d31 | 32 | |
b9153fe3 AD |
33 | #if defined(CONFIG_DISPLAY_CPUINFO) |
34 | int print_cpuinfo(void) | |
4a442d31 | 35 | { |
c6d88630 | 36 | ccm_t *ccm = (ccm_t *) MMAP_CCM; |
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37 | u16 msk; |
38 | u16 id = 0; | |
39 | u8 ver; | |
40 | ||
41 | puts("CPU: "); | |
c6d88630 AW |
42 | msk = (in_be16(&ccm->cir) >> 6); |
43 | ver = (in_be16(&ccm->cir) & 0x003f); | |
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44 | switch (msk) { |
45 | case 0x31: | |
46 | id = 5235; | |
47 | break; | |
48 | } | |
49 | ||
50 | if (id) { | |
08ef89ec WD |
51 | char buf1[32], buf2[32]; |
52 | ||
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53 | printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk, |
54 | ver); | |
08ef89ec | 55 | printf(" CPU CLK %s MHz BUS CLK %s MHz\n", |
1b270844 TL |
56 | strmhz(buf1, gd->cpu_clk), |
57 | strmhz(buf2, gd->bus_clk)); | |
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58 | } |
59 | ||
60 | return 0; | |
61 | }; | |
b9153fe3 | 62 | #endif /* CONFIG_DISPLAY_CPUINFO */ |
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63 | |
64 | #if defined(CONFIG_WATCHDOG) | |
65 | /* Called by macro WATCHDOG_RESET */ | |
66 | void watchdog_reset(void) | |
67 | { | |
c6d88630 | 68 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
4a442d31 | 69 | |
c6d88630 AW |
70 | /* Count register */ |
71 | out_be16(&wdp->sr, 0x5555); | |
4a442d31 | 72 | asm("nop"); |
c6d88630 | 73 | out_be16(&wdp->sr, 0xaaaa); |
4a442d31 TL |
74 | } |
75 | ||
76 | int watchdog_disable(void) | |
77 | { | |
c6d88630 | 78 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
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79 | |
80 | /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */ | |
c6d88630 AW |
81 | /* halted watchdog timer */ |
82 | setbits_be16(&wdp->cr, WTM_WCR_HALTED); | |
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83 | |
84 | puts("WATCHDOG:disabled\n"); | |
85 | return (0); | |
86 | } | |
87 | ||
88 | int watchdog_init(void) | |
89 | { | |
c6d88630 | 90 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
4a442d31 TL |
91 | u32 wdog_module = 0; |
92 | ||
93 | /* set timeout and enable watchdog */ | |
6d0f6bcf | 94 | wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT); |
4a442d31 | 95 | wdog_module |= (wdog_module / 8192); |
c6d88630 | 96 | out_be16(&wdp->mr, wdog_module); |
4a442d31 | 97 | |
c6d88630 | 98 | out_be16(&wdp->cr, WTM_WCR_EN); |
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99 | puts("WATCHDOG:enabled\n"); |
100 | ||
101 | return (0); | |
102 | } | |
103 | #endif /* CONFIG_WATCHDOG */ | |
86882b80 BW |
104 | |
105 | #if defined(CONFIG_MCFFEC) | |
106 | /* Default initializations for MCFFEC controllers. To override, | |
107 | * create a board-specific function called: | |
108 | * int board_eth_init(bd_t *bis) | |
109 | */ | |
110 | ||
86882b80 BW |
111 | int cpu_eth_init(bd_t *bis) |
112 | { | |
113 | return mcffec_initialize(bis); | |
114 | } | |
115 | #endif |