[J-u-boot.git] / arch / m68k / cpu / mcf5227x / cpu.c

// SPDX-License-Identifier: GPL-2.0+
/*
 *
 * (C) Copyright 2000-2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
 * TsiChung Liew ([email protected])
 */

#include <common.h>
#include <init.h>
#include <vsprintf.h>
#include <watchdog.h>
#include <command.h>

#include <asm/immap.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
	rcm_t *rcm = (rcm_t *) (MMAP_RCM);
	udelay(1000);
	setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);

	/* we don't return! */
	return 0;
};

#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
	ccm_t *ccm = (ccm_t *) MMAP_CCM;
	u16 msk;
	u16 id = 0;
	u8 ver;

	puts("CPU:   ");
	msk = (in_be16(&ccm->cir) >> 6);
	ver = (in_be16(&ccm->cir) & 0x003f);
	switch (msk) {
	case 0x6c:
		id = 52277;
		break;
	}

	if (id) {
		char buf1[32], buf2[32], buf3[32];

		printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
		       ver);
		printf("       CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
		       strmhz(buf1, gd->cpu_clk),
		       strmhz(buf2, gd->bus_clk),
		       strmhz(buf3, gd->arch.flb_clk));
		printf("       INP CLK %s MHz VCO CLK %s MHz\n",
		       strmhz(buf1, gd->arch.inp_clk),
		       strmhz(buf2, gd->arch.vco_clk));
	}

	return 0;
}
#endif /* CONFIG_DISPLAY_CPUINFO */
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
c8758102 TL	2	/*
	3	*
	4	* (C) Copyright 2000-2003
	5	* Wolfgang Denk, DENX Software Engineering, [email protected].
	6	*
849fc424	7	* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
c8758102	8	* TsiChung Liew ([email protected])
c8758102 TL	9	*/
	10
	11	#include <common.h>
691d719d	12	#include <init.h>
2189d5f1	13	#include <vsprintf.h>
c8758102 TL	14	#include <watchdog.h>
	15	#include <command.h>
	16
	17	#include <asm/immap.h>
849fc424	18	#include <asm/io.h>
c8758102 TL	19
	20	DECLARE_GLOBAL_DATA_PTR;
	21
09140113	22	int do_reset(struct cmd_tbl cmdtp, int flag, int argc, char const argv[])
c8758102	23	{
849fc424	24	rcm_t rcm = (rcm_t ) (MMAP_RCM);
c8758102	25	udelay(1000);
849fc424	26	setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
c8758102 TL	27
	28	/* we don't return! */
	29	return 0;
	30	};
	31
b9153fe3 AD	32	#if defined(CONFIG_DISPLAY_CPUINFO)
b9153fe3 AD	33	int print_cpuinfo(void)
c8758102	34	{
849fc424	35	ccm_t ccm = (ccm_t ) MMAP_CCM;
c8758102 TL	36	u16 msk;
	37	u16 id = 0;
	38	u8 ver;
	39
	40	puts("CPU: ");
849fc424 AW	41	msk = (in_be16(&ccm->cir) >> 6);
849fc424 AW	42	ver = (in_be16(&ccm->cir) & 0x003f);
c8758102 TL	43	switch (msk) {
	44	case 0x6c:
	45	id = 52277;
	46	break;
	47	}
	48
	49	if (id) {
08ef89ec WD	50	char buf1[32], buf2[32], buf3[32];
08ef89ec WD	51
c8758102 TL	52	printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
c8758102 TL	53	ver);
08ef89ec	54	printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
1b270844 TL	55	strmhz(buf1, gd->cpu_clk),
1b270844 TL	56	strmhz(buf2, gd->bus_clk),
7e2592fd	57	strmhz(buf3, gd->arch.flb_clk));
08ef89ec	58	printf(" INP CLK %s MHz VCO CLK %s MHz\n",
7e2592fd SG	59	strmhz(buf1, gd->arch.inp_clk),
7e2592fd SG	60	strmhz(buf2, gd->arch.vco_clk));
c8758102 TL	61	}
	62
	63	return 0;
	64	}
b9153fe3	65	#endif /* CONFIG_DISPLAY_CPUINFO */