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Commit | Line | Data |
---|---|---|
dd84058d | 1 | CONFIG_PPC=y |
98463903 | 2 | CONFIG_TEXT_BASE=0xF0000000 |
c960c0fd | 3 | CONFIG_ENV_SOURCE_FILE="km83xx" |
a09fea1d | 4 | CONFIG_ENV_SIZE=0x4000 |
a09fea1d | 5 | CONFIG_ENV_SECT_SIZE=0x20000 |
2bba7807 | 6 | CONFIG_DEFAULT_DEVICE_TREE="kmtuge1" |
c90e1893 | 7 | CONFIG_SYS_MONITOR_LEN=786432 |
4244429f | 8 | CONFIG_BOOTCOUNT_BOOTLIMIT=3 |
d8927020 | 9 | CONFIG_SYS_BOOTM_LEN=0x2000000 |
d46e86d2 | 10 | CONFIG_SYS_LOAD_ADDR=0x100000 |
d8927020 | 11 | CONFIG_SYS_CLK_FREQ=66000000 |
d46e86d2 | 12 | CONFIG_ENV_ADDR=0xF00C0000 |
dd84058d | 13 | CONFIG_MPC83xx=y |
93de2530 | 14 | CONFIG_HIGH_BATS=y |
d3d0b5bb | 15 | CONFIG_SYS_INIT_RAM_LOCK=y |
71c79009 | 16 | CONFIG_TARGET_TUGE1=y |
21c1502a MS |
17 | CONFIG_CORE_PLL_RATIO_25_1=y |
18 | CONFIG_QUICC_MULT_FACTOR_3=y | |
19 | CONFIG_BOOT_MEMORY_SPACE_LOW=y | |
20 | CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y | |
30915ab9 MS |
21 | CONFIG_BAT0=y |
22 | CONFIG_BAT0_NAME="SDRAM" | |
23 | CONFIG_BAT0_BASE=0x00000000 | |
24 | CONFIG_BAT0_LENGTH_256_MBYTES=y | |
25 | CONFIG_BAT0_ACCESS_RW=y | |
26 | CONFIG_BAT0_ICACHE_INHIBITED=y | |
30915ab9 MS |
27 | CONFIG_BAT0_DCACHE_INHIBITED=y |
28 | CONFIG_BAT0_DCACHE_GUARDED=y | |
29 | CONFIG_BAT0_USER_MODE_VALID=y | |
30 | CONFIG_BAT0_SUPERVISOR_MODE_VALID=y | |
31 | CONFIG_BAT1=y | |
32 | CONFIG_BAT1_NAME="IMMR" | |
33 | CONFIG_BAT1_BASE=0xE0000000 | |
34 | CONFIG_BAT1_LENGTH_4_MBYTES=y | |
35 | CONFIG_BAT1_ACCESS_RW=y | |
36 | CONFIG_BAT1_ICACHE_INHIBITED=y | |
30915ab9 MS |
37 | CONFIG_BAT1_DCACHE_INHIBITED=y |
38 | CONFIG_BAT1_DCACHE_GUARDED=y | |
39 | CONFIG_BAT1_USER_MODE_VALID=y | |
40 | CONFIG_BAT1_SUPERVISOR_MODE_VALID=y | |
41 | CONFIG_BAT2=y | |
42 | CONFIG_BAT2_NAME="KMBEC_FPGA" | |
43 | CONFIG_BAT2_BASE=0xE8000000 | |
44 | CONFIG_BAT2_LENGTH_128_MBYTES=y | |
45 | CONFIG_BAT2_ACCESS_RW=y | |
46 | CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y | |
47 | CONFIG_BAT2_DCACHE_INHIBITED=y | |
48 | CONFIG_BAT2_DCACHE_GUARDED=y | |
49 | CONFIG_BAT2_USER_MODE_VALID=y | |
50 | CONFIG_BAT2_SUPERVISOR_MODE_VALID=y | |
51 | CONFIG_BAT3=y | |
52 | CONFIG_BAT3_NAME="FLASH" | |
53 | CONFIG_BAT3_BASE=0xF0000000 | |
54 | CONFIG_BAT3_LENGTH_256_MBYTES=y | |
55 | CONFIG_BAT3_ACCESS_RW=y | |
56 | CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y | |
57 | CONFIG_BAT3_DCACHE_INHIBITED=y | |
58 | CONFIG_BAT3_DCACHE_GUARDED=y | |
59 | CONFIG_BAT3_USER_MODE_VALID=y | |
60 | CONFIG_BAT3_SUPERVISOR_MODE_VALID=y | |
61 | CONFIG_BAT4=y | |
62 | CONFIG_BAT4_NAME="STACK_IN_DCACHE" | |
63 | CONFIG_BAT4_BASE=0xE6000000 | |
64 | CONFIG_BAT4_ACCESS_RW=y | |
65 | CONFIG_BAT4_USER_MODE_VALID=y | |
66 | CONFIG_BAT4_SUPERVISOR_MODE_VALID=y | |
67 | CONFIG_BAT5=y | |
68 | CONFIG_BAT5_NAME="APP1" | |
69 | CONFIG_BAT5_BASE=0xA0000000 | |
70 | CONFIG_BAT5_LENGTH_256_MBYTES=y | |
71 | CONFIG_BAT5_ACCESS_RW=y | |
72 | CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y | |
73 | CONFIG_BAT5_DCACHE_INHIBITED=y | |
74 | CONFIG_BAT5_DCACHE_GUARDED=y | |
75 | CONFIG_BAT5_USER_MODE_VALID=y | |
76 | CONFIG_BAT5_SUPERVISOR_MODE_VALID=y | |
9c5df7a2 MS |
77 | CONFIG_LBLAW0=y |
78 | CONFIG_LBLAW0_BASE=0xF0000000 | |
79 | CONFIG_LBLAW0_NAME="FLASH" | |
80 | CONFIG_LBLAW0_LENGTH_256_MBYTES=y | |
81 | CONFIG_LBLAW1=y | |
82 | CONFIG_LBLAW1_BASE=0xE8000000 | |
83 | CONFIG_LBLAW1_NAME="KMBEC_FPGA" | |
84 | CONFIG_LBLAW1_LENGTH_128_MBYTES=y | |
85 | CONFIG_LBLAW2=y | |
86 | CONFIG_LBLAW2_BASE=0xA0000000 | |
87 | CONFIG_LBLAW2_NAME="APP1" | |
88 | CONFIG_LBLAW2_LENGTH_256_MBYTES=y | |
be5abb0a MS |
89 | CONFIG_HID0_FINAL_EMCP=y |
90 | CONFIG_HID0_FINAL_ICE=y | |
91 | CONFIG_HID2_HBE=y | |
73df96a3 MS |
92 | CONFIG_ACR_PIPE_DEP_4=y |
93 | CONFIG_ACR_RPTCNT_4=y | |
94 | CONFIG_ACR_APARK_MASTER=y | |
95 | CONFIG_ACR_PARKM_USB_I2C1_BOOT=y | |
344a0e43 TR |
96 | CONFIG_LCRR_EADC_1=y |
97 | CONFIG_LCRR_CLKDIV_2=y | |
86e4c4f7 | 98 | CONFIG_83XX_PCICLK=0x3ef1480 |
c960c0fd | 99 | # CONFIG_PCI is not set |
78d1e1d0 TR |
100 | CONFIG_AUTOBOOT_KEYED=y |
101 | CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" | |
102 | CONFIG_AUTOBOOT_STOP_STR=" " | |
ec6f06bd TR |
103 | CONFIG_OF_BOARD_SETUP=y |
104 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
42fb448a TR |
105 | CONFIG_SYS_CBSIZE=512 |
106 | CONFIG_SYS_PBSIZE=532 | |
0817daa7 | 107 | CONFIG_BOARD_EARLY_INIT_R=y |
19b4040d | 108 | # CONFIG_HWCONFIG is not set |
0817daa7 TR |
109 | CONFIG_LAST_STAGE_INIT=y |
110 | CONFIG_MISC_INIT_R=y | |
111 | CONFIG_HUSH_PARSER=y | |
cf493582 | 112 | CONFIG_SYS_MAXARGS=32 |
ad12dc18 | 113 | CONFIG_CMD_IMLS=y |
89cb2b5f TR |
114 | CONFIG_CMD_ASKENV=y |
115 | CONFIG_CMD_GREPENV=y | |
a1dc980d | 116 | CONFIG_CMD_EEPROM=y |
88cd7d0e TR |
117 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
118 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 | |
78d1e1d0 | 119 | CONFIG_CMD_I2C=y |
2c8d04dd TR |
120 | CONFIG_LOADS_ECHO=y |
121 | CONFIG_SYS_LOADS_BAUD_CHANGE=y | |
a542e430 | 122 | CONFIG_BOOTP_BOOTFILESIZE=y |
867e16ae | 123 | CONFIG_CMD_DHCP=y |
89cb2b5f | 124 | CONFIG_CMD_MII=y |
78d1e1d0 | 125 | CONFIG_CMD_PING=y |
cbabe7f8 | 126 | CONFIG_CMD_MTDPARTS=y |
43ede0bc TR |
127 | CONFIG_MTDIDS_DEFAULT="nor0=boot" |
128 | CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);" | |
8f2fe0c8 | 129 | CONFIG_CMD_UBI=y |
d56b4b19 | 130 | # CONFIG_CMD_UBIFS is not set |
e91907a1 | 131 | CONFIG_ENV_OVERWRITE=y |
cb6617a7 | 132 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
a09fea1d | 133 | CONFIG_ENV_ADDR_REDUND=0xF00E0000 |
0e14cdfa TR |
134 | CONFIG_USE_ETHPRIME=y |
135 | CONFIG_ETHPRIME="UEC0" | |
0817daa7 | 136 | CONFIG_VERSION_VARIABLE=y |
d1ec9461 | 137 | CONFIG_BOOTCOUNT_LIMIT=y |
7bdfe859 HS |
138 | CONFIG_DM_BOOTCOUNT=y |
139 | CONFIG_BOOTCOUNT_MEM=y | |
64a2a7b0 | 140 | CONFIG_SYS_BOOTCOUNT_BE=y |
c7fad78e TR |
141 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
142 | CONFIG_SYS_BR0_PRELIM=0xF0001001 | |
143 | CONFIG_SYS_OR0_PRELIM=0xF0000E55 | |
144 | CONFIG_SYS_BR1_PRELIM_BOOL=y | |
145 | CONFIG_SYS_BR1_PRELIM=0xE8000801 | |
146 | CONFIG_SYS_OR1_PRELIM=0xF8000E25 | |
147 | CONFIG_SYS_BR2_PRELIM_BOOL=y | |
148 | CONFIG_SYS_BR2_PRELIM=0xA0000801 | |
149 | CONFIG_SYS_OR2_PRELIM=0xF0000C25 | |
31464f94 | 150 | CONFIG_DM_I2C=y |
6d5d0c95 | 151 | CONFIG_SYS_I2C_FSL=y |
31464f94 HB |
152 | CONFIG_I2C_MUX=y |
153 | CONFIG_I2C_MUX_PCA954x=y | |
8728c97e | 154 | # CONFIG_MMC is not set |
888f184a | 155 | CONFIG_MTD=y |
e856bdcf | 156 | CONFIG_MTD_NOR_FLASH=y |
2fe88d45 | 157 | CONFIG_FLASH_CFI_DRIVER=y |
98fbad63 | 158 | CONFIG_FLASH_SHOW_PROGRESS=0 |
2fe88d45 AF |
159 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y |
160 | CONFIG_FLASH_CFI_MTD=y | |
161 | CONFIG_SYS_FLASH_PROTECTION=y | |
162 | CONFIG_SYS_FLASH_CFI=y | |
7bdfe859 HS |
163 | CONFIG_DM_ETH_PHY=y |
164 | CONFIG_QE_UEC=y | |
7bdfe859 | 165 | # CONFIG_PINCTRL_FULL is not set |
cc1e98b5 | 166 | CONFIG_QE=y |
9e39003e | 167 | CONFIG_SYS_NS16550=y |