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Commit | Line | Data |
---|---|---|
d0dd7397 | 1 | CONFIG_ARM=y |
344a0e43 | 2 | CONFIG_ARCH_IMX8=y |
98463903 | 3 | CONFIG_TEXT_BASE=0x80020000 |
9802154a TR |
4 | CONFIG_SYS_MALLOC_LEN=0x2400000 |
5 | CONFIG_SYS_MALLOC_F_LEN=0x4000 | |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
018e3fd2 PF |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
554e5514 | 9 | CONFIG_NR_DRAM_BANKS=3 |
fcb5117d TR |
10 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
11 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 | |
052170c6 TR |
12 | CONFIG_ENV_SIZE=0x1000 |
13 | CONFIG_ENV_OFFSET=0x400000 | |
14 | CONFIG_DM_GPIO=y | |
2bba7807 | 15 | CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek" |
d0dd7397 | 16 | CONFIG_TARGET_IMX8QXP_MEK=y |
103c5f18 | 17 | CONFIG_SPL_MMC=y |
2a736066 | 18 | CONFIG_SPL_SERIAL=y |
9ca00684 | 19 | CONFIG_SPL_DRIVERS_MISC=y |
fcb5117d | 20 | CONFIG_SPL_STACK=0x13e000 |
867e16ae | 21 | CONFIG_SPL_TEXT_BASE=0x100000 |
18e791c4 TR |
22 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
23 | CONFIG_SPL_BSS_START_ADDR=0x128000 | |
24 | CONFIG_SPL_BSS_MAX_SIZE=0x1000 | |
d8927020 | 25 | CONFIG_SYS_BOOTM_LEN=0x800000 |
49c8ef0e | 26 | CONFIG_SYS_LOAD_ADDR=0x80280000 |
d8927020 | 27 | CONFIG_SPL=y |
d46e86d2 | 28 | CONFIG_REMAKE_ELF=y |
d8927020 | 29 | # CONFIG_EFI_LOADER is not set |
61c57b61 OG |
30 | CONFIG_FIT=y |
31 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
ec6f06bd | 32 | CONFIG_BOOTDELAY=3 |
f76750d1 | 33 | CONFIG_OF_BOARD_SETUP=y |
6e92cae3 | 34 | CONFIG_OF_SYSTEM_SETUP=y |
970bf860 TR |
35 | CONFIG_USE_BOOTCOMMAND=y |
36 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" | |
42fb448a TR |
37 | CONFIG_SYS_CBSIZE=2048 |
38 | CONFIG_SYS_PBSIZE=2068 | |
018e3fd2 | 39 | CONFIG_LOG=y |
eabbf801 | 40 | CONFIG_BOARD_EARLY_INIT_F=y |
ca8a329a | 41 | CONFIG_SPL_MAX_SIZE=0x1f000 |
018e3fd2 | 42 | CONFIG_SPL_BOARD_INIT=y |
ab12179b SA |
43 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
44 | # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set | |
4bb6f612 TR |
45 | CONFIG_SPL_LOAD_IMX_CONTAINER=y |
46 | CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" | |
018e3fd2 | 47 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
f113d7d3 | 48 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
82e26e0d SG |
49 | CONFIG_SPL_SYS_MALLOC=y |
50 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
51 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000 | |
52 | CONFIG_SPL_SYS_MALLOC_SIZE=0x3000 | |
2a00d73d | 53 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
f76750d1 | 54 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 |
018e3fd2 | 55 | CONFIG_SPL_POWER_DOMAIN=y |
fe258048 | 56 | CONFIG_HUSH_PARSER=y |
d0dd7397 | 57 | CONFIG_CMD_CPU=y |
4b0bcfa7 | 58 | # CONFIG_BOOTM_NETBSD is not set |
e985eb14 | 59 | # CONFIG_CMD_EXPORTENV is not set |
d0dd7397 | 60 | # CONFIG_CMD_IMPORTENV is not set |
e985eb14 | 61 | # CONFIG_CMD_CRC32 is not set |
d0dd7397 PF |
62 | CONFIG_CMD_CLK=y |
63 | CONFIG_CMD_DM=y | |
581ec36c | 64 | CONFIG_CMD_FUSE=y |
d0dd7397 PF |
65 | CONFIG_CMD_GPIO=y |
66 | CONFIG_CMD_I2C=y | |
67 | CONFIG_CMD_MMC=y | |
68 | CONFIG_CMD_DHCP=y | |
69 | CONFIG_CMD_MII=y | |
70 | CONFIG_CMD_PING=y | |
71 | CONFIG_CMD_CACHE=y | |
72 | CONFIG_CMD_FAT=y | |
018e3fd2 | 73 | CONFIG_SPL_OF_CONTROL=y |
e91907a1 | 74 | CONFIG_ENV_OVERWRITE=y |
d0dd7397 | 75 | CONFIG_ENV_IS_IN_MMC=y |
8d8ee47e | 76 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
7d080773 | 77 | CONFIG_SYS_MMC_ENV_DEV=1 |
f84b48a1 | 78 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
c3061ce8 | 79 | CONFIG_NET_RANDOM_ETHADDR=y |
018e3fd2 PF |
80 | CONFIG_SPL_DM=y |
81 | CONFIG_SPL_CLK=y | |
d0dd7397 PF |
82 | CONFIG_CLK_IMX8=y |
83 | CONFIG_CPU=y | |
d0dd7397 PF |
84 | CONFIG_MXC_GPIO=y |
85 | CONFIG_DM_PCA953X=y | |
86 | CONFIG_DM_I2C=y | |
87 | CONFIG_SYS_I2C_IMX_LPI2C=y | |
88 | CONFIG_I2C_MUX=y | |
89 | CONFIG_I2C_MUX_PCA954x=y | |
623de3f0 | 90 | CONFIG_SUPPORT_EMMC_BOOT=y |
3f70bef1 | 91 | CONFIG_FSL_USDHC=y |
d0dd7397 PF |
92 | CONFIG_PHYLIB=y |
93 | CONFIG_PHY_ADDR_ENABLE=y | |
94 | CONFIG_PHY_ATHEROS=y | |
d0dd7397 PF |
95 | CONFIG_PHY_GIGE=y |
96 | CONFIG_FEC_MXC_SHARE_MDIO=y | |
97 | CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 | |
98 | CONFIG_FEC_MXC=y | |
99 | CONFIG_MII=y | |
100 | CONFIG_PINCTRL=y | |
018e3fd2 | 101 | CONFIG_SPL_PINCTRL=y |
d0dd7397 PF |
102 | CONFIG_PINCTRL_IMX8=y |
103 | CONFIG_POWER_DOMAIN=y | |
104 | CONFIG_IMX8_POWER_DOMAIN=y | |
105 | CONFIG_DM_REGULATOR=y | |
018e3fd2 | 106 | CONFIG_SPL_DM_REGULATOR=y |
d0dd7397 PF |
107 | CONFIG_DM_REGULATOR_FIXED=y |
108 | CONFIG_DM_REGULATOR_GPIO=y | |
018e3fd2 | 109 | CONFIG_SPL_DM_REGULATOR_GPIO=y |
d0dd7397 PF |
110 | CONFIG_DM_SERIAL=y |
111 | CONFIG_FSL_LPUART=y | |
d70c0fce PF |
112 | CONFIG_DM_THERMAL=y |
113 | CONFIG_IMX_SCU_THERMAL=y | |
018e3fd2 | 114 | CONFIG_SPL_TINY_MEMSET=y |