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Commit | Line | Data |
---|---|---|
fe133eb1 | 1 | CONFIG_ARM=y |
fe133eb1 | 2 | CONFIG_ARCH_IMX8=y |
98463903 | 3 | CONFIG_TEXT_BASE=0x80020000 |
9802154a | 4 | CONFIG_SYS_MALLOC_LEN=0x2400000 |
83061dbd | 5 | CONFIG_SPL_GPIO=y |
fe133eb1 OG |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
2bba7807 | 8 | CONFIG_NR_DRAM_BANKS=3 |
fcb5117d TR |
9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 | |
2bba7807 TR |
11 | CONFIG_ENV_SIZE=0x1000 |
12 | CONFIG_ENV_OFFSET=0x400000 | |
13 | CONFIG_DM_GPIO=y | |
14 | CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8" | |
fe133eb1 | 15 | CONFIG_TARGET_CONGA_QMX8=y |
103c5f18 | 16 | CONFIG_SPL_MMC=y |
2a736066 | 17 | CONFIG_SPL_SERIAL=y |
9ca00684 | 18 | CONFIG_SPL_DRIVERS_MISC=y |
fcb5117d | 19 | CONFIG_SPL_STACK=0x13e000 |
18e791c4 TR |
20 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
21 | CONFIG_SPL_BSS_START_ADDR=0x128000 | |
22 | CONFIG_SPL_BSS_MAX_SIZE=0x1000 | |
d8927020 | 23 | CONFIG_SYS_BOOTM_LEN=0x800000 |
49c8ef0e | 24 | CONFIG_SYS_LOAD_ADDR=0x80280000 |
d8927020 | 25 | CONFIG_SPL=y |
d46e86d2 | 26 | CONFIG_REMAKE_ELF=y |
d8927020 | 27 | # CONFIG_EFI_LOADER is not set |
fe133eb1 | 28 | CONFIG_FIT=y |
5a878c94 | 29 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
fe133eb1 | 30 | CONFIG_SPL_LOAD_FIT=y |
fe133eb1 | 31 | CONFIG_BOOTDELAY=3 |
ec6f06bd | 32 | CONFIG_OF_BOARD_SETUP=y |
970bf860 TR |
33 | CONFIG_USE_BOOTCOMMAND=y |
34 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" | |
42fb448a TR |
35 | CONFIG_SYS_CBSIZE=256 |
36 | CONFIG_SYS_PBSIZE=276 | |
fe133eb1 | 37 | CONFIG_LOG=y |
5523afbe | 38 | CONFIG_BOARD_EARLY_INIT_F=y |
ca8a329a | 39 | CONFIG_SPL_MAX_SIZE=0x1f000 |
b871701f | 40 | # CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set |
fe133eb1 | 41 | CONFIG_SPL_BOARD_INIT=y |
f113d7d3 | 42 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
82e26e0d SG |
43 | CONFIG_SPL_SYS_MALLOC=y |
44 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
45 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000 | |
46 | CONFIG_SPL_SYS_MALLOC_SIZE=0x3000 | |
2a00d73d | 47 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
f76750d1 | 48 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 |
2bba7807 | 49 | CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 |
fe133eb1 | 50 | CONFIG_SPL_POWER_DOMAIN=y |
078111b9 | 51 | CONFIG_SPL_WATCHDOG=y |
2bba7807 | 52 | CONFIG_HUSH_PARSER=y |
fe133eb1 OG |
53 | CONFIG_CMD_CPU=y |
54 | # CONFIG_BOOTM_NETBSD is not set | |
55 | # CONFIG_CMD_IMPORTENV is not set | |
56 | CONFIG_CMD_CLK=y | |
57 | CONFIG_CMD_DM=y | |
2bba7807 | 58 | CONFIG_CMD_FUSE=y |
fe133eb1 OG |
59 | CONFIG_CMD_GPIO=y |
60 | CONFIG_CMD_I2C=y | |
61 | CONFIG_CMD_MMC=y | |
62 | CONFIG_CMD_DHCP=y | |
63 | CONFIG_CMD_MII=y | |
64 | CONFIG_CMD_PING=y | |
65 | CONFIG_CMD_CACHE=y | |
66 | CONFIG_CMD_FAT=y | |
fe133eb1 | 67 | CONFIG_SPL_OF_CONTROL=y |
27480e0a | 68 | CONFIG_ENV_OVERWRITE=y |
fe133eb1 | 69 | CONFIG_ENV_IS_IN_MMC=y |
2bba7807 | 70 | CONFIG_SYS_MMC_ENV_DEV=1 |
f84b48a1 | 71 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
fe133eb1 OG |
72 | CONFIG_SPL_DM=y |
73 | CONFIG_SPL_CLK=y | |
74 | CONFIG_CLK_IMX8=y | |
75 | CONFIG_CPU=y | |
fe133eb1 OG |
76 | CONFIG_MXC_GPIO=y |
77 | CONFIG_DM_PCA953X=y | |
78 | CONFIG_DM_I2C=y | |
79 | CONFIG_SYS_I2C_IMX_LPI2C=y | |
80 | CONFIG_I2C_MUX=y | |
81 | CONFIG_I2C_MUX_PCA954x=y | |
82 | CONFIG_MISC=y | |
bca1bce9 | 83 | CONFIG_SUPPORT_EMMC_BOOT=y |
fe133eb1 OG |
84 | CONFIG_FSL_USDHC=y |
85 | CONFIG_PHYLIB=y | |
86 | CONFIG_PHY_ADDR_ENABLE=y | |
87 | CONFIG_PHY_ATHEROS=y | |
fe133eb1 OG |
88 | CONFIG_PHY_GIGE=y |
89 | CONFIG_FEC_MXC_SHARE_MDIO=y | |
90 | CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 | |
91 | CONFIG_FEC_MXC=y | |
92 | CONFIG_MII=y | |
93 | CONFIG_PINCTRL=y | |
94 | CONFIG_SPL_PINCTRL=y | |
95 | CONFIG_PINCTRL_IMX8=y | |
96 | CONFIG_POWER_DOMAIN=y | |
97 | CONFIG_IMX8_POWER_DOMAIN=y | |
98 | CONFIG_DM_REGULATOR=y | |
99 | CONFIG_SPL_DM_REGULATOR=y | |
100 | CONFIG_DM_REGULATOR_FIXED=y | |
101 | CONFIG_DM_REGULATOR_GPIO=y | |
102 | CONFIG_SPL_DM_REGULATOR_GPIO=y | |
103 | CONFIG_DM_SERIAL=y | |
104 | CONFIG_FSL_LPUART=y | |
105 | CONFIG_SPL_TINY_MEMSET=y |