]>
Commit | Line | Data |
---|---|---|
6e2a7780 LV |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_K3=y | |
9802154a TR |
3 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
4 | CONFIG_SYS_MALLOC_F_LEN=0x55000 | |
83061dbd | 5 | CONFIG_SPL_GPIO=y |
6e2a7780 LV |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
554e5514 | 8 | CONFIG_NR_DRAM_BANKS=2 |
80b93bb7 | 9 | CONFIG_SOC_K3_AM654=y |
b8cc99a4 | 10 | CONFIG_K3_EARLY_CONS=y |
6e2a7780 | 11 | CONFIG_TARGET_AM654_R5_EVM=y |
fcb5117d TR |
12 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
13 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc | |
052170c6 TR |
14 | CONFIG_ENV_SIZE=0x20000 |
15 | CONFIG_DM_GPIO=y | |
8f74e659 | 16 | CONFIG_SPL_DM_SPI=y |
2bba7807 | 17 | CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" |
fcb5117d | 18 | CONFIG_DM_RESET=y |
103c5f18 | 19 | CONFIG_SPL_MMC=y |
2a736066 | 20 | CONFIG_SPL_SERIAL=y |
9ca00684 | 21 | CONFIG_SPL_DRIVERS_MISC=y |
6e2a7780 | 22 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
867e16ae | 23 | CONFIG_SPL_TEXT_BASE=0x41c00000 |
18e791c4 TR |
24 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
25 | CONFIG_SPL_BSS_START_ADDR=0x41c7effc | |
26 | CONFIG_SPL_BSS_MAX_SIZE=0xc00 | |
27 | CONFIG_SPL_STACK_R=y | |
d8927020 | 28 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
f72edfdd LV |
29 | CONFIG_SPL_SIZE_LIMIT=0x7ec00 |
30 | CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 | |
0c3a9ed4 | 31 | CONFIG_SPL_FS_FAT=y |
6e2a7780 | 32 | CONFIG_SPL_LIBDISK_SUPPORT=y |
36a5c893 | 33 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
ea2ca7e1 | 34 | CONFIG_SPL_SPI=y |
6e2a7780 LV |
35 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
36 | CONFIG_SPL_LOAD_FIT=y | |
37 | CONFIG_USE_BOOTCOMMAND=y | |
38 | # CONFIG_DISPLAY_CPUINFO is not set | |
f72edfdd LV |
39 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y |
40 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y | |
ca8a329a | 41 | CONFIG_SPL_MAX_SIZE=0x58000 |
f72edfdd | 42 | CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y |
6e2a7780 | 43 | CONFIG_SPL_SEPARATE_BSS=y |
82e26e0d SG |
44 | CONFIG_SPL_SYS_MALLOC=y |
45 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
46 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000 | |
47 | CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 | |
208ec9fb | 48 | CONFIG_SPL_EARLY_BSS=y |
2a00d73d | 49 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
0e9135c8 | 50 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 |
36a5c893 | 51 | CONFIG_SPL_DMA=y |
975e7cf3 | 52 | CONFIG_SPL_I2C=y |
6e2a7780 | 53 | CONFIG_SPL_DM_MAILBOX=y |
56c40460 | 54 | CONFIG_SPL_DM_SPI_FLASH=y |
6e2a7780 | 55 | CONFIG_SPL_DM_RESET=y |
6e2a7780 | 56 | CONFIG_SPL_POWER_DOMAIN=y |
6e2a7780 LV |
57 | CONFIG_SPL_RAM_DEVICE=y |
58 | CONFIG_SPL_REMOTEPROC=y | |
36a5c893 VR |
59 | # CONFIG_SPL_SPI_FLASH_TINY is not set |
60 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y | |
61 | CONFIG_SPL_SPI_LOAD=y | |
3e5b62f7 | 62 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 |
6e2a7780 LV |
63 | CONFIG_SPL_YMODEM_SUPPORT=y |
64 | CONFIG_HUSH_PARSER=y | |
65 | CONFIG_CMD_BOOTZ=y | |
66 | CONFIG_CMD_ASKENV=y | |
e8cc366c | 67 | CONFIG_CMD_GPT=y |
2160ba26 | 68 | CONFIG_CMD_I2C=y |
6e2a7780 LV |
69 | CONFIG_CMD_MMC=y |
70 | CONFIG_CMD_REMOTEPROC=y | |
71 | # CONFIG_CMD_SETEXPR is not set | |
72 | CONFIG_CMD_TIME=y | |
73 | CONFIG_CMD_FAT=y | |
74 | CONFIG_OF_CONTROL=y | |
75 | CONFIG_SPL_OF_CONTROL=y | |
6e2a7780 LV |
76 | CONFIG_SPL_MULTI_DTB_FIT=y |
77 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
e91907a1 | 78 | CONFIG_ENV_OVERWRITE=y |
6e2a7780 | 79 | CONFIG_ENV_IS_IN_FAT=y |
6e2a7780 | 80 | CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" |
8d8ee47e | 81 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
6e2a7780 LV |
82 | CONFIG_SPL_DM=y |
83 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
5a6098ff FA |
84 | CONFIG_REGMAP=y |
85 | CONFIG_SPL_REGMAP=y | |
6e2a7780 LV |
86 | CONFIG_SPL_OF_TRANSLATE=y |
87 | CONFIG_CLK=y | |
88 | CONFIG_SPL_CLK=y | |
89 | CONFIG_CLK_TI_SCI=y | |
36a5c893 VR |
90 | CONFIG_DMA_CHANNELS=y |
91 | CONFIG_TI_K3_NAVSS_UDMA=y | |
6e2a7780 | 92 | CONFIG_TI_SCI_PROTOCOL=y |
6e2a7780 | 93 | CONFIG_DA8XX_GPIO=y |
2160ba26 AD |
94 | CONFIG_DM_I2C=y |
95 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y | |
96 | CONFIG_SYS_I2C_OMAP24XX=y | |
6e2a7780 LV |
97 | CONFIG_DM_MAILBOX=y |
98 | CONFIG_K3_SEC_PROXY=y | |
59e5d1e2 | 99 | CONFIG_K3_AVS0=y |
91332bd2 | 100 | CONFIG_SUPPORT_EMMC_BOOT=y |
489274eb FA |
101 | CONFIG_MMC_HS200_SUPPORT=y |
102 | CONFIG_SPL_MMC_HS200_SUPPORT=y | |
6e2a7780 | 103 | CONFIG_MMC_SDHCI=y |
edcfee17 | 104 | CONFIG_SPL_MMC_SDHCI_ADMA=y |
3a1a0dfc | 105 | CONFIG_MMC_SDHCI_AM654=y |
db04ff42 | 106 | CONFIG_MTD=y |
36a5c893 VR |
107 | CONFIG_DM_SPI_FLASH=y |
108 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y | |
109 | CONFIG_SPI_FLASH_STMICRO=y | |
110 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set | |
6e2a7780 LV |
111 | CONFIG_PINCTRL=y |
112 | # CONFIG_PINCTRL_GENERIC is not set | |
113 | CONFIG_SPL_PINCTRL=y | |
114 | # CONFIG_SPL_PINCTRL_GENERIC is not set | |
115 | CONFIG_PINCTRL_SINGLE=y | |
116 | CONFIG_POWER_DOMAIN=y | |
117 | CONFIG_TI_SCI_POWER_DOMAIN=y | |
118 | CONFIG_DM_REGULATOR=y | |
119 | CONFIG_SPL_DM_REGULATOR=y | |
88af4d46 BB |
120 | CONFIG_DM_REGULATOR_FIXED=y |
121 | CONFIG_SPL_DM_REGULATOR_FIXED=y | |
6e2a7780 LV |
122 | CONFIG_DM_REGULATOR_GPIO=y |
123 | CONFIG_SPL_DM_REGULATOR_GPIO=y | |
e41dd6c4 | 124 | CONFIG_DM_REGULATOR_TPS62360=y |
6e2a7780 LV |
125 | CONFIG_RAM=y |
126 | CONFIG_SPL_RAM=y | |
127 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
54e4311f | 128 | CONFIG_REMOTEPROC_TI_K3_ARM64=y |
6e2a7780 LV |
129 | CONFIG_RESET_TI_SCI=y |
130 | CONFIG_DM_SERIAL=y | |
f7d0ae9c TR |
131 | CONFIG_SOC_DEVICE=y |
132 | CONFIG_SOC_DEVICE_TI_K3=y | |
36a5c893 VR |
133 | CONFIG_SOC_TI=y |
134 | CONFIG_SPI=y | |
135 | CONFIG_DM_SPI=y | |
136 | CONFIG_CADENCE_QSPI=y | |
6e2a7780 | 137 | CONFIG_SYSRESET=y |
09259fce | 138 | CONFIG_SPL_SYSRESET=y |
6e2a7780 LV |
139 | CONFIG_SYSRESET_TI_SCI=y |
140 | CONFIG_TIMER=y | |
141 | CONFIG_SPL_TIMER=y | |
142 | CONFIG_OMAP_TIMER=y | |
208ec9fb | 143 | CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 |