projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 2d257d92 VR |
1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_K3=y | |
| 04150400 | 3 | CONFIG_SYS_MALLOC_LEN=0x08000000 |
| 2d257d92 VR |
4 | CONFIG_SYS_MALLOC_F_LEN=0x9000 |
| 5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
| 6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
| 6ea5bcc4 | 7 | CONFIG_NR_DRAM_BANKS=2 |
| 2d257d92 VR |
8 | CONFIG_SOC_K3_AM625=y |
| 9 | CONFIG_TARGET_AM625_R5_EVM=y | |
| fcb5117d | 10 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| e8dd3044 | 11 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 |
| c960c0fd TR |
12 | CONFIG_SF_DEFAULT_SPEED=25000000 |
| 13 | CONFIG_SF_DEFAULT_MODE=0 | |
| 21d39eb5 | 14 | CONFIG_ENV_SIZE=0x20000 |
| 2d257d92 VR |
15 | CONFIG_DM_GPIO=y |
| 16 | CONFIG_SPL_DM_SPI=y | |
| 17 | CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" | |
| fcb5117d | 18 | CONFIG_DM_RESET=y |
| 2d257d92 VR |
19 | CONFIG_SPL_MMC=y |
| 20 | CONFIG_SPL_SERIAL=y | |
| 0fc5c499 | 21 | CONFIG_SPL_DRIVERS_MISC=y |
| 2d257d92 | 22 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| e8dd3044 | 23 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 |
| 867e16ae | 24 | CONFIG_SPL_TEXT_BASE=0x43c00000 |
| 18e791c4 TR |
25 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 26 | CONFIG_SPL_BSS_START_ADDR=0x43c3b000 | |
| 27 | CONFIG_SPL_BSS_MAX_SIZE=0x3000 | |
| 28 | CONFIG_SPL_STACK_R=y | |
| e8dd3044 KG |
29 | CONFIG_SPL_SIZE_LIMIT=0x3A7F0 |
| 30 | CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 | |
| 2d257d92 VR |
31 | CONFIG_SPL_FS_FAT=y |
| 32 | CONFIG_SPL_LIBDISK_SUPPORT=y | |
| 04150400 | 33 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 21d39eb5 | 34 | CONFIG_SPL_SPI=y |
| 2d257d92 VR |
35 | CONFIG_SPL_LOAD_FIT=y |
| 36 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 | |
| 2d257d92 | 37 | # CONFIG_DISPLAY_CPUINFO is not set |
| e8dd3044 KG |
38 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y |
| 39 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y | |
| 40 | CONFIG_SPL_MAX_SIZE=0x3B000 | |
| 41 | CONFIG_SPL_PAD_TO=0x0 | |
| e8dd3044 | 42 | CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y |
| 2d257d92 | 43 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 2d257d92 | 44 | CONFIG_SPL_SEPARATE_BSS=y |
| 82e26e0d SG |
45 | CONFIG_SPL_SYS_MALLOC=y |
| 46 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
| 47 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000 | |
| 48 | CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 | |
| 2d257d92 | 49 | CONFIG_SPL_EARLY_BSS=y |
| 2a00d73d | 50 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
| 2d257d92 VR |
51 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 |
| 52 | CONFIG_SPL_DM_MAILBOX=y | |
| 04150400 | 53 | CONFIG_SPL_DM_SPI_FLASH=y |
| 21d39eb5 | 54 | CONFIG_SPL_DM_RESET=y |
| 2d257d92 | 55 | CONFIG_SPL_POWER_DOMAIN=y |
| 2d257d92 VR |
56 | CONFIG_SPL_RAM_DEVICE=y |
| 57 | CONFIG_SPL_REMOTEPROC=y | |
| 04150400 DG |
58 | # CONFIG_SPL_SPI_FLASH_TINY is not set |
| 59 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y | |
| 60 | CONFIG_SPL_SPI_LOAD=y | |
| 21d39eb5 | 61 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 |
| 2d257d92 VR |
62 | CONFIG_SPL_YMODEM_SUPPORT=y |
| 63 | CONFIG_HUSH_PARSER=y | |
| 64 | CONFIG_CMD_ASKENV=y | |
| 65 | CONFIG_CMD_DFU=y | |
| 66 | CONFIG_CMD_GPT=y | |
| 67 | CONFIG_CMD_MMC=y | |
| 68 | CONFIG_CMD_REMOTEPROC=y | |
| 69 | # CONFIG_CMD_SETEXPR is not set | |
| 70 | CONFIG_CMD_TIME=y | |
| 71 | CONFIG_CMD_FAT=y | |
| 72 | CONFIG_OF_CONTROL=y | |
| 73 | CONFIG_SPL_OF_CONTROL=y | |
| 74 | CONFIG_SPL_MULTI_DTB_FIT=y | |
| 75 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
| 76 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
| 2d257d92 | 77 | CONFIG_SPL_DM=y |
| fd74f38f | 78 | CONFIG_SPL_DM_DEVICE_REMOVE=y |
| 2d257d92 VR |
79 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 80 | CONFIG_REGMAP=y | |
| 81 | CONFIG_SPL_REGMAP=y | |
| 82 | CONFIG_SPL_OF_TRANSLATE=y | |
| 83 | CONFIG_CLK=y | |
| 84 | CONFIG_SPL_CLK=y | |
| 85 | CONFIG_SPL_CLK_CCF=y | |
| 86 | CONFIG_SPL_CLK_K3_PLL=y | |
| 87 | CONFIG_SPL_CLK_K3=y | |
| 88 | CONFIG_TI_SCI_PROTOCOL=y | |
| 89 | CONFIG_DA8XX_GPIO=y | |
| 90 | CONFIG_DM_MAILBOX=y | |
| 91 | CONFIG_K3_SEC_PROXY=y | |
| 0fc5c499 TR |
92 | CONFIG_SPL_MISC=y |
| 93 | CONFIG_ESM_K3=y | |
| e9113472 | 94 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 2d257d92 VR |
95 | CONFIG_MMC_SDHCI=y |
| 96 | CONFIG_MMC_SDHCI_ADMA=y | |
| 97 | CONFIG_SPL_MMC_SDHCI_ADMA=y | |
| 98 | CONFIG_MMC_SDHCI_AM654=y | |
| db04ff42 | 99 | CONFIG_MTD=y |
| 21d39eb5 | 100 | CONFIG_DM_SPI_FLASH=y |
| 21d39eb5 SS |
101 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 102 | CONFIG_SPI_FLASH_SOFT_RESET=y | |
| 103 | CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y | |
| 104 | CONFIG_SPI_FLASH_SPANSION=y | |
| 105 | CONFIG_SPI_FLASH_S28HX_T=y | |
| 2d257d92 VR |
106 | CONFIG_PINCTRL=y |
| 107 | # CONFIG_PINCTRL_GENERIC is not set | |
| 108 | CONFIG_SPL_PINCTRL=y | |
| 109 | # CONFIG_SPL_PINCTRL_GENERIC is not set | |
| 110 | CONFIG_PINCTRL_SINGLE=y | |
| 111 | CONFIG_POWER_DOMAIN=y | |
| 112 | CONFIG_TI_POWER_DOMAIN=y | |
| 113 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
| 114 | CONFIG_REMOTEPROC_TI_K3_ARM64=y | |
| 2d257d92 VR |
115 | CONFIG_RESET_TI_SCI=y |
| 116 | CONFIG_SPECIFY_CONSOLE_INDEX=y | |
| 117 | CONFIG_DM_SERIAL=y | |
| 118 | CONFIG_SOC_DEVICE=y | |
| 119 | CONFIG_SOC_DEVICE_TI_K3=y | |
| 120 | CONFIG_SOC_TI=y | |
| 21d39eb5 SS |
121 | CONFIG_SPI=y |
| 122 | CONFIG_DM_SPI=y | |
| 123 | CONFIG_CADENCE_QSPI=y | |
| 2d257d92 VR |
124 | CONFIG_TIMER=y |
| 125 | CONFIG_SPL_TIMER=y | |
| 126 | CONFIG_OMAP_TIMER=y | |
| 127 | CONFIG_LIB_RATIONAL=y | |
| 128 | CONFIG_SPL_LIB_RATIONAL=y |