[J-u-boot.git] / include / configs / j721e_evm.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Configuration header file for K3 J721E EVM
 *
 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
 *	Lokesh Vutla <[email protected]>
 */

#ifndef __CONFIG_J721E_EVM_H
#define __CONFIG_J721E_EVM_H

#include <linux/sizes.h>
#include <config_distro_bootcmd.h>
#include <environment/ti/mmc.h>
#include <environment/ti/k3_rproc.h>
#include <environment/ti/ufs.h>
#include <environment/ti/k3_dfu.h>

/* DDR Configuration */
#define CONFIG_SYS_SDRAM_BASE1		0x880000000

/* SPL Loader Configuration */
#ifdef CONFIG_TARGET_J721E_A72_EVM
#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE +	\
					 CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
/* Image load address in RAM for DFU boot*/
#else
/*
 * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
 * possible (to allow the build to go through), as this directly affects
 * our memory footprint. The less we use for BSS the more we have available
 * for everything else.
 */
#define CONFIG_SPL_BSS_MAX_SIZE		0xA000
/*
 * Link BSS to be within SPL in a dedicated region located near the top of
 * the MCU SRAM, this way making it available also before relocation. Note
 * that we are not using the actual top of the MCU SRAM as there is a memory
 * location filled in by the boot ROM that we want to read out without any
 * interference from the C context.
 */
#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
					 CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START	0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_16M
/* Image load address in RAM for DFU boot*/
#endif

#ifdef CONFIG_SYS_K3_SPL_ATF
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"tispl.bin"
#endif

#define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE

#define CONFIG_SYS_BOOTM_LEN		SZ_64M
#define CONFIG_CQSPI_REF_CLK		133333333

/* HyperFlash related configuration */
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1

/* U-Boot general configuration */
#define EXTRA_ENV_J721E_BOARD_SETTINGS					\
	"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"	\
	"findfdt="							\
		"setenv name_fdt ${default_device_tree};"		\
		"setenv fdtfile ${name_fdt}\0"				\
	"loadaddr=0x80080000\0"						\
	"fdtaddr=0x82000000\0"						\
	"overlayaddr=0x83000000\0"					\
	"name_kern=Image\0"						\
	"console=ttyS2,115200n8\0"					\
	"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 "	\
		"${mtdparts}\0"						\
	"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"

#define PARTS_DEFAULT \
	/* Linux partitions */ \
	"uuid_disk=${uuid_gpt_disk};" \
	"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"

/* U-Boot MMC-specific configuration */
#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC				\
	"boot=mmc\0"							\
	"mmcdev=1\0"							\
	"bootpart=1:2\0"						\
	"bootdir=/boot\0"						\
	"addr_mainr5f0_0load=88000000\0"					\
	"name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0"		\
	"addr_mcur5f0_0load=89000000\0"					\
	"name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"		\
	"rd_spec=-\0"							\
	"init_mmc=run args_all args_mmc\0"				\
	"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
	"get_overlay_mmc="						\
		"fdt address ${fdtaddr};"				\
		"fdt resize 0x100000;"					\
		"for overlay in $name_overlays;"			\
		"do;"							\
		"load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && "	\
		"fdt apply ${overlayaddr};"				\
		"done;\0"						\
	"partitions=" PARTS_DEFAULT					\
	"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "		\
		"${bootdir}/${name_kern}\0"				\
	"get_fit_mmc=load mmc ${bootpart} ${addr_fit} "			\
		"${bootdir}/${name_fit}\0"				\
	"partitions=" PARTS_DEFAULT

#ifdef DEFAULT_RPROCS
#undef DEFAULT_RPROCS
#endif
#define DEFAULT_RPROCS	""						\
		"3 /lib/firmware/j7-main-r5f0_1-fw "			\
		"4 /lib/firmware/j7-main-r5f1_0-fw "			\
		"6 /lib/firmware/j7-c66_0-fw "				\
		"7 /lib/firmware/j7-c66_1-fw "				\
		"8 /lib/firmware/j7-c71_0-fw "

/* set default dfu_bufsiz to 128KB (sector size of OSPI) */
#define EXTRA_ENV_DFUARGS \
	"dfu_bufsiz=0x20000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_OSPI

#ifdef CONFIG_TARGET_J721E_A72_EVM
#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD				\
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"				\
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
#else
#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
#endif

/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	DEFAULT_MMC_TI_ARGS						\
	DEFAULT_FIT_TI_ARGS						\
	EXTRA_ENV_J721E_BOARD_SETTINGS					\
	EXTRA_ENV_J721E_BOARD_SETTINGS_MMC				\
	EXTRA_ENV_RPROC_SETTINGS					\
	EXTRA_ENV_DFUARGS						\
	DEFAULT_UFS_TI_ARGS						\
	EXTRA_ENV_J721E_BOARD_SETTINGS_MTD

/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>

/* MMC ENV related defines */
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_SYS_MMC_ENV_PART	1
#endif

#endif /* __CONFIG_J721E_EVM_H */
Commit	Line	Data
f8185032 LV	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* Configuration header file for K3 J721E EVM
	4	*
	5	* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
	6	* Lokesh Vutla <[email protected]>
	7	*/
	8
	9	#ifndef __CONFIG_J721E_EVM_H
	10	#define __CONFIG_J721E_EVM_H
	11
	12	#include <linux/sizes.h>
	13	#include <config_distro_bootcmd.h>
	14	#include <environment/ti/mmc.h>
0b4ab9c9	15	#include <environment/ti/k3_rproc.h>
13b6770c	16	#include <environment/ti/ufs.h>
f4b3c1cc	17	#include <environment/ti/k3_dfu.h>
f8185032	18
f8185032 LV	19	/* DDR Configuration */
	20	#define CONFIG_SYS_SDRAM_BASE1 0x880000000
	21
	22	/* SPL Loader Configuration */
	23	#ifdef CONFIG_TARGET_J721E_A72_EVM
	24	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
	25	CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
4728c6f7	26	/* Image load address in RAM for DFU boot*/
f8185032 LV	27	#else
	28	/*
	29	* Maximum size in memory allocated to the SPL BSS. Keep it as tight as
	30	* possible (to allow the build to go through), as this directly affects
	31	* our memory footprint. The less we use for BSS the more we have available
	32	* for everything else.
	33	*/
	34	#define CONFIG_SPL_BSS_MAX_SIZE 0xA000
	35	/*
	36	* Link BSS to be within SPL in a dedicated region located near the top of
	37	* the MCU SRAM, this way making it available also before relocation. Note
	38	* that we are not using the actual top of the MCU SRAM as there is a memory
	39	* location filled in by the boot ROM that we want to read out without any
	40	* interference from the C context.
	41	*/
	42	#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
	43	CONFIG_SPL_BSS_MAX_SIZE)
	44	/* Set the stack right below the SPL BSS section */
	45	#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
	46	/* Configure R5 SPL post-relocation malloc pool in DDR */
	47	#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
	48	#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
4728c6f7	49	/* Image load address in RAM for DFU boot*/
f8185032 LV	50	#endif
	51
	52	#ifdef CONFIG_SYS_K3_SPL_ATF
	53	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
	54	#endif
	55
	56	#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
	57
	58	#define CONFIG_SYS_BOOTM_LEN SZ_64M
	59	#define CONFIG_CQSPI_REF_CLK 133333333
	60
1fc18e17 VR	61	/* HyperFlash related configuration */
	62	#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
	63
f8185032 LV	64	/* U-Boot general configuration */
	65	#define EXTRA_ENV_J721E_BOARD_SETTINGS \
	66	"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
fb03b77a AD	67	"findfdt=" \
	68	"setenv name_fdt ${default_device_tree};" \
	69	"setenv fdtfile ${name_fdt}\0" \
f8185032 LV	70	"loadaddr=0x80080000\0" \
	71	"fdtaddr=0x82000000\0" \
	72	"overlayaddr=0x83000000\0" \
	73	"name_kern=Image\0" \
	74	"console=ttyS2,115200n8\0" \
97103b11 VR	75	"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \
97103b11 VR	76	"${mtdparts}\0" \
f8185032 LV	77	"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
f8185032 LV	78
0ee02701 FA	79	#define PARTS_DEFAULT \
	80	/* Linux partitions */ \
	81	"uuid_disk=${uuid_gpt_disk};" \
	82	"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
	83
f8185032 LV	84	/* U-Boot MMC-specific configuration */
	85	#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
	86	"boot=mmc\0" \
	87	"mmcdev=1\0" \
	88	"bootpart=1:2\0" \
	89	"bootdir=/boot\0" \
316c9271 K	90	"addr_mainr5f0_0load=88000000\0" \
	91	"name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \
	92	"addr_mcur5f0_0load=89000000\0" \
	93	"name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" \
f8185032 LV	94	"rd_spec=-\0" \
f8185032 LV	95	"init_mmc=run args_all args_mmc\0" \
fb03b77a	96	"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
f8185032 LV	97	"get_overlay_mmc=" \
	98	"fdt address ${fdtaddr};" \
	99	"fdt resize 0x100000;" \
ee53b595	100	"for overlay in $name_overlays;" \
f8185032 LV	101	"do;" \
	102	"load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \
	103	"fdt apply ${overlayaddr};" \
	104	"done;\0" \
0ee02701	105	"partitions=" PARTS_DEFAULT \
f8185032	106	"get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
fb03b77a AD	107	"${bootdir}/${name_kern}\0" \
	108	"get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
	109	"${bootdir}/${name_fit}\0" \
	110	"partitions=" PARTS_DEFAULT
f8185032	111
0b4ab9c9 SA	112	#ifdef DEFAULT_RPROCS
	113	#undef DEFAULT_RPROCS
	114	#endif
	115	#define DEFAULT_RPROCS "" \
	116	"3 /lib/firmware/j7-main-r5f0_1-fw " \
	117	"4 /lib/firmware/j7-main-r5f1_0-fw " \
	118	"6 /lib/firmware/j7-c66_0-fw " \
	119	"7 /lib/firmware/j7-c66_1-fw " \
	120	"8 /lib/firmware/j7-c71_0-fw "
	121
f4b3c1cc VR	122	/* set default dfu_bufsiz to 128KB (sector size of OSPI) */
	123	#define EXTRA_ENV_DFUARGS \
	124	"dfu_bufsiz=0x20000\0" \
	125	DFU_ALT_INFO_MMC \
	126	DFU_ALT_INFO_EMMC \
	127	DFU_ALT_INFO_RAM \
	128	DFU_ALT_INFO_OSPI
	129
97103b11 VR	130	#ifdef CONFIG_TARGET_J721E_A72_EVM
	131	#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
	132	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
	133	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
	134	#else
	135	#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
	136	#endif
	137
f8185032 LV	138	/* Incorporate settings into the U-Boot environment */
	139	#define CONFIG_EXTRA_ENV_SETTINGS \
	140	DEFAULT_MMC_TI_ARGS \
fb03b77a	141	DEFAULT_FIT_TI_ARGS \
f8185032	142	EXTRA_ENV_J721E_BOARD_SETTINGS \
0b4ab9c9	143	EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
13b6770c	144	EXTRA_ENV_RPROC_SETTINGS \
f4b3c1cc	145	EXTRA_ENV_DFUARGS \
97103b11 VR	146	DEFAULT_UFS_TI_ARGS \
97103b11 VR	147	EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
f8185032 LV	148
	149	/* Now for the remaining common defines */
	150	#include <configs/ti_armv7_common.h>
	151
4250bf8e FA	152	/* MMC ENV related defines */
	153	#ifdef CONFIG_ENV_IS_IN_MMC
	154	#define CONFIG_SYS_MMC_ENV_DEV 0
	155	#define CONFIG_SYS_MMC_ENV_PART 1
	156	#endif
	157
f8185032	158	#endif /* __CONFIG_J721E_EVM_H */