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gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spi
[J-u-boot.git] / drivers / block / ide.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
e9be1ee7
SG		 2/*
3 * (C) Copyright 2000-2011
4 * Wolfgang Denk, DENX Software Engineering, [email protected].
e9be1ee7
SG		 5 */
6
7#include <common.h>
8#include <ata.h>
145df842 9#include <dm.h>
e9be1ee7
SG		 10#include <ide.h>
11#include <watchdog.h>
12#include <asm/io.h>
13
14#ifdef __PPC__
15# define EIEIO __asm__ volatile ("eieio")
16# define SYNC __asm__ volatile ("sync")
17#else
18# define EIEIO /* nothing */
19# define SYNC /* nothing */
20#endif
21
22/* Current offset for IDE0 / IDE1 bus access */
23ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
24#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
25 CONFIG_SYS_ATA_IDE0_OFFSET,
26#endif
27#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
28 CONFIG_SYS_ATA_IDE1_OFFSET,
29#endif
30};
31
32static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
33
34struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
35
36#define IDE_TIME_OUT 2000 /* 2 sec timeout */
37
38#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
39
40#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
41
42#ifndef CONFIG_SYS_ATA_PORT_ADDR
43#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
44#endif
45
e9be1ee7
SG		 46#ifdef CONFIG_IDE_RESET
47extern void ide_set_reset(int idereset);
48
49static void ide_reset(void)
50{
51 int i;
52
53 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
54 ide_bus_ok[i] = 0;
55 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
56 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
57
58 ide_set_reset(1); /* assert reset */
59
60 /* the reset signal shall be asserted for et least 25 us */
61 udelay(25);
62
63 WATCHDOG_RESET();
64
65 /* de-assert RESET signal */
66 ide_set_reset(0);
67
68 /* wait 250 ms */
69 for (i = 0; i < 250; ++i)
70 udelay(1000);
71}
72#else
73#define ide_reset() /* dummy */
74#endif /* CONFIG_IDE_RESET */
75
76/*
77 * Wait until Busy bit is off, or timeout (in ms)
78 * Return last status
79 */
80static uchar ide_wait(int dev, ulong t)
81{
82 ulong delay = 10 * t; /* poll every 100 us */
83 uchar c;
84
85 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
86 udelay(100);
87 if (delay-- == 0)
88 break;
89 }
90 return c;
91}
92
93/*
94 * copy src to dest, skipping leading and trailing blanks and null
95 * terminate the string
96 * "len" is the size of available memory including the terminating '\0'
97 */
98static void ident_cpy(unsigned char *dst, unsigned char *src,
99 unsigned int len)
100{
101 unsigned char *end, *last;
102
103 last = dst;
104 end = src + len - 1;
105
106 /* reserve space for '\0' */
107 if (len < 2)
108 goto OUT;
109
110 /* skip leading white space */
111 while ((*src) && (src < end) && (*src == ' '))
112 ++src;
113
114 /* copy string, omitting trailing white space */
115 while ((*src) && (src < end)) {
116 *dst++ = *src;
117 if (*src++ != ' ')
118 last = dst;
119 }
120OUT:
121 *last = '\0';
122}
123
124#ifdef CONFIG_ATAPI
125/****************************************************************************
126 * ATAPI Support
127 */
128
129#if defined(CONFIG_IDE_SWAP_IO)
130/* since ATAPI may use commands with not 4 bytes alligned length
131 * we have our own transfer functions, 2 bytes alligned */
132__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
133{
134 ushort *dbuf;
135 volatile ushort *pbuf;
136
137 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
138 dbuf = (ushort *)sect_buf;
139
140 debug("in output data shorts base for read is %lx\n",
141 (unsigned long) pbuf);
142
143 while (shorts--) {
144 EIEIO;
145 *pbuf = *dbuf++;
146 }
147}
148
149__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
150{
151 ushort *dbuf;
152 volatile ushort *pbuf;
153
154 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
155 dbuf = (ushort *)sect_buf;
156
157 debug("in input data shorts base for read is %lx\n",
158 (unsigned long) pbuf);
159
160 while (shorts--) {
161 EIEIO;
162 *dbuf++ = *pbuf;
163 }
164}
165
166#else /* ! CONFIG_IDE_SWAP_IO */
167__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
168{
169 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
170}
171
172__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
173{
174 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
175}
176
177#endif /* CONFIG_IDE_SWAP_IO */
178
179/*
180 * Wait until (Status & mask) == res, or timeout (in ms)
181 * Return last status
182 * This is used since some ATAPI CD ROMs clears their Busy Bit first
183 * and then they set their DRQ Bit
184 */
185static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
186{
187 ulong delay = 10 * t; /* poll every 100 us */
188 uchar c;
189
190 /* prevents to read the status before valid */
191 c = ide_inb(dev, ATA_DEV_CTL);
192
193 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
194 /* break if error occurs (doesn't make sense to wait more) */
195 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
196 break;
197 udelay(100);
198 if (delay-- == 0)
199 break;
200 }
201 return c;
202}
203
204/*
205 * issue an atapi command
206 */
207unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
208 unsigned char *buffer, int buflen)
209{
210 unsigned char c, err, mask, res;
211 int n;
212
e9be1ee7
SG		 213 /* Select device
214 */
215 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
216 res = 0;
217 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
218 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
219 if ((c & mask) != res) {
220 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
221 c);
222 err = 0xFF;
223 goto AI_OUT;
224 }
225 /* write taskfile */
226 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
227 ide_outb(device, ATA_SECT_CNT, 0);
228 ide_outb(device, ATA_SECT_NUM, 0);
229 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
230 ide_outb(device, ATA_CYL_HIGH,
231 (unsigned char) ((buflen >> 8) & 0xFF));
232 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
233
234 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
235 udelay(50);
236
237 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
238 res = ATA_STAT_DRQ;
239 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
240
241 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
242 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
243 device, c);
244 err = 0xFF;
245 goto AI_OUT;
246 }
247
248 /* write command block */
249 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
250
251 /* ATAPI Command written wait for completition */
252 udelay(5000); /* device must set bsy */
253
254 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
255 /*
256 * if no data wait for DRQ = 0 BSY = 0
257 * if data wait for DRQ = 1 BSY = 0
258 */
259 res = 0;
260 if (buflen)
261 res = ATA_STAT_DRQ;
262 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
263 if ((c & mask) != res) {
264 if (c & ATA_STAT_ERR) {
265 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
266 debug("atapi_issue 1 returned sense key %X status %02X\n",
267 err, c);
268 } else {
269 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
270 ccb[0], c);
271 err = 0xFF;
272 }
273 goto AI_OUT;
274 }
275 n = ide_inb(device, ATA_CYL_HIGH);
276 n <<= 8;
277 n += ide_inb(device, ATA_CYL_LOW);
278 if (n > buflen) {
279 printf("ERROR, transfer bytes %d requested only %d\n", n,
280 buflen);
281 err = 0xff;
282 goto AI_OUT;
283 }
284 if ((n == 0) && (buflen < 0)) {
285 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
286 err = 0xff;
287 goto AI_OUT;
288 }
289 if (n != buflen) {
290 debug("WARNING, transfer bytes %d not equal with requested %d\n",
291 n, buflen);
292 }
293 if (n != 0) { /* data transfer */
294 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
295 /* we transfer shorts */
296 n >>= 1;
297 /* ok now decide if it is an in or output */
298 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
299 debug("Write to device\n");
300 ide_output_data_shorts(device, (unsigned short *)buffer,
301 n);
302 } else {
303 debug("Read from device @ %p shorts %d\n", buffer, n);
304 ide_input_data_shorts(device, (unsigned short *)buffer,
305 n);
306 }
307 }
308 udelay(5000); /* seems that some CD ROMs need this... */
309 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
310 res = 0;
311 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
312 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
313 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
314 debug("atapi_issue 2 returned sense key %X status %X\n", err,
315 c);
316 } else {
317 err = 0;
318 }
319AI_OUT:
e9be1ee7
SG		 320 return err;
321}
322
323/*
324 * sending the command to atapi_issue. If an status other than good
325 * returns, an request_sense will be issued
326 */
327
328#define ATAPI_DRIVE_NOT_READY 100
329#define ATAPI_UNIT_ATTN 10
330
331unsigned char atapi_issue_autoreq(int device,
332 unsigned char *ccb,
333 int ccblen,
334 unsigned char *buffer, int buflen)
335{
336 unsigned char sense_data[18], sense_ccb[12];
337 unsigned char res, key, asc, ascq;
338 int notready, unitattn;
339
340 unitattn = ATAPI_UNIT_ATTN;
341 notready = ATAPI_DRIVE_NOT_READY;
342
343retry:
344 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
345 if (res == 0)
346 return 0; /* Ok */
347
348 if (res == 0xFF)
349 return 0xFF; /* error */
350
351 debug("(auto_req)atapi_issue returned sense key %X\n", res);
352
353 memset(sense_ccb, 0, sizeof(sense_ccb));
354 memset(sense_data, 0, sizeof(sense_data));
355 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
356 sense_ccb[4] = 18; /* allocation Length */
357
358 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
359 key = (sense_data[2] & 0xF);
360 asc = (sense_data[12]);
361 ascq = (sense_data[13]);
362
363 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
364 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
365 sense_data[0], key, asc, ascq);
366
367 if ((key == 0))
368 return 0; /* ok device ready */
369
370 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
371 if (unitattn-- > 0) {
372 udelay(200 * 1000);
373 goto retry;
374 }
375 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
376 goto error;
377 }
378 if ((asc == 0x4) && (ascq == 0x1)) {
379 /* not ready, but will be ready soon */
380 if (notready-- > 0) {
381 udelay(200 * 1000);
382 goto retry;
383 }
384 printf("Drive not ready, tried %d times\n",
385 ATAPI_DRIVE_NOT_READY);
386 goto error;
387 }
388 if (asc == 0x3a) {
389 debug("Media not present\n");
390 goto error;
391 }
392
393 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
394 ascq);
395error:
396 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
397 return 0xFF;
398}
399
400/*
401 * atapi_read:
402 * we transfer only one block per command, since the multiple DRQ per
403 * command is not yet implemented
404 */
405#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
406#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
407#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
408
409ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
410 void *buffer)
411{
412 int device = block_dev->devnum;
413 ulong n = 0;
414 unsigned char ccb[12]; /* Command descriptor block */
415 ulong cnt;
416
417 debug("atapi_read dev %d start " LBAF " blocks " LBAF
418 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
419
420 do {
421 if (blkcnt > ATAPI_READ_MAX_BLOCK)
422 cnt = ATAPI_READ_MAX_BLOCK;
423 else
424 cnt = blkcnt;
425
426 ccb[0] = ATAPI_CMD_READ_12;
427 ccb[1] = 0; /* reserved */
428 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
429 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
430 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
431 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
432 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
433 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
434 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
435 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
436 ccb[10] = 0; /* reserved */
437 ccb[11] = 0; /* reserved */
438
439 if (atapi_issue_autoreq(device, ccb, 12,
440 (unsigned char *)buffer,
441 cnt * ATAPI_READ_BLOCK_SIZE)
442 == 0xFF) {
443 return n;
444 }
445 n += cnt;
446 blkcnt -= cnt;
447 blknr += cnt;
448 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
449 } while (blkcnt > 0);
450 return n;
451}
452
453static void atapi_inquiry(struct blk_desc *dev_desc)
454{
455 unsigned char ccb[12]; /* Command descriptor block */
456 unsigned char iobuf[64]; /* temp buf */
457 unsigned char c;
458 int device;
459
460 device = dev_desc->devnum;
461 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
52a1c2c6 462#ifndef CONFIG_BLK
e9be1ee7 463 dev_desc->block_read = atapi_read;
52a1c2c6 464#endif
e9be1ee7
SG		 465
466 memset(ccb, 0, sizeof(ccb));
467 memset(iobuf, 0, sizeof(iobuf));
468
469 ccb[0] = ATAPI_CMD_INQUIRY;
470 ccb[4] = 40; /* allocation Legnth */
471 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
472
473 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
474 if (c != 0)
475 return;
476
477 /* copy device ident strings */
478 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
479 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
480 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
481
482 dev_desc->lun = 0;
483 dev_desc->lba = 0;
484 dev_desc->blksz = 0;
485 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
486 dev_desc->type = iobuf[0] & 0x1f;
487
488 if ((iobuf[1] & 0x80) == 0x80)
489 dev_desc->removable = 1;
490 else
491 dev_desc->removable = 0;
492
493 memset(ccb, 0, sizeof(ccb));
494 memset(iobuf, 0, sizeof(iobuf));
495 ccb[0] = ATAPI_CMD_START_STOP;
496 ccb[4] = 0x03; /* start */
497
498 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
499
500 debug("ATAPI_CMD_START_STOP returned %x\n", c);
501 if (c != 0)
502 return;
503
504 memset(ccb, 0, sizeof(ccb));
505 memset(iobuf, 0, sizeof(iobuf));
506 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
507
508 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
509 if (c != 0)
510 return;
511
512 memset(ccb, 0, sizeof(ccb));
513 memset(iobuf, 0, sizeof(iobuf));
514 ccb[0] = ATAPI_CMD_READ_CAP;
515 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
516 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
517 if (c != 0)
518 return;
519
520 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
521 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
522 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
523
524 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
525 ((unsigned long) iobuf[1] << 16) +
526 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
527 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
528 ((unsigned long) iobuf[5] << 16) +
529 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
530 dev_desc->log2blksz = LOG2(dev_desc->blksz);
531#ifdef CONFIG_LBA48
532 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
533 dev_desc->lba48 = 0;
534#endif
535 return;
536}
537
538#endif /* CONFIG_ATAPI */
539
540static void ide_ident(struct blk_desc *dev_desc)
541{
542 unsigned char c;
543 hd_driveid_t iop;
544
545#ifdef CONFIG_ATAPI
546 int retries = 0;
547#endif
548 int device;
549
550 device = dev_desc->devnum;
551 printf(" Device %d: ", device);
552
e9be1ee7
SG		 553 /* Select device
554 */
555 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
556 dev_desc->if_type = IF_TYPE_IDE;
557#ifdef CONFIG_ATAPI
558
559 retries = 0;
560
561 /* Warning: This will be tricky to read */
562 while (retries <= 1) {
563 /* check signature */
564 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
565 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
566 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
567 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
568 /* ATAPI Signature found */
569 dev_desc->if_type = IF_TYPE_ATAPI;
570 /*
571 * Start Ident Command
572 */
573 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
574 /*
575 * Wait for completion - ATAPI devices need more time
576 * to become ready
577 */
578 c = ide_wait(device, ATAPI_TIME_OUT);
579 } else
580#endif
581 {
582 /*
583 * Start Ident Command
584 */
585 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
586
587 /*
588 * Wait for completion
589 */
590 c = ide_wait(device, IDE_TIME_OUT);
591 }
e9be1ee7
SG		 592
593 if (((c & ATA_STAT_DRQ) == 0) ||
594 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
595#ifdef CONFIG_ATAPI
596 {
597 /*
598 * Need to soft reset the device
599 * in case it's an ATAPI...
600 */
601 debug("Retrying...\n");
602 ide_outb(device, ATA_DEV_HD,
603 ATA_LBA | ATA_DEVICE(device));
604 udelay(100000);
605 ide_outb(device, ATA_COMMAND, 0x08);
606 udelay(500000); /* 500 ms */
607 }
608 /*
609 * Select device
610 */
611 ide_outb(device, ATA_DEV_HD,
612 ATA_LBA | ATA_DEVICE(device));
613 retries++;
614#else
615 return;
616#endif
617 }
618#ifdef CONFIG_ATAPI
619 else
620 break;
621 } /* see above - ugly to read */
622
623 if (retries == 2) /* Not found */
624 return;
625#endif
626
627 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
628
629 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
630 sizeof(dev_desc->revision));
631 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
632 sizeof(dev_desc->vendor));
633 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
634 sizeof(dev_desc->product));
635#ifdef __LITTLE_ENDIAN
636 /*
637 * firmware revision, model, and serial number have Big Endian Byte
638 * order in Word. Convert all three to little endian.
639 *
640 * See CF+ and CompactFlash Specification Revision 2.0:
641 * 6.2.1.6: Identify Drive, Table 39 for more details
642 */
643
644 strswab(dev_desc->revision);
645 strswab(dev_desc->vendor);
646 strswab(dev_desc->product);
647#endif /* __LITTLE_ENDIAN */
648
649 if ((iop.config & 0x0080) == 0x0080)
650 dev_desc->removable = 1;
651 else
652 dev_desc->removable = 0;
653
654#ifdef CONFIG_ATAPI
655 if (dev_desc->if_type == IF_TYPE_ATAPI) {
656 atapi_inquiry(dev_desc);
657 return;
658 }
659#endif /* CONFIG_ATAPI */
660
661#ifdef __BIG_ENDIAN
662 /* swap shorts */
663 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
664#else /* ! __BIG_ENDIAN */
665 /*
666 * do not swap shorts on little endian
667 *
668 * See CF+ and CompactFlash Specification Revision 2.0:
669 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
670 */
671 dev_desc->lba = iop.lba_capacity;
672#endif /* __BIG_ENDIAN */
673
674#ifdef CONFIG_LBA48
675 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
676 dev_desc->lba48 = 1;
677 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
678 ((unsigned long long) iop.lba48_capacity[1] << 16) |
679 ((unsigned long long) iop.lba48_capacity[2] << 32) |
680 ((unsigned long long) iop.lba48_capacity[3] << 48);
681 } else {
682 dev_desc->lba48 = 0;
683 }
684#endif /* CONFIG_LBA48 */
685 /* assuming HD */
686 dev_desc->type = DEV_TYPE_HARDDISK;
687 dev_desc->blksz = ATA_BLOCKSIZE;
688 dev_desc->log2blksz = LOG2(dev_desc->blksz);
689 dev_desc->lun = 0; /* just to fill something in... */
690
691#if 0 /* only used to test the powersaving mode,
692 * if enabled, the drive goes after 5 sec
693 * in standby mode */
694 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
695 c = ide_wait(device, IDE_TIME_OUT);
696 ide_outb(device, ATA_SECT_CNT, 1);
697 ide_outb(device, ATA_LBA_LOW, 0);
698 ide_outb(device, ATA_LBA_MID, 0);
699 ide_outb(device, ATA_LBA_HIGH, 0);
700 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
701 ide_outb(device, ATA_COMMAND, 0xe3);
702 udelay(50);
703 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
704#endif
705}
706
e9be1ee7
SG		 707__weak void ide_outb(int dev, int port, unsigned char val)
708{
709 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
710 dev, port, val,
711 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
712
713#if defined(CONFIG_IDE_AHB)
714 if (port) {
715 /* write command */
716 ide_write_register(dev, port, val);
717 } else {
718 /* write data */
719 outb(val, (ATA_CURR_BASE(dev)));
720 }
721#else
722 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
723#endif
724}
725
726__weak unsigned char ide_inb(int dev, int port)
727{
728 uchar val;
729
730#if defined(CONFIG_IDE_AHB)
731 val = ide_read_register(dev, port);
732#else
733 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
734#endif
735
736 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
737 dev, port,
738 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
739 return val;
740}
741
742void ide_init(void)
743{
744 unsigned char c;
745 int i, bus;
746
e9be1ee7
SG		 747#ifdef CONFIG_IDE_PREINIT
748 WATCHDOG_RESET();
749
750 if (ide_preinit()) {
751 puts("ide_preinit failed\n");
752 return;
753 }
754#endif /* CONFIG_IDE_PREINIT */
755
756 WATCHDOG_RESET();
757
e9be1ee7
SG		 758 /* ATAPI Drives seems to need a proper IDE Reset */
759 ide_reset();
760
e9be1ee7
SG		 761 /*
762 * Wait for IDE to get ready.
763 * According to spec, this can take up to 31 seconds!
764 */
765 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
766 int dev =
767 bus * (CONFIG_SYS_IDE_MAXDEVICE /
768 CONFIG_SYS_IDE_MAXBUS);
769
e9be1ee7
SG		 770 printf("Bus %d: ", bus);
771
772 ide_bus_ok[bus] = 0;
773
774 /* Select device
775 */
776 udelay(100000); /* 100 ms */
777 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
778 udelay(100000); /* 100 ms */
779 i = 0;
780 do {
781 udelay(10000); /* 10 ms */
782
783 c = ide_inb(dev, ATA_STATUS);
784 i++;
785 if (i > (ATA_RESET_TIME * 100)) {
786 puts("** Timeout **\n");
e9be1ee7
SG		 787 return;
788 }
789 if ((i >= 100) && ((i % 100) == 0))
790 putc('.');
791
792 } while (c & ATA_STAT_BUSY);
793
794 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
795 puts("not available ");
796 debug("Status = 0x%02X ", c);
797#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
798 } else if ((c & ATA_STAT_READY) == 0) {
799 puts("not available ");
800 debug("Status = 0x%02X ", c);
801#endif
802 } else {
803 puts("OK ");
804 ide_bus_ok[bus] = 1;
805 }
806 WATCHDOG_RESET();
807 }
808
809 putc('\n');
810
e9be1ee7 811 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
e9be1ee7
SG		 812 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
813 ide_dev_desc[i].if_type = IF_TYPE_IDE;
814 ide_dev_desc[i].devnum = i;
815 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
816 ide_dev_desc[i].blksz = 0;
817 ide_dev_desc[i].log2blksz =
818 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
819 ide_dev_desc[i].lba = 0;
145df842 820#ifndef CONFIG_BLK
e9be1ee7
SG		 821 ide_dev_desc[i].block_read = ide_read;
822 ide_dev_desc[i].block_write = ide_write;
145df842 823#endif
e9be1ee7
SG		 824 if (!ide_bus_ok[IDE_BUS(i)])
825 continue;
e9be1ee7 826 ide_ident(&ide_dev_desc[i]);
e9be1ee7
SG		 827 dev_print(&ide_dev_desc[i]);
828
68e6f221 829#ifndef CONFIG_BLK
e9be1ee7
SG		 830 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
831 /* initialize partition type */
832 part_init(&ide_dev_desc[i]);
833 }
68e6f221 834#endif
e9be1ee7
SG		 835 }
836 WATCHDOG_RESET();
68e6f221
BM		 837
838#ifdef CONFIG_BLK
839 struct udevice *dev;
840
841 uclass_first_device(UCLASS_IDE, &dev);
842#endif
e9be1ee7
SG		 843}
844
e9be1ee7
SG		 845/* We only need to swap data if we are running on a big endian cpu. */
846#if defined(__LITTLE_ENDIAN)
847__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
848{
849 ide_input_data(dev, sect_buf, words);
850}
851#else
852__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
853{
854 volatile ushort *pbuf =
855 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
856 ushort *dbuf = (ushort *)sect_buf;
857
858 debug("in input swap data base for read is %lx\n",
859 (unsigned long) pbuf);
860
861 while (words--) {
862#ifdef __MIPS__
863 *dbuf++ = swab16p((u16 *)pbuf);
864 *dbuf++ = swab16p((u16 *)pbuf);
865#else
866 *dbuf++ = ld_le16(pbuf);
867 *dbuf++ = ld_le16(pbuf);
868#endif /* !MIPS */
869 }
870}
871#endif /* __LITTLE_ENDIAN */
872
873
874#if defined(CONFIG_IDE_SWAP_IO)
875__weak void ide_output_data(int dev, const ulong *sect_buf, int words)
876{
877 ushort *dbuf;
878 volatile ushort *pbuf;
879
880 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
881 dbuf = (ushort *)sect_buf;
882 while (words--) {
883 EIEIO;
884 *pbuf = *dbuf++;
885 EIEIO;
886 *pbuf = *dbuf++;
887 }
888}
889#else /* ! CONFIG_IDE_SWAP_IO */
890__weak void ide_output_data(int dev, const ulong *sect_buf, int words)
891{
892#if defined(CONFIG_IDE_AHB)
893 ide_write_data(dev, sect_buf, words);
894#else
895 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
896#endif
897}
898#endif /* CONFIG_IDE_SWAP_IO */
899
900#if defined(CONFIG_IDE_SWAP_IO)
901__weak void ide_input_data(int dev, ulong *sect_buf, int words)
902{
903 ushort *dbuf;
904 volatile ushort *pbuf;
905
906 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
907 dbuf = (ushort *)sect_buf;
908
909 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
910
911 while (words--) {
912 EIEIO;
913 *dbuf++ = *pbuf;
914 EIEIO;
915 *dbuf++ = *pbuf;
916 }
917}
918#else /* ! CONFIG_IDE_SWAP_IO */
919__weak void ide_input_data(int dev, ulong *sect_buf, int words)
920{
921#if defined(CONFIG_IDE_AHB)
922 ide_read_data(dev, sect_buf, words);
923#else
924 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
925#endif
926}
927
928#endif /* CONFIG_IDE_SWAP_IO */
929
145df842
SG		 930#ifdef CONFIG_BLK
931ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
932 void *buffer)
933#else
e9be1ee7
SG		 934ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
935 void *buffer)
145df842 936#endif
e9be1ee7 937{
145df842
SG		 938#ifdef CONFIG_BLK
939 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
940#endif
e9be1ee7
SG		 941 int device = block_dev->devnum;
942 ulong n = 0;
943 unsigned char c;
944 unsigned char pwrsave = 0; /* power save */
945
946#ifdef CONFIG_LBA48
947 unsigned char lba48 = 0;
948
949 if (blknr & 0x0000fffff0000000ULL) {
950 /* more than 28 bits used, use 48bit mode */
951 lba48 = 1;
952 }
953#endif
954 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
955 device, blknr, blkcnt, (ulong) buffer);
956
e9be1ee7
SG		 957 /* Select device
958 */
959 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
960 c = ide_wait(device, IDE_TIME_OUT);
961
962 if (c & ATA_STAT_BUSY) {
963 printf("IDE read: device %d not ready\n", device);
964 goto IDE_READ_E;
965 }
966
967 /* first check if the drive is in Powersaving mode, if yes,
968 * increase the timeout value */
969 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
970 udelay(50);
971
972 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
973
974 if (c & ATA_STAT_BUSY) {
975 printf("IDE read: device %d not ready\n", device);
976 goto IDE_READ_E;
977 }
978 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
979 printf("No Powersaving mode %X\n", c);
980 } else {
981 c = ide_inb(device, ATA_SECT_CNT);
982 debug("Powersaving %02X\n", c);
983 if (c == 0)
984 pwrsave = 1;
985 }
986
987
988 while (blkcnt-- > 0) {
989 c = ide_wait(device, IDE_TIME_OUT);
990
991 if (c & ATA_STAT_BUSY) {
992 printf("IDE read: device %d not ready\n", device);
993 break;
994 }
995#ifdef CONFIG_LBA48
996 if (lba48) {
997 /* write high bits */
998 ide_outb(device, ATA_SECT_CNT, 0);
999 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1000#ifdef CONFIG_SYS_64BIT_LBA
1001 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1002 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1003#else
1004 ide_outb(device, ATA_LBA_MID, 0);
1005 ide_outb(device, ATA_LBA_HIGH, 0);
1006#endif
1007 }
1008#endif
1009 ide_outb(device, ATA_SECT_CNT, 1);
1010 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1011 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1012 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1013
1014#ifdef CONFIG_LBA48
1015 if (lba48) {
1016 ide_outb(device, ATA_DEV_HD,
1017 ATA_LBA | ATA_DEVICE(device));
1018 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1019
1020 } else
1021#endif
1022 {
1023 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1024 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1025 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1026 }
1027
1028 udelay(50);
1029
1030 if (pwrsave) {
1031 /* may take up to 4 sec */
1032 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1033 pwrsave = 0;
1034 } else {
1035 /* can't take over 500 ms */
1036 c = ide_wait(device, IDE_TIME_OUT);
1037 }
1038
1039 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1040 ATA_STAT_DRQ) {
1041 printf("Error (no IRQ) dev %d blk " LBAF
1042 ": status %#02x\n", device, blknr, c);
1043 break;
1044 }
1045
1046 ide_input_data(device, buffer, ATA_SECTORWORDS);
1047 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1048
1049 ++n;
1050 ++blknr;
1051 buffer += ATA_BLOCKSIZE;
1052 }
1053IDE_READ_E:
e9be1ee7
SG		 1054 return n;
1055}
1056
145df842
SG		 1057#ifdef CONFIG_BLK
1058ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1059 const void *buffer)
1060#else
e9be1ee7
SG		 1061ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1062 const void *buffer)
145df842 1063#endif
e9be1ee7 1064{
145df842
SG		 1065#ifdef CONFIG_BLK
1066 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1067#endif
e9be1ee7
SG		 1068 int device = block_dev->devnum;
1069 ulong n = 0;
1070 unsigned char c;
1071
1072#ifdef CONFIG_LBA48
1073 unsigned char lba48 = 0;
1074
1075 if (blknr & 0x0000fffff0000000ULL) {
1076 /* more than 28 bits used, use 48bit mode */
1077 lba48 = 1;
1078 }
1079#endif
1080
e9be1ee7
SG		 1081 /* Select device
1082 */
1083 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1084
1085 while (blkcnt-- > 0) {
1086 c = ide_wait(device, IDE_TIME_OUT);
1087
1088 if (c & ATA_STAT_BUSY) {
1089 printf("IDE read: device %d not ready\n", device);
1090 goto WR_OUT;
1091 }
1092#ifdef CONFIG_LBA48
1093 if (lba48) {
1094 /* write high bits */
1095 ide_outb(device, ATA_SECT_CNT, 0);
1096 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1097#ifdef CONFIG_SYS_64BIT_LBA
1098 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1099 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1100#else
1101 ide_outb(device, ATA_LBA_MID, 0);
1102 ide_outb(device, ATA_LBA_HIGH, 0);
1103#endif
1104 }
1105#endif
1106 ide_outb(device, ATA_SECT_CNT, 1);
1107 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1108 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1109 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1110
1111#ifdef CONFIG_LBA48
1112 if (lba48) {
1113 ide_outb(device, ATA_DEV_HD,
1114 ATA_LBA | ATA_DEVICE(device));
1115 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1116
1117 } else
1118#endif
1119 {
1120 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1121 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1122 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1123 }
1124
1125 udelay(50);
1126
1127 /* can't take over 500 ms */
1128 c = ide_wait(device, IDE_TIME_OUT);
1129
1130 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1131 ATA_STAT_DRQ) {
1132 printf("Error (no IRQ) dev %d blk " LBAF
1133 ": status %#02x\n", device, blknr, c);
1134 goto WR_OUT;
1135 }
1136
1137 ide_output_data(device, buffer, ATA_SECTORWORDS);
1138 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1139 ++n;
1140 ++blknr;
1141 buffer += ATA_BLOCKSIZE;
1142 }
1143WR_OUT:
e9be1ee7
SG		 1144 return n;
1145}
1146
1147#if defined(CONFIG_OF_IDE_FIXUP)
1148int ide_device_present(int dev)
1149{
1150 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1151 return 0;
1152 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1153}
1154#endif
1155
145df842 1156#ifdef CONFIG_BLK
68e6f221
BM		 1157static int ide_blk_probe(struct udevice *udev)
1158{
1159 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1160
1161 /* fill in device vendor/product/rev strings */
1162 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1163 BLK_VEN_SIZE);
1164 desc->vendor[BLK_VEN_SIZE] = '\0';
1165 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1166 BLK_PRD_SIZE);
1167 desc->product[BLK_PRD_SIZE] = '\0';
1168 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1169 BLK_REV_SIZE);
1170 desc->revision[BLK_REV_SIZE] = '\0';
1171
68e6f221
BM		 1172 return 0;
1173}
1174
145df842
SG		 1175static const struct blk_ops ide_blk_ops = {
1176 .read = ide_read,
1177 .write = ide_write,
1178};
1179
1180U_BOOT_DRIVER(ide_blk) = {
1181 .name = "ide_blk",
1182 .id = UCLASS_BLK,
1183 .ops = &ide_blk_ops,
68e6f221
BM		 1184 .probe = ide_blk_probe,
1185};
1186
1187static int ide_probe(struct udevice *udev)
1188{
1189 struct udevice *blk_dev;
1190 char name[20];
1191 int blksz;
1192 lbaint_t size;
1193 int i;
1194 int ret;
1195
1196 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1197 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1198 sprintf(name, "blk#%d", i);
1199
1200 blksz = ide_dev_desc[i].blksz;
1201 size = blksz * ide_dev_desc[i].lba;
1f4adab8
BM		 1202
1203 /*
1204 * With CDROM, if there is no CD inserted, blksz will
1205 * be zero, don't bother to create IDE block device.
1206 */
1207 if (!blksz)
1208 continue;
68e6f221
BM		 1209 ret = blk_create_devicef(udev, "ide_blk", name,
1210 IF_TYPE_IDE, i,
1211 blksz, size, &blk_dev);
1212 if (ret)
1213 return ret;
1214 }
1215 }
1216
1217 return 0;
1218}
1219
1220U_BOOT_DRIVER(ide) = {
1221 .name = "ide",
1222 .id = UCLASS_IDE,
1223 .probe = ide_probe,
1224};
1225
1226struct pci_device_id ide_supported[] = {
1227 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1228 { }
1229};
1230
1231U_BOOT_PCI_DEVICE(ide, ide_supported);
1232
1233UCLASS_DRIVER(ide) = {
1234 .name = "ide",
1235 .id = UCLASS_IDE,
145df842
SG		 1236};
1237#else
e9be1ee7
SG		 1238U_BOOT_LEGACY_BLK(ide) = {
1239 .if_typename = "ide",
1240 .if_type = IF_TYPE_IDE,
1241 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1242 .desc = ide_dev_desc,
1243};
145df842 1244#endif
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