[J-u-boot.git] / include / palmas.h

/*
 * (C) Copyright 2012-2013
 * Texas Instruments, <www.ti.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef PALMAS_H
#define PALMAS_H

#include <common.h>
#include <i2c.h>

/* I2C chip addresses, TW6035/37 */
#define TWL603X_CHIP_P1		0x48	/* Page 1 */
#define TWL603X_CHIP_P2		0x49	/* Page 2 */
#define TWL603X_CHIP_P3		0x4a	/* Page 3 */

/* TPS659038/39 */
#define TPS65903X_CHIP_P1	0x58	/* Page 1 */

/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */

/* LDO1 control/voltage */
#define LDO1_CTRL		0x50
#define LDO1_VOLTAGE		0x51

/* LDO9 control/voltage */
#define LDO9_CTRL		0x60
#define LDO9_VOLTAGE		0x61

/* LDOUSB control/voltage */
#define LDOUSB_CTRL		0x64
#define LDOUSB_VOLTAGE		0x65
#define LDO_CTRL		0x6a

/* Control of 32 kHz audio clock */
#define CLK32KGAUDIO_CTRL	0xd5

/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
#define SYSEN2_CTRL		0xd9

/*
 * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
 * and some other xxx_CTRL resources:
 */
#define LDO9_BYP_EN		(1 << 6)	/* LDO9 only! */
#define RSC_STAT_ON		(1 << 4)	/* RO status bit! */
#define RSC_MODE_SLEEP		(1 << 2)
#define RSC_MODE_ACTIVE		(1 << 0)

/* Some LDO voltage values */
#define LDO_VOLT_OFF		0
#define LDO_VOLT_1V8		0x13
#define LDO_VOLT_3V0		0x2b
#define LDO_VOLT_3V3		0x31
/* Request bypass, LDO9 only */
#define LDO9_BYPASS		0x3f

/* SMPS7_CTRL */
#define SMPS7_CTRL		0x30

/* SMPS9_CTRL */
#define SMPS9_CTRL		0x38
#define SMPS9_VOLTAGE		0x3b

/* SMPS10_CTRL */
#define SMPS10_CTRL		0x3c
#define SMPS10_MODE_ACTIVE_D	0x0d

/* Bit field definitions for SMPSx_CTRL */
#define SMPS_MODE_ACT_AUTO	1
#define SMPS_MODE_ACT_ECO	2
#define SMPS_MODE_ACT_FPWM	3
#define SMPS_MODE_SLP_AUTO	(1 << 2)
#define SMPS_MODE_SLP_ECO	(2 << 2)
#define SMPS_MODE_SLP_FPWM	(3 << 2)

/*
 * Some popular SMPS voltages, all with RANGE=1; note
 * that RANGE cannot be changed on the fly
 */
#define SMPS_VOLT_OFF		0
#define SMPS_VOLT_1V2		0x90
#define SMPS_VOLT_1V8		0xae
#define SMPS_VOLT_2V1		0xbd
#define SMPS_VOLT_3V0		0xea
#define SMPS_VOLT_3V3		0xf9

/* Backup Battery & VRTC Control */
#define BB_VRTC_CTRL		0xa8
/* Bit definitions for BB_VRTC_CTRL */
#define VRTC_EN_SLP		(1 << 6)
#define VRTC_EN_OFF		(1 << 5)
#define VRTC_PWEN		(1 << 4)
#define BB_LOW_ICHRG		(1 << 3)
#define BB_HIGH_ICHRG		(0 << 3)
#define BB_VSEL_3V0		(0 << 1)
#define BB_VSEL_2V5		(1 << 1)
#define BB_VSEL_3V15		(2 << 1)
#define BB_VSEL_VBAT		(3 << 1)
#define BB_CHRG_EN		(1 << 0)

/*
 * Functions to read and write from TPS659038/TWL6035/TWL6037
 * or other Palmas family of TI PMICs
 */
static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
{
	return i2c_write(chip_no, reg, 1, &val, 1);
}

static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
{
	return i2c_read(chip_no, reg, 1, val, 1);
}

void palmas_init_settings(void);
int palmas_mmc1_poweron_ldo(void);
int twl603x_mmc1_set_ldo9(u8 vsel);
int twl603x_audio_power(u8 on);
int twl603x_enable_bb_charge(u8 bb_fields);
int palmas_enable_ss_ldo(void);

#endif /* PALMAS_H */
Commit	Line	Data
21144298	1	/*
cb199102	2	* (C) Copyright 2012-2013
21144298 S	3	* Texas Instruments, <www.ti.com>
21144298 S	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
21144298	6	*/
da2cc454 NM	7	#ifndef PALMAS_H
da2cc454 NM	8	#define PALMAS_H
21144298 S	9
	10	#include <common.h>
	11	#include <i2c.h>
	12
e9090fa4 LP	13	/* I2C chip addresses, TW6035/37 */
	14	#define TWL603X_CHIP_P1 0x48 /* Page 1 */
	15	#define TWL603X_CHIP_P2 0x49 /* Page 2 */
	16	#define TWL603X_CHIP_P3 0x4a /* Page 3 */
21144298	17
e9090fa4 LP	18	/* TPS659038/39 */
	19	#define TPS65903X_CHIP_P1 0x58 /* Page 1 */
	20
	21	/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
	22
	23	/* LDO1 control/voltage */
	24	#define LDO1_CTRL 0x50
	25	#define LDO1_VOLTAGE 0x51
	26
	27	/* LDO9 control/voltage */
21144298 S	28	#define LDO9_CTRL 0x60
	29	#define LDO9_VOLTAGE 0x61
	30
e9090fa4 LP	31	/* LDOUSB control/voltage */
	32	#define LDOUSB_CTRL 0x64
	33	#define LDOUSB_VOLTAGE 0x65
1bd435bc	34	#define LDO_CTRL 0x6a
e9090fa4 LP	35
	36	/* Control of 32 kHz audio clock */
	37	#define CLK32KGAUDIO_CTRL 0xd5
	38
	39	/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
	40	#define SYSEN2_CTRL 0xd9
	41
	42	/*
	43	* Bit field definitions for LDOx_CTRL, SYSENx_CTRL
	44	* and some other xxx_CTRL resources:
	45	*/
	46	#define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
	47	#define RSC_STAT_ON (1 << 4) /* RO status bit! */
	48	#define RSC_MODE_SLEEP (1 << 2)
	49	#define RSC_MODE_ACTIVE (1 << 0)
	50
	51	/* Some LDO voltage values */
	52	#define LDO_VOLT_OFF 0
	53	#define LDO_VOLT_1V8 0x13
	54	#define LDO_VOLT_3V0 0x2b
	55	#define LDO_VOLT_3V3 0x31
	56	/* Request bypass, LDO9 only */
	57	#define LDO9_BYPASS 0x3f
	58
	59	/* SMPS7_CTRL */
	60	#define SMPS7_CTRL 0x30
	61
	62	/* SMPS9_CTRL */
	63	#define SMPS9_CTRL 0x38
	64	#define SMPS9_VOLTAGE 0x3b
	65
1bd435bc DM	66	/* SMPS10_CTRL */
	67	#define SMPS10_CTRL 0x3c
	68	#define SMPS10_MODE_ACTIVE_D 0x0d
	69
e9090fa4 LP	70	/* Bit field definitions for SMPSx_CTRL */
	71	#define SMPS_MODE_ACT_AUTO 1
	72	#define SMPS_MODE_ACT_ECO 2
	73	#define SMPS_MODE_ACT_FPWM 3
	74	#define SMPS_MODE_SLP_AUTO (1 << 2)
	75	#define SMPS_MODE_SLP_ECO (2 << 2)
	76	#define SMPS_MODE_SLP_FPWM (3 << 2)
	77
	78	/*
	79	* Some popular SMPS voltages, all with RANGE=1; note
	80	* that RANGE cannot be changed on the fly
	81	*/
	82	#define SMPS_VOLT_OFF 0
	83	#define SMPS_VOLT_1V2 0x90
	84	#define SMPS_VOLT_1V8 0xae
	85	#define SMPS_VOLT_2V1 0xbd
	86	#define SMPS_VOLT_3V0 0xea
	87	#define SMPS_VOLT_3V3 0xf9
	88
	89	/* Backup Battery & VRTC Control */
	90	#define BB_VRTC_CTRL 0xa8
	91	/* Bit definitions for BB_VRTC_CTRL */
	92	#define VRTC_EN_SLP (1 << 6)
	93	#define VRTC_EN_OFF (1 << 5)
	94	#define VRTC_PWEN (1 << 4)
	95	#define BB_LOW_ICHRG (1 << 3)
	96	#define BB_HIGH_ICHRG (0 << 3)
	97	#define BB_VSEL_3V0 (0 << 1)
	98	#define BB_VSEL_2V5 (1 << 1)
	99	#define BB_VSEL_3V15 (2 << 1)
	100	#define BB_VSEL_VBAT (3 << 1)
	101	#define BB_CHRG_EN (1 << 0)
21144298	102
ff2d57ea NM	103	/*
	104	* Functions to read and write from TPS659038/TWL6035/TWL6037
	105	* or other Palmas family of TI PMICs
	106	*/
	107	static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
	108	{
	109	return i2c_write(chip_no, reg, 1, &val, 1);
	110	}
	111
	112	static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
	113	{
	114	return i2c_read(chip_no, reg, 1, val, 1);
	115	}
	116
12733881	117	void palmas_init_settings(void);
384bcae0	118	int palmas_mmc1_poweron_ldo(void);
e9090fa4 LP	119	int twl603x_mmc1_set_ldo9(u8 vsel);
	120	int twl603x_audio_power(u8 on);
	121	int twl603x_enable_bb_charge(u8 bb_fields);
1bd435bc	122	int palmas_enable_ss_ldo(void);
da2cc454 NM	123
da2cc454 NM	124	#endif /* PALMAS_H */