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fe8c2806 | 1 | /* |
4707fb50 | 2 | * (C) Copyright 2000-2006 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
7def6b34 | 38 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
39 | #include <ide.h> |
40 | #endif | |
7def6b34 | 41 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
42 | #include <scsi.h> |
43 | #endif | |
7def6b34 | 44 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
45 | #include <kgdb.h> |
46 | #endif | |
47 | #ifdef CONFIG_STATUS_LED | |
48 | #include <status_led.h> | |
49 | #endif | |
50 | #include <net.h> | |
281e00a3 | 51 | #include <serial.h> |
fe8c2806 | 52 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 53 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
54 | #include <commproc.h> |
55 | #endif | |
7aa78614 | 56 | #endif |
fe8c2806 WD |
57 | #include <version.h> |
58 | #if defined(CONFIG_BAB7xx) | |
59 | #include <w83c553f.h> | |
60 | #endif | |
61 | #include <dtt.h> | |
62 | #if defined(CONFIG_POST) | |
63 | #include <post.h> | |
64 | #endif | |
56f94be3 WD |
65 | #if defined(CONFIG_LOGBUFFER) |
66 | #include <logbuff.h> | |
67 | #endif | |
42d1f039 WD |
68 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
69 | #include <asm/cache.h> | |
70 | #endif | |
1c43771b WD |
71 | #ifdef CONFIG_PS2KBD |
72 | #include <keyboard.h> | |
73 | #endif | |
fe8c2806 | 74 | |
fa230445 HS |
75 | #ifdef CFG_UPDATE_FLASH_SIZE |
76 | extern int update_flash_size (int flash_size); | |
77 | #endif | |
78 | ||
9045f33c | 79 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
80 | extern void sc3_read_eeprom(void); |
81 | #endif | |
82 | ||
7def6b34 | 83 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
84 | void doc_init (void); |
85 | #endif | |
86 | #if defined(CONFIG_HARD_I2C) || \ | |
87 | defined(CONFIG_SOFT_I2C) | |
88 | #include <i2c.h> | |
89 | #endif | |
04a9e118 BW |
90 | #if defined(CONFIG_HARD_SPI) |
91 | #include <spi.h> | |
92 | #endif | |
7def6b34 | 93 | #if defined(CONFIG_CMD_NAND) |
bedc4970 SR |
94 | void nand_init (void); |
95 | #endif | |
fe8c2806 WD |
96 | |
97 | static char *failed = "*** failed ***\n"; | |
98 | ||
17d704eb | 99 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 100 | extern flash_info_t flash_info[]; |
17d704eb | 101 | #endif |
fe8c2806 | 102 | |
ca43ba18 HS |
103 | #if defined(CONFIG_START_IDE) |
104 | extern int board_start_ide(void); | |
105 | #endif | |
fe8c2806 | 106 | #include <environment.h> |
d87080b7 | 107 | |
bce84c4d | 108 | DECLARE_GLOBAL_DATA_PTR; |
fe8c2806 | 109 | |
7e780369 WD |
110 | #if defined(CFG_ENV_IS_EMBEDDED) |
111 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
112 | #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \ | |
04a85b3b | 113 | (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ |
7e780369 | 114 | defined(CFG_ENV_IS_IN_NVRAM) |
fe8c2806 WD |
115 | #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE) |
116 | #else | |
117 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
118 | #endif | |
119 | ||
3b57fe0a WD |
120 | extern ulong __init_end; |
121 | extern ulong _end; | |
3b57fe0a WD |
122 | ulong monitor_flash_len; |
123 | ||
7def6b34 | 124 | #if defined(CONFIG_CMD_BEDBUG) |
8bde7f77 WD |
125 | #include <bedbug/type.h> |
126 | #endif | |
127 | ||
fe8c2806 WD |
128 | /* |
129 | * Begin and End of memory area for malloc(), and current "brk" | |
130 | */ | |
131 | static ulong mem_malloc_start = 0; | |
132 | static ulong mem_malloc_end = 0; | |
133 | static ulong mem_malloc_brk = 0; | |
134 | ||
135 | /************************************************************************ | |
136 | * Utilities * | |
137 | ************************************************************************ | |
138 | */ | |
139 | ||
140 | /* | |
141 | * The Malloc area is immediately below the monitor copy in DRAM | |
142 | */ | |
143 | static void mem_malloc_init (void) | |
144 | { | |
e9514751 SR |
145 | #if !defined(CONFIG_RELOC_FIXUP_WORKS) |
146 | mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off; | |
147 | #endif | |
148 | mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN; | |
fe8c2806 WD |
149 | mem_malloc_brk = mem_malloc_start; |
150 | ||
151 | memset ((void *) mem_malloc_start, | |
152 | 0, | |
153 | mem_malloc_end - mem_malloc_start); | |
154 | } | |
155 | ||
156 | void *sbrk (ptrdiff_t increment) | |
157 | { | |
158 | ulong old = mem_malloc_brk; | |
159 | ulong new = old + increment; | |
160 | ||
161 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
162 | return (NULL); | |
163 | } | |
164 | mem_malloc_brk = new; | |
165 | return ((void *) old); | |
166 | } | |
167 | ||
168 | char *strmhz (char *buf, long hz) | |
169 | { | |
170 | long l, n; | |
171 | long m; | |
172 | ||
173 | n = hz / 1000000L; | |
174 | l = sprintf (buf, "%ld", n); | |
175 | m = (hz % 1000000L) / 1000L; | |
176 | if (m != 0) | |
177 | sprintf (buf + l, ".%03ld", m); | |
178 | return (buf); | |
179 | } | |
180 | ||
fe8c2806 WD |
181 | /* |
182 | * All attempts to come up with a "common" initialization sequence | |
183 | * that works for all boards and architectures failed: some of the | |
184 | * requirements are just _too_ different. To get rid of the resulting | |
185 | * mess of board dependend #ifdef'ed code we now make the whole | |
186 | * initialization sequence configurable to the user. | |
187 | * | |
188 | * The requirements for any new initalization function is simple: it | |
189 | * receives a pointer to the "global data" structure as it's only | |
190 | * argument, and returns an integer return code, where 0 means | |
191 | * "continue" and != 0 means "fatal error, hang the system". | |
192 | */ | |
193 | typedef int (init_fnc_t) (void); | |
194 | ||
195 | /************************************************************************ | |
196 | * Init Utilities * | |
197 | ************************************************************************ | |
198 | * Some of this code should be moved into the core functions, | |
199 | * but let's get it working (again) first... | |
200 | */ | |
201 | ||
202 | static int init_baudrate (void) | |
203 | { | |
77ddac94 | 204 | char tmp[64]; /* long enough for environment variables */ |
fe8c2806 WD |
205 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); |
206 | ||
207 | gd->baudrate = (i > 0) | |
208 | ? (int) simple_strtoul (tmp, NULL, 10) | |
209 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
210 | return (0); |
211 | } | |
212 | ||
213 | /***********************************************************************/ | |
214 | ||
79f240f7 KP |
215 | void __board_add_ram_info(int use_default) |
216 | { | |
217 | /* please define platform specific board_add_ram_info() */ | |
218 | } | |
219 | void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); | |
220 | ||
d96f41e0 | 221 | |
fe8c2806 WD |
222 | static int init_func_ram (void) |
223 | { | |
fe8c2806 WD |
224 | #ifdef CONFIG_BOARD_TYPES |
225 | int board_type = gd->board_type; | |
226 | #else | |
227 | int board_type = 0; /* use dummy arg */ | |
228 | #endif | |
229 | puts ("DRAM: "); | |
230 | ||
231 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
d96f41e0 | 232 | print_size (gd->ram_size, ""); |
d96f41e0 | 233 | board_add_ram_info(0); |
d96f41e0 | 234 | putc('\n'); |
fe8c2806 WD |
235 | return (0); |
236 | } | |
237 | puts (failed); | |
238 | return (1); | |
239 | } | |
240 | ||
241 | /***********************************************************************/ | |
242 | ||
243 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
244 | static int init_func_i2c (void) | |
245 | { | |
246 | puts ("I2C: "); | |
247 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); | |
248 | puts ("ready\n"); | |
249 | return (0); | |
250 | } | |
251 | #endif | |
252 | ||
04a9e118 BW |
253 | #if defined(CONFIG_HARD_SPI) |
254 | static int init_func_spi (void) | |
255 | { | |
256 | puts ("SPI: "); | |
257 | spi_init (); | |
258 | puts ("ready\n"); | |
259 | return (0); | |
260 | } | |
261 | #endif | |
262 | ||
fe8c2806 WD |
263 | /***********************************************************************/ |
264 | ||
265 | #if defined(CONFIG_WATCHDOG) | |
266 | static int init_func_watchdog_init (void) | |
267 | { | |
268 | puts (" Watchdog enabled\n"); | |
269 | WATCHDOG_RESET (); | |
270 | return (0); | |
271 | } | |
272 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
273 | ||
274 | static int init_func_watchdog_reset (void) | |
275 | { | |
276 | WATCHDOG_RESET (); | |
277 | return (0); | |
278 | } | |
279 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
280 | #else | |
281 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
282 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
283 | #endif /* CONFIG_WATCHDOG */ | |
284 | ||
285 | /************************************************************************ | |
286 | * Initialization sequence * | |
287 | ************************************************************************ | |
288 | */ | |
289 | ||
290 | init_fnc_t *init_sequence[] = { | |
291 | ||
c837dcb1 WD |
292 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
293 | board_early_init_f, | |
fe8c2806 | 294 | #endif |
c178d3da | 295 | |
66ca92a5 | 296 | #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
fe8c2806 | 297 | get_clocks, /* get CPU and bus clocks (etc.) */ |
090eb735 MK |
298 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ |
299 | && !defined(CONFIG_TQM885D) | |
e9132ea9 WD |
300 | adjust_sdram_tbs_8xx, |
301 | #endif | |
fe8c2806 | 302 | init_timebase, |
c178d3da | 303 | #endif |
fe8c2806 | 304 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 305 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
306 | dpram_init, |
307 | #endif | |
7aa78614 | 308 | #endif |
fe8c2806 WD |
309 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
310 | board_postclk_init, | |
311 | #endif | |
312 | env_init, | |
66ca92a5 | 313 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
c178d3da WD |
314 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ |
315 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
316 | init_timebase, | |
317 | #endif | |
fe8c2806 WD |
318 | init_baudrate, |
319 | serial_init, | |
320 | console_init_f, | |
321 | display_options, | |
322 | #if defined(CONFIG_8260) | |
323 | prt_8260_rsr, | |
324 | prt_8260_clks, | |
325 | #endif /* CONFIG_8260 */ | |
9be39a67 DL |
326 | #if defined(CONFIG_MPC83XX) |
327 | prt_83xx_rsr, | |
328 | #endif | |
fe8c2806 | 329 | checkcpu, |
cbd8a35c | 330 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 331 | prt_mpc5xxx_clks, |
cbd8a35c | 332 | #endif /* CONFIG_MPC5xxx */ |
983fda83 WD |
333 | #if defined(CONFIG_MPC8220) |
334 | prt_mpc8220_clks, | |
335 | #endif | |
fe8c2806 WD |
336 | checkboard, |
337 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 338 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
339 | misc_init_f, |
340 | #endif | |
341 | INIT_FUNC_WATCHDOG_RESET | |
342 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
343 | init_func_i2c, | |
344 | #endif | |
04a9e118 BW |
345 | #if defined(CONFIG_HARD_SPI) |
346 | init_func_spi, | |
347 | #endif | |
fe8c2806 WD |
348 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ |
349 | dtt_init, | |
4532cb69 WD |
350 | #endif |
351 | #ifdef CONFIG_POST | |
352 | post_init_f, | |
fe8c2806 WD |
353 | #endif |
354 | INIT_FUNC_WATCHDOG_RESET | |
355 | init_func_ram, | |
356 | #if defined(CFG_DRAM_TEST) | |
357 | testdram, | |
358 | #endif /* CFG_DRAM_TEST */ | |
359 | INIT_FUNC_WATCHDOG_RESET | |
360 | ||
361 | NULL, /* Terminate this list */ | |
362 | }; | |
363 | ||
81d93e5c KG |
364 | #ifndef CONFIG_MAX_MEM_MAPPED |
365 | #define CONFIG_MAX_MEM_MAPPED (256 << 20) | |
366 | #endif | |
367 | ulong get_effective_memsize(void) | |
368 | { | |
369 | #ifndef CONFIG_VERY_BIG_RAM | |
370 | return gd->ram_size; | |
371 | #else | |
372 | /* limit stack to what we can reasonable map */ | |
373 | return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? | |
374 | CONFIG_MAX_MEM_MAPPED : gd->ram_size); | |
375 | #endif | |
376 | } | |
377 | ||
fe8c2806 WD |
378 | /************************************************************************ |
379 | * | |
380 | * This is the first part of the initialization sequence that is | |
381 | * implemented in C, but still running from ROM. | |
382 | * | |
383 | * The main purpose is to provide a (serial) console interface as | |
384 | * soon as possible (so we can see any error messages), and to | |
385 | * initialize the RAM so that we can relocate the monitor code to | |
386 | * RAM. | |
387 | * | |
388 | * Be aware of the restrictions: global data is read-only, BSS is not | |
389 | * initialized, and stack space is limited to a few kB. | |
390 | * | |
391 | ************************************************************************ | |
392 | */ | |
393 | ||
394 | void board_init_f (ulong bootflag) | |
395 | { | |
fe8c2806 WD |
396 | bd_t *bd; |
397 | ulong len, addr, addr_sp; | |
7bc5ee07 | 398 | ulong *s; |
fe8c2806 WD |
399 | gd_t *id; |
400 | init_fnc_t **init_fnc_ptr; | |
401 | #ifdef CONFIG_PRAM | |
402 | int i; | |
403 | ulong reg; | |
404 | uchar tmp[64]; /* long enough for environment variables */ | |
405 | #endif | |
406 | ||
407 | /* Pointer is writable since we allocated a register for it */ | |
408 | gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
93f6a677 WD |
409 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
410 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 411 | |
9be39a67 | 412 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) |
fe8c2806 WD |
413 | /* Clear initial global data */ |
414 | memset ((void *) gd, 0, sizeof (gd_t)); | |
415 | #endif | |
416 | ||
417 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
418 | if ((*init_fnc_ptr) () != 0) { | |
419 | hang (); | |
420 | } | |
421 | } | |
422 | ||
423 | /* | |
424 | * Now that we have DRAM mapped and working, we can | |
425 | * relocate the code and continue running from DRAM. | |
426 | * | |
427 | * Reserve memory at end of RAM for (top down in that order): | |
8bde7f77 | 428 | * - kernel log buffer |
fe8c2806 WD |
429 | * - protected RAM |
430 | * - LCD framebuffer | |
431 | * - monitor code | |
432 | * - board info struct | |
433 | */ | |
3b57fe0a | 434 | len = (ulong)&_end - CFG_MONITOR_BASE; |
fe8c2806 | 435 | |
81d93e5c | 436 | addr = CFG_SDRAM_BASE + get_effective_memsize(); |
fe8c2806 | 437 | |
228f29ac | 438 | #ifdef CONFIG_LOGBUFFER |
3d610186 | 439 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
440 | /* reserve kernel log buffer */ |
441 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 442 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac | 443 | #endif |
3d610186 | 444 | #endif |
228f29ac | 445 | |
fe8c2806 WD |
446 | #ifdef CONFIG_PRAM |
447 | /* | |
448 | * reserve protected RAM | |
449 | */ | |
77ddac94 WD |
450 | i = getenv_r ("pram", (char *)tmp, sizeof (tmp)); |
451 | reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM; | |
fe8c2806 | 452 | addr -= (reg << 10); /* size is in kB */ |
9d2b18a0 | 453 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
454 | #endif /* CONFIG_PRAM */ |
455 | ||
456 | /* round down to next 4 kB limit */ | |
457 | addr &= ~(4096 - 1); | |
9d2b18a0 | 458 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
459 | |
460 | #ifdef CONFIG_LCD | |
461 | /* reserve memory for LCD display (always full pages) */ | |
462 | addr = lcd_setmem (addr); | |
463 | gd->fb_base = addr; | |
464 | #endif /* CONFIG_LCD */ | |
465 | ||
466 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
467 | /* reserve memory for video display (always full pages) */ | |
468 | addr = video_setmem (addr); | |
469 | gd->fb_base = addr; | |
470 | #endif /* CONFIG_VIDEO */ | |
471 | ||
472 | /* | |
473 | * reserve memory for U-Boot code, data & bss | |
682011ff | 474 | * round down to next 4 kB limit |
fe8c2806 WD |
475 | */ |
476 | addr -= len; | |
682011ff | 477 | addr &= ~(4096 - 1); |
7d314992 WD |
478 | #ifdef CONFIG_E500 |
479 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
480 | addr &= ~(65536 - 1); | |
481 | #endif | |
fe8c2806 | 482 | |
9d2b18a0 | 483 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 484 | |
c7de829c WD |
485 | #ifdef CONFIG_AMIGAONEG3SE |
486 | gd->relocaddr = addr; | |
487 | #endif | |
488 | ||
fe8c2806 WD |
489 | /* |
490 | * reserve memory for malloc() arena | |
491 | */ | |
492 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 493 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 494 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
495 | |
496 | /* | |
497 | * (permanently) allocate a Board Info struct | |
498 | * and a permanent copy of the "global" data | |
499 | */ | |
500 | addr_sp -= sizeof (bd_t); | |
501 | bd = (bd_t *) addr_sp; | |
502 | gd->bd = bd; | |
9d2b18a0 | 503 | debug ("Reserving %d Bytes for Board Info at: %08lx\n", |
fe8c2806 | 504 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
505 | addr_sp -= sizeof (gd_t); |
506 | id = (gd_t *) addr_sp; | |
9d2b18a0 | 507 | debug ("Reserving %d Bytes for Global Data at: %08lx\n", |
fe8c2806 | 508 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
509 | |
510 | /* | |
511 | * Finally, we set up a new (bigger) stack. | |
512 | * | |
513 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
514 | * Clear initial stack frame | |
515 | */ | |
516 | addr_sp -= 16; | |
517 | addr_sp &= ~0xF; | |
7bc5ee07 WD |
518 | s = (ulong *)addr_sp; |
519 | *s-- = 0; | |
520 | *s-- = 0; | |
521 | addr_sp = (ulong)s; | |
9d2b18a0 | 522 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
523 | |
524 | /* | |
525 | * Save local variables to board info struct | |
526 | */ | |
527 | ||
c837dcb1 | 528 | bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
529 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
530 | ||
531 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
532 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
533 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
983fda83 WD |
534 | #elif defined CONFIG_MPC8220 |
535 | bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */ | |
536 | bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 537 | #else |
c837dcb1 WD |
538 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
539 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
540 | #endif |
541 | ||
42d1f039 | 542 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
debb7354 | 543 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
fe8c2806 WD |
544 | bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */ |
545 | #endif | |
cbd8a35c | 546 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
547 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ |
548 | #endif | |
f046ccd1 | 549 | #if defined(CONFIG_MPC83XX) |
d239d74b | 550 | bd->bi_immrbar = CFG_IMMR; |
f046ccd1 | 551 | #endif |
983fda83 WD |
552 | #if defined(CONFIG_MPC8220) |
553 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ | |
554 | bd->bi_inpfreq = gd->inp_clk; | |
555 | bd->bi_pcifreq = gd->pci_clk; | |
556 | bd->bi_vcofreq = gd->vco_clk; | |
557 | bd->bi_pevfreq = gd->pev_clk; | |
558 | bd->bi_flbfreq = gd->flb_clk; | |
559 | ||
dd520bf3 WD |
560 | /* store bootparam to sram (backward compatible), here? */ |
561 | { | |
562 | u32 *sram = (u32 *)CFG_SRAM_BASE; | |
563 | *sram++ = gd->ram_size; | |
564 | *sram++ = gd->bus_clk; | |
565 | *sram++ = gd->inp_clk; | |
566 | *sram++ = gd->cpu_clk; | |
567 | *sram++ = gd->vco_clk; | |
568 | *sram++ = gd->flb_clk; | |
569 | *sram++ = 0xb8c3ba11; /* boot signature */ | |
570 | } | |
983fda83 | 571 | #endif |
fe8c2806 WD |
572 | |
573 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
574 | ||
575 | WATCHDOG_RESET (); | |
576 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
577 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
9c4c5ae3 | 578 | #if defined(CONFIG_CPM2) |
fe8c2806 WD |
579 | bd->bi_cpmfreq = gd->cpm_clk; |
580 | bd->bi_brgfreq = gd->brg_clk; | |
581 | bd->bi_sccfreq = gd->scc_clk; | |
582 | bd->bi_vco = gd->vco_out; | |
9c4c5ae3 | 583 | #endif /* CONFIG_CPM2 */ |
281ff9a4 | 584 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 585 | bd->bi_ipsfreq = gd->ips_clk; |
281ff9a4 | 586 | #endif /* CONFIG_MPC512X */ |
cbd8a35c | 587 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
588 | bd->bi_ipbfreq = gd->ipb_clk; |
589 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 590 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
591 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
592 | ||
593 | #ifdef CFG_EXTBDINFO | |
77ddac94 WD |
594 | strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); |
595 | strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
fe8c2806 WD |
596 | |
597 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
598 | bd->bi_plb_busfreq = gd->bus_clk; | |
343c48bd SR |
599 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ |
600 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ | |
601 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) | |
fe8c2806 | 602 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 603 | bd->bi_opbfreq = get_OPB_freq (); |
028ab6b5 WD |
604 | #elif defined(CONFIG_XILINX_ML300) |
605 | bd->bi_pci_busfreq = get_PCI_freq (); | |
fe8c2806 WD |
606 | #endif |
607 | #endif | |
608 | ||
9d2b18a0 | 609 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
610 | |
611 | WATCHDOG_RESET (); | |
612 | ||
613 | #ifdef CONFIG_POST | |
614 | post_bootmode_init(); | |
6dff5529 | 615 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
616 | #endif |
617 | ||
618 | WATCHDOG_RESET(); | |
619 | ||
27b207fd | 620 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
621 | |
622 | relocate_code (addr_sp, id, addr); | |
623 | ||
624 | /* NOTREACHED - relocate_code() does not return */ | |
625 | } | |
626 | ||
fe8c2806 WD |
627 | /************************************************************************ |
628 | * | |
629 | * This is the next part if the initialization sequence: we are now | |
630 | * running from RAM and have a "normal" C environment, i. e. global | |
631 | * data can be written, BSS has been cleared, the stack size in not | |
632 | * that critical any more, etc. | |
633 | * | |
634 | ************************************************************************ | |
635 | */ | |
fe8c2806 WD |
636 | void board_init_r (gd_t *id, ulong dest_addr) |
637 | { | |
fe8c2806 WD |
638 | cmd_tbl_t *cmdtp; |
639 | char *s, *e; | |
640 | bd_t *bd; | |
641 | int i; | |
642 | extern void malloc_bin_reloc (void); | |
643 | #ifndef CFG_ENV_IS_NOWHERE | |
644 | extern char * env_name_spec; | |
645 | #endif | |
646 | ||
647 | #ifndef CFG_NO_FLASH | |
648 | ulong flash_size; | |
649 | #endif | |
650 | ||
651 | gd = id; /* initialize RAM version of global data */ | |
652 | bd = gd->bd; | |
653 | ||
654 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
f82b3b63 GL |
655 | |
656 | #if defined(CONFIG_RELOC_FIXUP_WORKS) | |
657 | gd->reloc_off = 0; | |
e9514751 | 658 | mem_malloc_end = dest_addr; |
f82b3b63 | 659 | #else |
bb105f24 | 660 | gd->reloc_off = dest_addr - CFG_MONITOR_BASE; |
f82b3b63 | 661 | #endif |
bb105f24 MB |
662 | |
663 | #ifdef CONFIG_SERIAL_MULTI | |
664 | serial_initialize(); | |
665 | #endif | |
fe8c2806 | 666 | |
9d2b18a0 | 667 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
668 | |
669 | WATCHDOG_RESET (); | |
670 | ||
c837dcb1 WD |
671 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
672 | board_early_init_r (); | |
673 | #endif | |
674 | ||
3b57fe0a | 675 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 WD |
676 | |
677 | /* | |
678 | * We have to relocate the command table manually | |
679 | */ | |
8bde7f77 | 680 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 681 | ulong addr; |
fe8c2806 WD |
682 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
683 | #if 0 | |
684 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
685 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
686 | #endif | |
687 | cmdtp->cmd = | |
688 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
689 | ||
690 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
691 | cmdtp->name = (char *)addr; | |
692 | ||
693 | if (cmdtp->usage) { | |
694 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
695 | cmdtp->usage = (char *)addr; | |
696 | } | |
697 | #ifdef CFG_LONGHELP | |
698 | if (cmdtp->help) { | |
699 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
700 | cmdtp->help = (char *)addr; | |
701 | } | |
702 | #endif | |
703 | } | |
704 | /* there are some other pointer constants we must deal with */ | |
705 | #ifndef CFG_ENV_IS_NOWHERE | |
706 | env_name_spec += gd->reloc_off; | |
707 | #endif | |
708 | ||
709 | WATCHDOG_RESET (); | |
710 | ||
56f94be3 | 711 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 712 | logbuff_init_ptrs (); |
56f94be3 | 713 | #endif |
fe8c2806 | 714 | #ifdef CONFIG_POST |
228f29ac | 715 | post_output_backlog (); |
fe8c2806 WD |
716 | post_reloc (); |
717 | #endif | |
718 | ||
719 | WATCHDOG_RESET(); | |
720 | ||
2688e2f9 KG |
721 | #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \ |
722 | defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX) | |
fe8c2806 WD |
723 | icache_enable (); /* it's time to enable the instruction cache */ |
724 | #endif | |
725 | ||
1c8f6d8f | 726 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 727 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
728 | #endif |
729 | ||
3bac3513 | 730 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 731 | /* |
3bac3513 WD |
732 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
733 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
734 | * bridge there. | |
fe8c2806 WD |
735 | */ |
736 | pci_init (); | |
3bac3513 WD |
737 | #endif |
738 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
739 | /* |
740 | * Initialise the ISA bridge | |
741 | */ | |
742 | initialise_w83c553f (); | |
743 | #endif | |
744 | ||
745 | asm ("sync ; isync"); | |
746 | ||
747 | /* | |
748 | * Setup trap handlers | |
749 | */ | |
750 | trap_init (dest_addr); | |
751 | ||
752 | #if !defined(CFG_NO_FLASH) | |
753 | puts ("FLASH: "); | |
754 | ||
755 | if ((flash_size = flash_init ()) > 0) { | |
0cb61d7d | 756 | # ifdef CFG_FLASH_CHECKSUM |
fe8c2806 WD |
757 | print_size (flash_size, ""); |
758 | /* | |
759 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
760 | * | |
761 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
762 | */ | |
763 | s = getenv ("flashchecksum"); | |
764 | if (s && (*s == 'y')) { | |
765 | printf (" CRC: %08lX", | |
7e780369 WD |
766 | crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size) |
767 | ); | |
fe8c2806 WD |
768 | } |
769 | putc ('\n'); | |
0cb61d7d | 770 | # else /* !CFG_FLASH_CHECKSUM */ |
fe8c2806 | 771 | print_size (flash_size, "\n"); |
0cb61d7d | 772 | # endif /* CFG_FLASH_CHECKSUM */ |
fe8c2806 WD |
773 | } else { |
774 | puts (failed); | |
775 | hang (); | |
776 | } | |
777 | ||
778 | bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */ | |
779 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ | |
fa230445 HS |
780 | |
781 | #if defined(CFG_UPDATE_FLASH_SIZE) | |
782 | /* Make a update of the Memctrl. */ | |
783 | update_flash_size (flash_size); | |
784 | #endif | |
785 | ||
786 | ||
7e780369 WD |
787 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
788 | /* flash mapped at end of memory map */ | |
789 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
0cb61d7d | 790 | # elif CFG_MONITOR_BASE == CFG_FLASH_BASE |
3b57fe0a | 791 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 792 | # else |
fe8c2806 | 793 | bd->bi_flashoffset = 0; |
0cb61d7d WD |
794 | # endif |
795 | #else /* CFG_NO_FLASH */ | |
fe8c2806 WD |
796 | |
797 | bd->bi_flashsize = 0; | |
798 | bd->bi_flashstart = 0; | |
799 | bd->bi_flashoffset = 0; | |
800 | #endif /* !CFG_NO_FLASH */ | |
801 | ||
802 | WATCHDOG_RESET (); | |
803 | ||
804 | /* initialize higher level parts of CPU like time base and timers */ | |
805 | cpu_init_r (); | |
806 | ||
807 | WATCHDOG_RESET (); | |
808 | ||
809 | /* initialize malloc() area */ | |
810 | mem_malloc_init (); | |
811 | malloc_bin_reloc (); | |
812 | ||
813 | #ifdef CONFIG_SPI | |
814 | # if !defined(CFG_ENV_IS_IN_EEPROM) | |
815 | spi_init_f (); | |
816 | # endif | |
817 | spi_init_r (); | |
818 | #endif | |
819 | ||
7def6b34 | 820 | #if defined(CONFIG_CMD_NAND) |
887e2ec9 SR |
821 | WATCHDOG_RESET (); |
822 | puts ("NAND: "); | |
823 | nand_init(); /* go init the NAND */ | |
824 | #endif | |
825 | ||
fe8c2806 WD |
826 | /* relocate environment function pointers etc. */ |
827 | env_relocate (); | |
828 | ||
829 | /* | |
830 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
831 | * We do this here, where we have "normal" access to the |
832 | * environment; we used to do this still running from ROM, | |
833 | * where had to use getenv_r(), which can be pretty slow when | |
834 | * the environment is in EEPROM. | |
fe8c2806 | 835 | */ |
7abf0c58 WD |
836 | |
837 | #if defined(CFG_EXTBDINFO) | |
838 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) | |
839 | #if defined(CONFIG_I2CFAST) | |
840 | /* | |
841 | * set bi_iic_fast for linux taking environment variable | |
842 | * "i2cfast" into account | |
843 | */ | |
844 | { | |
845 | char *s = getenv ("i2cfast"); | |
846 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
847 | bd->bi_iic_fast[0] = 1; | |
848 | bd->bi_iic_fast[1] = 1; | |
849 | } else { | |
850 | bd->bi_iic_fast[0] = 0; | |
851 | bd->bi_iic_fast[1] = 0; | |
852 | } | |
853 | } | |
854 | #else | |
855 | bd->bi_iic_fast[0] = 0; | |
856 | bd->bi_iic_fast[1] = 0; | |
857 | #endif /* CONFIG_I2CFAST */ | |
858 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
859 | #endif /* CFG_EXTBDINFO */ | |
860 | ||
9045f33c | 861 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
862 | sc3_read_eeprom(); |
863 | #endif | |
d59feffb HW |
864 | |
865 | #ifdef CFG_ID_EEPROM | |
866 | mac_read_from_eeprom(); | |
867 | #endif | |
868 | ||
fe8c2806 | 869 | s = getenv ("ethaddr"); |
4707fb50 BS |
870 | #if defined (CONFIG_MBX) || \ |
871 | defined (CONFIG_RPXCLASSIC) || \ | |
872 | defined(CONFIG_IAD210) || \ | |
873 | defined(CONFIG_V38B) | |
fe8c2806 WD |
874 | if (s == NULL) |
875 | board_get_enetaddr (bd->bi_enetaddr); | |
876 | else | |
877 | #endif | |
878 | for (i = 0; i < 6; ++i) { | |
879 | bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
880 | if (s) | |
881 | s = (*e) ? e + 1 : e; | |
882 | } | |
883 | #ifdef CONFIG_HERMES | |
884 | if ((gd->board_type >> 16) == 2) | |
885 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
886 | else | |
887 | bd->bi_ethspeed = 0xFFFF; | |
888 | #endif | |
889 | ||
890 | #ifdef CONFIG_NX823 | |
891 | load_sernum_ethaddr (); | |
892 | #endif | |
893 | ||
e2ffd59b | 894 | #ifdef CONFIG_HAS_ETH1 |
fe8c2806 WD |
895 | /* handle the 2nd ethernet address */ |
896 | ||
897 | s = getenv ("eth1addr"); | |
898 | ||
899 | for (i = 0; i < 6; ++i) { | |
900 | bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
901 | if (s) | |
902 | s = (*e) ? e + 1 : e; | |
903 | } | |
904 | #endif | |
e2ffd59b | 905 | #ifdef CONFIG_HAS_ETH2 |
fe8c2806 WD |
906 | /* handle the 3rd ethernet address */ |
907 | ||
908 | s = getenv ("eth2addr"); | |
b79316f2 | 909 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
910 | if (s == NULL) |
911 | board_get_enetaddr(bd->bi_enet2addr); | |
912 | else | |
913 | #endif | |
fe8c2806 WD |
914 | for (i = 0; i < 6; ++i) { |
915 | bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
916 | if (s) | |
917 | s = (*e) ? e + 1 : e; | |
918 | } | |
919 | #endif | |
920 | ||
e2ffd59b | 921 | #ifdef CONFIG_HAS_ETH3 |
ba56f625 WD |
922 | /* handle 4th ethernet address */ |
923 | s = getenv("eth3addr"); | |
b79316f2 | 924 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
925 | if (s == NULL) |
926 | board_get_enetaddr(bd->bi_enet3addr); | |
927 | else | |
928 | #endif | |
929 | for (i = 0; i < 6; ++i) { | |
930 | bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
931 | if (s) | |
932 | s = (*e) ? e + 1 : e; | |
933 | } | |
934 | #endif | |
fe8c2806 WD |
935 | |
936 | #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \ | |
fa230445 | 937 | defined(CONFIG_TQM8272) || \ |
566a494f HS |
938 | defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \ |
939 | defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP) | |
fe8c2806 WD |
940 | load_sernum_ethaddr (); |
941 | #endif | |
942 | /* IP Address */ | |
943 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
944 | ||
945 | WATCHDOG_RESET (); | |
946 | ||
979bdbc7 | 947 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
948 | /* |
949 | * Do pci configuration | |
950 | */ | |
951 | pci_init (); | |
952 | #endif | |
953 | ||
954 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
955 | /* Initialize devices */ | |
956 | devices_init (); | |
957 | ||
27b207fd WD |
958 | /* Initialize the jump table for applications */ |
959 | jumptable_init (); | |
fe8c2806 | 960 | |
500856eb RJ |
961 | #if defined(CONFIG_API) |
962 | /* Initialize API */ | |
963 | api_init (); | |
964 | #endif | |
965 | ||
fe8c2806 WD |
966 | /* Initialize the console (after the relocation and devices init) */ |
967 | console_init_r (); | |
fe8c2806 WD |
968 | |
969 | #if defined(CONFIG_CCM) || \ | |
970 | defined(CONFIG_COGENT) || \ | |
971 | defined(CONFIG_CPCI405) || \ | |
972 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 973 | defined(CONFIG_KUP4K) || \ |
0608e04d | 974 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
975 | defined(CONFIG_LWMON) || \ |
976 | defined(CONFIG_PCU_E) || \ | |
9045f33c | 977 | defined(CONFIG_SC3) || \ |
fe8c2806 WD |
978 | defined(CONFIG_W7O) || \ |
979 | defined(CONFIG_MISC_INIT_R) | |
980 | /* miscellaneous platform dependent initialisations */ | |
981 | misc_init_r (); | |
982 | #endif | |
983 | ||
984 | #ifdef CONFIG_HERMES | |
985 | if (bd->bi_ethspeed != 0xFFFF) | |
986 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
987 | #endif | |
988 | ||
7def6b34 | 989 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
990 | WATCHDOG_RESET (); |
991 | puts ("KGDB: "); | |
992 | kgdb_init (); | |
993 | #endif | |
994 | ||
9d2b18a0 | 995 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
996 | |
997 | /* | |
998 | * Enable Interrupts | |
999 | */ | |
1000 | interrupt_init (); | |
1001 | ||
1002 | /* Must happen after interrupts are initialized since | |
1003 | * an irq handler gets installed | |
1004 | */ | |
42dfe7a1 | 1005 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
1006 | serial_buffered_init(); |
1007 | #endif | |
1008 | ||
566a494f | 1009 | #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
fe8c2806 WD |
1010 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); |
1011 | #endif | |
1012 | ||
1013 | udelay (20); | |
1014 | ||
1015 | set_timer (0); | |
1016 | ||
fe8c2806 WD |
1017 | /* Initialize from environment */ |
1018 | if ((s = getenv ("loadaddr")) != NULL) { | |
1019 | load_addr = simple_strtoul (s, NULL, 16); | |
1020 | } | |
7def6b34 | 1021 | #if defined(CONFIG_CMD_NET) |
fe8c2806 WD |
1022 | if ((s = getenv ("bootfile")) != NULL) { |
1023 | copy_filename (BootFile, s, sizeof (BootFile)); | |
1024 | } | |
b3aff0cb | 1025 | #endif |
fe8c2806 WD |
1026 | |
1027 | WATCHDOG_RESET (); | |
1028 | ||
7def6b34 | 1029 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
1030 | WATCHDOG_RESET (); |
1031 | puts ("SCSI: "); | |
1032 | scsi_init (); | |
1033 | #endif | |
1034 | ||
7def6b34 | 1035 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
1036 | WATCHDOG_RESET (); |
1037 | puts ("DOC: "); | |
1038 | doc_init (); | |
1039 | #endif | |
1040 | ||
7def6b34 | 1041 | #if defined(CONFIG_CMD_NET) |
63ff004c | 1042 | #if defined(CONFIG_NET_MULTI) |
fe8c2806 WD |
1043 | WATCHDOG_RESET (); |
1044 | puts ("Net: "); | |
63ff004c | 1045 | #endif |
fe8c2806 WD |
1046 | eth_initialize (bd); |
1047 | #endif | |
1048 | ||
7def6b34 | 1049 | #if defined(CONFIG_CMD_NET) && ( \ |
63ff004c MB |
1050 | defined(CONFIG_CCM) || \ |
1051 | defined(CONFIG_ELPT860) || \ | |
1052 | defined(CONFIG_EP8260) || \ | |
1053 | defined(CONFIG_IP860) || \ | |
1054 | defined(CONFIG_IVML24) || \ | |
1055 | defined(CONFIG_IVMS8) || \ | |
1056 | defined(CONFIG_MPC8260ADS) || \ | |
1057 | defined(CONFIG_MPC8266ADS) || \ | |
1058 | defined(CONFIG_MPC8560ADS) || \ | |
1059 | defined(CONFIG_PCU_E) || \ | |
1060 | defined(CONFIG_RPXSUPER) || \ | |
1061 | defined(CONFIG_STXGP3) || \ | |
1062 | defined(CONFIG_SPD823TS) || \ | |
1063 | defined(CONFIG_RESET_PHY_R) ) | |
1064 | ||
1065 | WATCHDOG_RESET (); | |
1066 | debug ("Reset Ethernet PHY\n"); | |
1067 | reset_phy (); | |
1068 | #endif | |
1069 | ||
fe8c2806 | 1070 | #ifdef CONFIG_POST |
6dff5529 | 1071 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
1072 | #endif |
1073 | ||
7def6b34 JL |
1074 | #if defined(CONFIG_CMD_PCMCIA) \ |
1075 | && !defined(CONFIG_CMD_IDE) | |
fe8c2806 WD |
1076 | WATCHDOG_RESET (); |
1077 | puts ("PCMCIA:"); | |
1078 | pcmcia_init (); | |
1079 | #endif | |
1080 | ||
7def6b34 | 1081 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
1082 | WATCHDOG_RESET (); |
1083 | # ifdef CONFIG_IDE_8xx_PCCARD | |
1084 | puts ("PCMCIA:"); | |
1085 | # else | |
1086 | puts ("IDE: "); | |
1087 | #endif | |
ca43ba18 HS |
1088 | #if defined(CONFIG_START_IDE) |
1089 | if (board_start_ide()) | |
1090 | ide_init (); | |
1091 | #else | |
fe8c2806 | 1092 | ide_init (); |
ca43ba18 | 1093 | #endif |
b3aff0cb | 1094 | #endif |
fe8c2806 WD |
1095 | |
1096 | #ifdef CONFIG_LAST_STAGE_INIT | |
1097 | WATCHDOG_RESET (); | |
1098 | /* | |
1099 | * Some parts can be only initialized if all others (like | |
1100 | * Interrupts) are up and running (i.e. the PC-style ISA | |
1101 | * keyboard). | |
1102 | */ | |
1103 | last_stage_init (); | |
1104 | #endif | |
1105 | ||
7def6b34 | 1106 | #if defined(CONFIG_CMD_BEDBUG) |
fe8c2806 WD |
1107 | WATCHDOG_RESET (); |
1108 | bedbug_init (); | |
1109 | #endif | |
1110 | ||
228f29ac | 1111 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
1112 | /* |
1113 | * Export available size of memory for Linux, | |
1114 | * taking into account the protected RAM at top of memory | |
1115 | */ | |
1116 | { | |
1117 | ulong pram; | |
fe8c2806 | 1118 | uchar memsz[32]; |
228f29ac WD |
1119 | #ifdef CONFIG_PRAM |
1120 | char *s; | |
fe8c2806 WD |
1121 | |
1122 | if ((s = getenv ("pram")) != NULL) { | |
1123 | pram = simple_strtoul (s, NULL, 10); | |
1124 | } else { | |
1125 | pram = CONFIG_PRAM; | |
1126 | } | |
228f29ac WD |
1127 | #else |
1128 | pram=0; | |
1129 | #endif | |
1130 | #ifdef CONFIG_LOGBUFFER | |
3d610186 | 1131 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
1132 | /* Also take the logbuffer into account (pram is in kB) */ |
1133 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
3d610186 | 1134 | #endif |
228f29ac | 1135 | #endif |
77ddac94 WD |
1136 | sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1137 | setenv ("mem", (char *)memsz); | |
fe8c2806 WD |
1138 | } |
1139 | #endif | |
1140 | ||
1c43771b WD |
1141 | #ifdef CONFIG_PS2KBD |
1142 | puts ("PS/2: "); | |
1143 | kbd_init(); | |
1144 | #endif | |
1145 | ||
4532cb69 WD |
1146 | #ifdef CONFIG_MODEM_SUPPORT |
1147 | { | |
1148 | extern int do_mdm_init; | |
1149 | do_mdm_init = gd->do_mdm_init; | |
1150 | } | |
1151 | #endif | |
1152 | ||
fe8c2806 WD |
1153 | /* Initialization complete - start the monitor */ |
1154 | ||
1155 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1156 | for (;;) { | |
1157 | WATCHDOG_RESET (); | |
1158 | main_loop (); | |
1159 | } | |
1160 | ||
1161 | /* NOTREACHED - no way out of command loop except booting */ | |
1162 | } | |
1163 | ||
1164 | void hang (void) | |
1165 | { | |
1166 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a | 1167 | show_boot_progress(-30); |
fe8c2806 WD |
1168 | for (;;); |
1169 | } | |
1170 | ||
4532cb69 WD |
1171 | #ifdef CONFIG_MODEM_SUPPORT |
1172 | /* called from main loop (common/main.c) */ | |
77ddac94 WD |
1173 | /* 'inline' - We have to do it fast */ |
1174 | static inline void mdm_readline(char *buf, int bufsiz) | |
1175 | { | |
1176 | char c; | |
1177 | char *p; | |
1178 | int n; | |
1179 | ||
1180 | n = 0; | |
1181 | p = buf; | |
1182 | for(;;) { | |
1183 | c = serial_getc(); | |
1184 | ||
1185 | /* dbg("(%c)", c); */ | |
1186 | ||
1187 | switch(c) { | |
1188 | case '\r': | |
1189 | break; | |
1190 | case '\n': | |
1191 | *p = '\0'; | |
1192 | return; | |
1193 | ||
1194 | default: | |
1195 | if(n++ > bufsiz) { | |
1196 | *p = '\0'; | |
1197 | return; /* sanity check */ | |
1198 | } | |
1199 | *p = c; | |
1200 | p++; | |
1201 | break; | |
1202 | } | |
1203 | } | |
1204 | } | |
1205 | ||
4532cb69 WD |
1206 | extern void dbg(const char *fmt, ...); |
1207 | int mdm_init (void) | |
1208 | { | |
1209 | char env_str[16]; | |
1210 | char *init_str; | |
1211 | int i; | |
1212 | extern char console_buffer[]; | |
4532cb69 WD |
1213 | extern void enable_putc(void); |
1214 | extern int hwflow_onoff(int); | |
1215 | ||
1216 | enable_putc(); /* enable serial_putc() */ | |
1217 | ||
1218 | #ifdef CONFIG_HWFLOW | |
1219 | init_str = getenv("mdm_flow_control"); | |
1220 | if (init_str && (strcmp(init_str, "rts/cts") == 0)) | |
1221 | hwflow_onoff (1); | |
1222 | else | |
1223 | hwflow_onoff(-1); | |
1224 | #endif | |
1225 | ||
1226 | for (i = 1;;i++) { | |
1227 | sprintf(env_str, "mdm_init%d", i); | |
1228 | if ((init_str = getenv(env_str)) != NULL) { | |
1229 | serial_puts(init_str); | |
1230 | serial_puts("\n"); | |
1231 | for(;;) { | |
1232 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1233 | dbg("ini%d: [%s]", i, console_buffer); | |
1234 | ||
1235 | if ((strcmp(console_buffer, "OK") == 0) || | |
1236 | (strcmp(console_buffer, "ERROR") == 0)) { | |
1237 | dbg("ini%d: cmd done", i); | |
1238 | break; | |
1239 | } else /* in case we are originating call ... */ | |
1240 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1241 | dbg("ini%d: connect", i); | |
1242 | return 0; | |
1243 | } | |
1244 | } | |
1245 | } else | |
1246 | break; /* no init string - stop modem init */ | |
1247 | ||
1248 | udelay(100000); | |
1249 | } | |
1250 | ||
1251 | udelay(100000); | |
1252 | ||
1253 | /* final stage - wait for connect */ | |
1254 | for(;i > 1;) { /* if 'i' > 1 - wait for connection | |
1255 | message from modem */ | |
1256 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1257 | dbg("ini_f: [%s]", console_buffer); | |
1258 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1259 | dbg("ini_f: connected"); | |
1260 | return 0; | |
1261 | } | |
1262 | } | |
1263 | ||
1264 | return 0; | |
1265 | } | |
1266 | ||
4532cb69 WD |
1267 | #endif |
1268 | ||
fe8c2806 WD |
1269 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1270 | /* | |
1271 | * Pointer to initial global data area | |
1272 | * | |
1273 | * Here we initialize it. | |
1274 | */ | |
1275 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1276 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
1277 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
1278 | #endif /* 0 */ | |
1279 | ||
1280 | /************************************************************************/ |