[J-u-boot.git] / board / work-microwave / work_92105 / work_92105_spl.c

/*
 * WORK Microwave work_92105 board support
 *
 * (C) Copyright 2014  DENX Software Engineering GmbH
 * Written-by: Albert ARIBAUD <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/cpu.h>
#include <asm/arch/emc.h>
#include <asm/gpio.h>
#include <spl.h>
#include "work_92105_display.h"

struct emc_dram_settings dram_64mb = {
	.cmddelay = 0x0001C000,
	.config0 = 0x00005682,
	.rascas0 = 0x00000302,
	.rdconfig = 0x00000011,
	.trp = 52631578,
	.tras = 20833333,
	.tsrex = 12500000,
	.twr = 66666666,
	.trc = 13888888,
	.trfc = 10256410,
	.txsr = 12500000,
	.trrd = 1,
	.tmrd = 1,
	.tcdlr = 0,
	.refresh = 128000,
	.mode = 0x00018000,
	.emode = 0x02000000
};

const struct emc_dram_settings dram_128mb = {
	.cmddelay = 0x0001C000,
	.config0 = 0x00005882,
	.rascas0 = 0x00000302,
	.rdconfig = 0x00000011,
	.trp = 52631578,
	.tras = 22222222,
	.tsrex = 8333333,
	.twr = 66666666,
	.trc = 14814814,
	.trfc = 10256410,
	.txsr = 8333333,
	.trrd = 1,
	.tmrd = 1,
	.tcdlr = 0,
	.refresh = 128000,
	.mode = 0x00030000,
	.emode = 0x02000000
};

void spl_board_init(void)
{
	/* initialize serial port for console */
	lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
	/* initialize console */
	preloader_console_init();
	/* init DDR and NAND to chainload U-Boot */
	ddr_init(&dram_128mb);
	/*
	 * If this is actually a 64MB module, then the highest column
	 * bit in any address will be ignored, and thus address 0x80000000
	 * should be mirrored at address 0x80000800. Test this.
	 */
	writel(0x31415926, 0x80000000); /* write Pi at 0x80000000 */
	writel(0x16180339, 0x80000800); /* write Phi at 0x80000800 */
	if (readl(0x80000000) == 0x16180339) /* check 0x80000000 */ {
		/* actually 64MB mirrored: reconfigure controller */
		ddr_init(&dram_64mb);
	}
	/* initialize NAND controller to load U-Boot from NAND */
	lpc32xx_mlc_nand_init();
}

u32 spl_boot_device(void)
{
	return BOOT_DEVICE_NAND;
}
Commit	Line	Data
412ae53a AA	1	/*
	2	* WORK Microwave work_92105 board support
	3	*
	4	* (C) Copyright 2014 DENX Software Engineering GmbH
	5	* Written-by: Albert ARIBAUD <[email protected]>
	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9
	10	#include <common.h>
	11	#include <asm/io.h>
	12	#include <asm/arch/sys_proto.h>
	13	#include <asm/arch/cpu.h>
	14	#include <asm/arch/emc.h>
	15	#include <asm/gpio.h>
	16	#include <spl.h>
	17	#include "work_92105_display.h"
	18
	19	struct emc_dram_settings dram_64mb = {
	20	.cmddelay = 0x0001C000,
	21	.config0 = 0x00005682,
	22	.rascas0 = 0x00000302,
	23	.rdconfig = 0x00000011,
	24	.trp = 52631578,
	25	.tras = 20833333,
	26	.tsrex = 12500000,
	27	.twr = 66666666,
	28	.trc = 13888888,
	29	.trfc = 10256410,
	30	.txsr = 12500000,
	31	.trrd = 1,
	32	.tmrd = 1,
	33	.tcdlr = 0,
	34	.refresh = 128000,
	35	.mode = 0x00018000,
	36	.emode = 0x02000000
	37	};
	38
	39	const struct emc_dram_settings dram_128mb = {
	40	.cmddelay = 0x0001C000,
	41	.config0 = 0x00005882,
	42	.rascas0 = 0x00000302,
	43	.rdconfig = 0x00000011,
	44	.trp = 52631578,
	45	.tras = 22222222,
	46	.tsrex = 8333333,
	47	.twr = 66666666,
	48	.trc = 14814814,
	49	.trfc = 10256410,
	50	.txsr = 8333333,
	51	.trrd = 1,
	52	.tmrd = 1,
	53	.tcdlr = 0,
	54	.refresh = 128000,
	55	.mode = 0x00030000,
	56	.emode = 0x02000000
	57	};
	58
	59	void spl_board_init(void)
	60	{
	61	/* initialize serial port for console */
	62	lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
	63	/* initialize console */
	64	preloader_console_init();
65	/* init DDR and NAND to chainload U-Boot */
66	ddr_init(&dram_128mb);
67	/*
68	* If this is actually a 64MB module, then the highest column
69	* bit in any address will be ignored, and thus address 0x80000000
70	* should be mirrored at address 0x80000800. Test this.
71	*/
72	writel(0x31415926, 0x80000000); /* write Pi at 0x80000000 */
73	writel(0x16180339, 0x80000800); /* write Phi at 0x80000800 */
74	if (readl(0x80000000) == 0x16180339) /* check 0x80000000 */ {
75	/* actually 64MB mirrored: reconfigure controller */
76	ddr_init(&dram_64mb);
77	}
78	/* initialize NAND controller to load U-Boot from NAND */
79	lpc32xx_mlc_nand_init();
80	}
81
82	u32 spl_boot_device(void)
83	{
84	return BOOT_DEVICE_NAND;
85	}