ARM: dts: samsung: exynos4: specify the SPI FIFO depth

Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.

exynos4.dtsi defines the following SPI aliases:
	spi0 = &spi_0;
	spi1 = &spi_1;
	spi2 = &spi_2;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos4210-spi" compatible:
	.fifo_lvl_mask  = { 0x1ff, 0x7F, 0x7F },
Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2
having 64 byte FIFO depth each. Update device tree with these FIFO depths.
No functional change expected.

Signed-off-by: Tudor Ambarus <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>

diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi
index 7f981b5c0d64b5dd445b15e8245517150aed7b1e..ed47d0ce04e12c05fe1b1e9351a91a4aceb58fce 100644 (file)
--- a/arch/arm/boot/dts/samsung/exynos4.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4.dtsi
@@ -621,6 +621,7 @@
                        clock-names = "spi", "spi_busclk0";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi0_bus>;
+                       fifo-depth = <256>;
                        status = "disabled";
                };
 
@@ -636,6 +637,7 @@
                        clock-names = "spi", "spi_busclk0";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi1_bus>;
+                       fifo-depth = <64>;
                        status = "disabled";
                };
 
@@ -651,6 +653,7 @@
                        clock-names = "spi", "spi_busclk0";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi2_bus>;
+                       fifo-depth = <64>;
                        status = "disabled";
                };