hwmon: (k10temp): Add support for new family 17h and 19h models

Add the support for CCD offsets used on family 17h models A0h-AFh,
and family 19h models 60h-7Fh.

  [ bp: Merge into a single patch. ]

Signed-off-by: Mario Limonciello <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 4e239bd75b1dae2cf8f3108b0cdefbba78d4afad..5a9d47a229e4066c8039e180818317af6e2f9197 100644 (file)
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -428,6 +428,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
                        data->ccd_offset = 0x154;
                        k10temp_get_ccd_support(pdev, data, 8);
                        break;
+               case 0xa0 ... 0xaf:
+                       data->ccd_offset = 0x300;
+                       k10temp_get_ccd_support(pdev, data, 8);
+                       break;
                }
        } else if (boot_cpu_data.x86 == 0x19) {
                data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
@@ -445,6 +449,11 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
                        data->ccd_offset = 0x300;
                        k10temp_get_ccd_support(pdev, data, 8);
                        break;
+               case 0x60 ... 0x6f:
+               case 0x70 ... 0x7f:
+                       data->ccd_offset = 0x308;
+                       k10temp_get_ccd_support(pdev, data, 8);
+                       break;
                case 0x10 ... 0x1f:
                case 0xa0 ... 0xaf:
                        data->ccd_offset = 0x300;
@@ -489,10 +498,13 @@ static const struct pci_device_id k10temp_id_table[] = {
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
+       { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
+       { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
+       { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
        { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
        {}
 };