]> Git Repo - J-linux.git/commitdiff
Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
authorLinus Torvalds <[email protected]>
Thu, 2 Sep 2021 21:22:56 +0000 (14:22 -0700)
committerLinus Torvalds <[email protected]>
Thu, 2 Sep 2021 21:22:56 +0000 (14:22 -0700)
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...

1  2 
MAINTAINERS
arch/arm64/boot/dts/mediatek/mt8183.dtsi
drivers/pinctrl/bcm/pinctrl-bcm2835.c
drivers/pinctrl/pinctrl-ingenic.c
drivers/pinctrl/pinctrl-single.c
drivers/pinctrl/qcom/Kconfig

diff --combined MAINTAINERS
index 8ef33ef01f0b63d13ada59d8c1bed0ac34c5d2c9,63cb724577b0d9414e2130596e2c3c78f8a51c1e..ad456ca8f7405a4be992e44bbbab474f649f326f
@@@ -445,7 -445,7 +445,7 @@@ F: drivers/platform/x86/wmi.
  F:    include/uapi/linux/wmi.h
  
  ACRN HYPERVISOR SERVICE MODULE
 -M:    Shuo Liu <shuo.a.liu@intel.com>
 +M:    Fei Li <fei1.li@intel.com>
  L:    [email protected] (subscribers-only)
  S:    Supported
  W:    https://projectacrn.org
@@@ -459,12 -459,6 +459,12 @@@ S:       Maintaine
  W:    https://parisc.wiki.kernel.org/index.php/AD1889
  F:    sound/pci/ad1889.*
  
 +AD5110 ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
 +M:    Mugilraj Dhavachelvan <[email protected]>
 +L:    [email protected]
 +S:    Supported
 +F:    drivers/iio/potentiometer/ad5110.c
 +
  AD525X ANALOG DEVICES DIGITAL POTENTIOMETERS DRIVER
  M:    Michael Hennerich <[email protected]>
  S:    Supported
@@@ -798,7 -792,7 +798,7 @@@ F: Documentation/devicetree/bindings/i2
  F:    drivers/i2c/busses/i2c-altera.c
  
  ALTERA MAILBOX DRIVER
 -M:    Ley Foon Tan <ley.foon.tan@intel.com>
 +M:    Joyce Ooi <joyce.ooi@intel.com>
  S:    Maintained
  F:    drivers/mailbox/mailbox-altera.c
  
@@@ -939,7 -933,6 +939,7 @@@ F: drivers/video/fbdev/geode
  
  AMD IOMMU (AMD-VI)
  M:    Joerg Roedel <[email protected]>
 +R:    Suravee Suthikulpanit <[email protected]>
  L:    [email protected]
  S:    Maintained
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
  S:    Maintained
  F:    drivers/media/i2c/aptina-pll.*
  
 +AQUACOMPUTER D5 NEXT PUMP SENSOR DRIVER
 +M:    Aleksa Savic <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/hwmon/aquacomputer_d5next.rst
 +F:    drivers/hwmon/aquacomputer_d5next.c
 +
  AQUANTIA ETHERNET DRIVER (atlantic)
  M:    Igor Russkikh <[email protected]>
  L:    [email protected]
@@@ -1395,7 -1381,7 +1395,7 @@@ F:      Documentation/devicetree/bindings/ar
  F:    Documentation/devicetree/bindings/arm/arm,realview.yaml
  F:    Documentation/devicetree/bindings/arm/arm,versatile.yaml
  F:    Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
 -F:    Documentation/devicetree/bindings/auxdisplay/arm-charlcd.txt
 +F:    Documentation/devicetree/bindings/auxdisplay/arm,versatile-lcd.yaml
  F:    Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml
  F:    Documentation/devicetree/bindings/i2c/i2c-versatile.txt
  F:    Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
@@@ -1501,7 -1487,7 +1501,7 @@@ M:      Miquel Raynal <miquel.raynal@bootlin
  M:    Naga Sureshkumar Relli <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
 -F:    Documentation/devicetree/bindings/mtd/arm,pl353-smc.yaml
 +F:    Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
  F:    drivers/memory/pl353-smc.c
  
  ARM PRIMECELL CLCD PL110 DRIVER
@@@ -1703,7 -1689,7 +1703,7 @@@ L:      [email protected]
  S:    Maintained
  W:    https://asahilinux.org
  B:    https://github.com/AsahiLinux/linux/issues
 -C:    irc://chat.freenode.net/asahi-dev
 +C:    irc://irc.oftc.net/asahi-dev
  T:    git https://github.com/AsahiLinux/linux.git
  F:    Documentation/devicetree/bindings/arm/apple.yaml
  F:    Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@@ -2023,12 -2009,10 +2023,12 @@@ M:   Krzysztof Halasa <[email protected]
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
  F:    Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml
 +F:    Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml
  F:    Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt
  F:    Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml
  F:    Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
  F:    arch/arm/mach-ixp4xx/
 +F:    drivers/bus/intel-ixp4xx-eb.c
  F:    drivers/clocksource/timer-ixp4xx.c
  F:    drivers/crypto/ixp4xx_crypto.c
  F:    drivers/gpio/gpio-ixp4xx.c
@@@ -2857,7 -2841,7 +2857,7 @@@ AS3645A LED FLASH CONTROLLER DRIVE
  M:    Sakari Ailus <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/leds/leds-as3645a.c
 +F:    drivers/leds/flash/leds-as3645a.c
  
  ASAHI KASEI AK7375 LENS VOICE COIL DRIVER
  M:    Tianshu Qiu <[email protected]>
@@@ -3212,7 -3196,7 +3212,7 @@@ S:      Maintaine
  W:    https://www.open-mesh.org/
  Q:    https://patchwork.open-mesh.org/project/batman/list/
  B:    https://www.open-mesh.org/projects/batman-adv/issues
 -C:    irc://chat.freenode.net/batman
 +C:    ircs://irc.hackint.org/batadv
  T:    git https://git.open-mesh.org/linux-merge.git
  F:    Documentation/networking/batman-adv.rst
  F:    include/uapi/linux/batadv_packet.h
@@@ -3424,6 -3408,7 +3424,6 @@@ F:      drivers/net/ethernet/netronome/nfp/b
  
  BPF JIT for POWERPC (32-BIT AND 64-BIT)
  M:    Naveen N. Rao <[email protected]>
 -M:    Sandipan Das <[email protected]>
  L:    [email protected]
  L:    [email protected]
  S:    Maintained
@@@ -3869,7 -3854,7 +3869,7 @@@ M:      Markus Mayer <[email protected]
  M:    [email protected]
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
 -F:    Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.txt
 +F:    Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml
  F:    drivers/memory/brcmstb_dpfe.c
  
  BROADCOM STB NAND FLASH DRIVER
  S:    Maintained
  F:    drivers/mtd/nand/raw/brcmnand/
  
 +BROADCOM STB PCIE DRIVER
 +M:    Jim Quinlan <[email protected]>
 +M:    Nicolas Saenz Julienne <[email protected]>
 +M:    Florian Fainelli <[email protected]>
 +M:    [email protected]
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
 +F:    drivers/pci/controller/pcie-brcmstb.c
 +
  BROADCOM SYSTEMPORT ETHERNET DRIVER
  M:    Florian Fainelli <[email protected]>
  L:    [email protected]
@@@ -4522,7 -4497,7 +4522,7 @@@ L:      [email protected]
  S:    Supported
  W:    https://clangbuiltlinux.github.io/
  B:    https://github.com/ClangBuiltLinux/linux/issues
 -C:    irc://chat.freenode.net/clangbuiltlinux
 +C:    irc://irc.libera.chat/clangbuiltlinux
  F:    Documentation/kbuild/llvm.rst
  F:    include/linux/compiler-clang.h
  F:    scripts/clang-tools/
@@@ -4634,7 -4609,7 +4634,7 @@@ F:      include/linux/clk
  F:    include/linux/of_clk.h
  X:    drivers/clk/clkdev.c
  
 -COMMON INTERNET FILE SYSTEM (CIFS)
 +COMMON INTERNET FILE SYSTEM CLIENT (CIFS)
  M:    Steve French <[email protected]>
  L:    [email protected]
  L:    [email protected] (moderated for non-subscribers)
@@@ -4643,7 -4618,6 +4643,7 @@@ W:      http://linux-cifs.samba.org
  T:    git git://git.samba.org/sfrench/cifs-2.6.git
  F:    Documentation/admin-guide/cifs/
  F:    fs/cifs/
 +F:    fs/cifs_common/
  
  COMPACTPCI HOTPLUG CORE
  M:    Scott Murray <[email protected]>
@@@ -5595,7 -5569,7 +5595,7 @@@ M:      Lukasz Luba <[email protected]
  L:    [email protected]
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
 +F:    Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml
  F:    drivers/memory/samsung/exynos5422-dmc.c
  
  DME1737 HARDWARE MONITOR DRIVER
@@@ -5709,7 -5683,6 +5709,7 @@@ DPAA2 ETHERNET SWITCH DRIVE
  M:    Ioana Ciornei <[email protected]>
  L:    [email protected]
  S:    Maintained
 +F:    Documentation/networking/device_drivers/ethernet/freescale/dpaa2/switch-driver.rst
  F:    drivers/net/ethernet/freescale/dpaa2/dpaa2-switch*
  F:    drivers/net/ethernet/freescale/dpaa2/dpsw*
  
@@@ -5733,11 -5706,6 +5733,11 @@@ F:    Documentation/admin-guide/blockdev
  F:    drivers/block/drbd/
  F:    lib/lru_cache.c
  
 +DRIVER COMPONENT FRAMEWORK
 +L:    [email protected]
 +F:    drivers/base/component.c
 +F:    include/linux/component.h
 +
  DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS
  M:    Greg Kroah-Hartman <[email protected]>
  R:    "Rafael J. Wysocki" <[email protected]>
@@@ -5801,7 -5769,7 +5801,7 @@@ M:      Gerd Hoffmann <[email protected]
  L:    [email protected]
  S:    Maintained
  T:    git git://anongit.freedesktop.org/drm/drm-misc
 -F:    drivers/gpu/drm/bochs/
 +F:    drivers/gpu/drm/tiny/bochs.c
  
  DRM DRIVER FOR BOE HIMAX8279D PANELS
  M:    Jerry Han <[email protected]>
@@@ -5986,13 -5954,6 +5986,13 @@@ S:    Maintaine
  F:    Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml
  F:    drivers/gpu/drm/panel/panel-raydium-rm67191.c
  
 +DRM DRIVER FOR SAMSUNG DB7430 PANELS
 +M:    Linus Walleij <[email protected]>
 +S:    Maintained
 +T:    git git://anongit.freedesktop.org/drm/drm-misc
 +F:    Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml
 +F:    drivers/gpu/drm/panel/panel-samsung-db7430.c
 +
  DRM DRIVER FOR SITRONIX ST7703 PANELS
  M:    Guido Günther <[email protected]>
  R:    Purism Kernel Team <[email protected]>
@@@ -6091,27 -6052,21 +6091,27 @@@ F:   drivers/gpu/drm/vboxvideo
  
  DRM DRIVER FOR VMWARE VIRTUAL GPU
  M:    "VMware Graphics" <[email protected]>
 -M:    Roland Scheidegger <[email protected]>
  M:    Zack Rusin <[email protected]>
  L:    [email protected]
  S:    Supported
 -T:    git git://people.freedesktop.org/~sroland/linux
 +T:    git git://anongit.freedesktop.org/drm/drm-misc
  F:    drivers/gpu/drm/vmwgfx/
  F:    include/uapi/drm/vmwgfx_drm.h
  
 +DRM DRIVER FOR WIDECHIPS WS2401 PANELS
 +M:    Linus Walleij <[email protected]>
 +S:    Maintained
 +T:    git git://anongit.freedesktop.org/drm/drm-misc
 +F:    Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml
 +F:    drivers/gpu/drm/panel/panel-widechips-ws2401.c
 +
  DRM DRIVERS
  M:    David Airlie <[email protected]>
  M:    Daniel Vetter <[email protected]>
  L:    [email protected]
  S:    Maintained
  B:    https://gitlab.freedesktop.org/drm
 -C:    irc://chat.freenode.net/dri-devel
 +C:    irc://irc.oftc.net/dri-devel
  T:    git git://anongit.freedesktop.org/drm/drm
  F:    Documentation/devicetree/bindings/display/
  F:    Documentation/devicetree/bindings/gpu/
@@@ -6604,7 -6559,6 +6604,7 @@@ EDAC-ARMAD
  M:    Jan Luebbe <[email protected]>
  L:    [email protected]
  S:    Maintained
 +F:    Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml
  F:    drivers/edac/armada_xp_*
  
  EDAC-AST2500
@@@ -6949,12 -6903,6 +6949,12 @@@ M:    Mark Einon <[email protected]
  S:    Odd Fixes
  F:    drivers/net/ethernet/agere/
  
 +ETAS ES58X CAN/USB DRIVER
 +M:    Vincent Mailhol <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/net/can/usb/etas_es58x/
 +
  ETHERNET BRIDGE
  M:    Roopa Prabhu <[email protected]>
  M:    Nikolay Aleksandrov <[email protected]>
@@@ -6996,7 -6944,7 +6996,7 @@@ F:      include/uapi/linux/mdio.
  F:    include/uapi/linux/mii.h
  
  EXFAT FILE SYSTEM
 -M:    Namjae Jeon <[email protected]>
 +M:    Namjae Jeon <[email protected]>
  M:    Sungjong Seo <[email protected]>
  L:    [email protected]
  S:    Maintained
@@@ -7909,9 -7857,9 +7909,9 @@@ S:      Maintaine
  F:    drivers/input/touchscreen/goodix.c
  
  GOOGLE ETHERNET DRIVERS
 -M:    Catherine Sullivan <csully@google.com>
 -R:    Sagi Shahar <sagis@google.com>
 -R:    Jon Olson <jonolson@google.com>
 +M:    Jeroen de Borst <jeroendb@google.com>
 +R:    Catherine Sullivan <csully@google.com>
 +R:    David Awogbemila <awogbemila@google.com>
  L:    [email protected]
  S:    Supported
  F:    Documentation/networking/device_drivers/ethernet/google/gve.rst
@@@ -8484,12 -8432,10 +8484,12 @@@ S:   Maintaine
  F:    Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
  F:    drivers/spmi/hisi-spmi-controller.c
  
 -HISILICON STAGING DRIVERS FOR HIKEY 960/970
 +HISILICON SPMI PMIC DRIVER FOR HIKEY 6421v600
  M:    Mauro Carvalho Chehab <[email protected]>
 +L:    [email protected]
  S:    Maintained
 -F:    drivers/staging/hikey9xx/
 +F:    Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
 +F:    drivers/mfd/hi6421-spmi-pmic.c
  
  HISILICON TRUE RANDOM NUMBER GENERATOR V2 SUPPORT
  M:    Zaibo Xu <[email protected]>
@@@ -8648,9 -8594,6 +8648,9 @@@ T:      git git://git.kernel.org/pub/scm/lin
  F:    Documentation/ABI/stable/sysfs-bus-vmbus
  F:    Documentation/ABI/testing/debugfs-hyperv
  F:    Documentation/networking/device_drivers/ethernet/microsoft/netvsc.rst
 +F:    arch/arm64/hyperv
 +F:    arch/arm64/include/asm/hyperv-tlfs.h
 +F:    arch/arm64/include/asm/mshyperv.h
  F:    arch/x86/hyperv
  F:    arch/x86/include/asm/hyperv-tlfs.h
  F:    arch/x86/include/asm/mshyperv.h
@@@ -9097,7 -9040,7 +9097,7 @@@ F:      drivers/usb/atm/ueagle-atm.
  IMGTEC ASCII LCD DRIVER
  M:    Paul Burton <[email protected]>
  S:    Maintained
 -F:    Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
 +F:    Documentation/devicetree/bindings/auxdisplay/img,ascii-lcd.yaml
  F:    drivers/auxdisplay/img-ascii-lcd.c
  
  IMGTEC IR DECODER DRIVER
@@@ -9269,20 -9212,13 +9269,20 @@@ INTEL ATOMISP2 DUMMY / POWER-MANAGEMEN
  M:    Hans de Goede <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel_atomisp2_pm.c
 +F:    drivers/platform/x86/intel/atomisp2/pm.c
  
  INTEL ATOMISP2 LED DRIVER
  M:    Hans de Goede <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel_atomisp2_led.c
 +F:    drivers/platform/x86/intel/atomisp2/led.c
 +
 +INTEL BIOS SAR INT1092 DRIVER
 +M:    Shravan S <[email protected]>
 +M:    Intel Corporation <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/platform/x86/intel/int1092/
  
  INTEL BROXTON PMC DRIVER
  M:    Mika Westerberg <[email protected]>
@@@ -9314,7 -9250,7 +9314,7 @@@ S:      Supporte
  W:    https://01.org/linuxgraphics/
  Q:    http://patchwork.freedesktop.org/project/intel-gfx/
  B:    https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
 -C:    irc://chat.freenode.net/intel-gfx
 +C:    irc://irc.oftc.net/intel-gfx
  T:    git git://anongit.freedesktop.org/drm-intel
  F:    Documentation/gpu/i915.rst
  F:    drivers/gpu/drm/i915/
@@@ -9378,7 -9314,7 +9378,7 @@@ INTEL HID EVENT DRIVE
  M:    Alex Hung <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel-hid.c
 +F:    drivers/platform/x86/intel/hid.c
  
  INTEL I/OAT DMA DRIVER
  M:    Dave Jiang <[email protected]>
@@@ -9522,17 -9458,17 +9522,17 @@@ F:   include/linux/mfd/intel-m10-bmc.
  
  INTEL MENLOW THERMAL DRIVER
  M:    Sujith Thomas <[email protected]>
 -L:    platform-driver-x86@vger.kernel.org
 +L:    linux-pm@vger.kernel.org
  S:    Supported
  W:    https://01.org/linux-acpi
 -F:    drivers/platform/x86/intel_menlow.c
 +F:    drivers/thermal/intel/intel_menlow.c
  
  INTEL P-Unit IPC DRIVER
  M:    Zha Qipeng <[email protected]>
  L:    [email protected]
  S:    Maintained
  F:    arch/x86/include/asm/intel_punit_ipc.h
 -F:    drivers/platform/x86/intel_punit_ipc.c
 +F:    drivers/platform/x86/intel/punit_ipc.c
  
  INTEL PMC CORE DRIVER
  M:    Rajneesh Bhardwaj <[email protected]>
@@@ -9540,7 -9476,7 +9540,7 @@@ M:      David E Box <[email protected]
  L:    [email protected]
  S:    Maintained
  F:    Documentation/ABI/testing/sysfs-platform-intel-pmc
 -F:    drivers/platform/x86/intel_pmc_core*
 +F:    drivers/platform/x86/intel/pmc/
  
  INTEL PMIC GPIO DRIVERS
  M:    Andy Shevchenko <[email protected]>
@@@ -9558,7 -9494,7 +9558,7 @@@ INTEL PMT DRIVE
  M:    "David E. Box" <[email protected]>
  S:    Maintained
  F:    drivers/mfd/intel_pmt.c
 -F:    drivers/platform/x86/intel_pmt_*
 +F:    drivers/platform/x86/intel/pmt/
  
  INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT
  M:    Stanislav Yakovlev <[email protected]>
@@@ -9595,7 -9531,7 +9595,7 @@@ INTEL SPEED SELECT TECHNOLOG
  M:    Srinivas Pandruvada <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel_speed_select_if/
 +F:    drivers/platform/x86/intel/speed_select_if/
  F:    include/uapi/linux/isst_if.h
  F:    tools/power/x86/intel-speed-select/
  
@@@ -9616,19 -9552,19 +9616,19 @@@ M:   "David E. Box" <[email protected]
  L:    [email protected]
  S:    Maintained
  F:    arch/x86/include/asm/intel_telemetry.h
 -F:    drivers/platform/x86/intel_telemetry*
 +F:    drivers/platform/x86/intel/telemetry/
  
  INTEL UNCORE FREQUENCY CONTROL
  M:    Srinivas Pandruvada <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel-uncore-frequency.c
 +F:    drivers/platform/x86/intel/uncore-frequency.c
  
  INTEL VIRTUAL BUTTON DRIVER
  M:    AceLan Kao <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel-vbtn.c
 +F:    drivers/platform/x86/intel/vbtn.c
  
  INTEL WIRELESS 3945ABG/BG, 4965AGN (iwlegacy)
  M:    Stanislaw Gruszka <[email protected]>
@@@ -9649,12 -9585,12 +9649,12 @@@ M:   Jithu Joseph <[email protected]
  R:    Maurice Ma <[email protected]>
  S:    Maintained
  W:    https://slimbootloader.github.io/security/firmware-update.html
 -F:    drivers/platform/x86/intel-wmi-sbl-fw-update.c
 +F:    drivers/platform/x86/intel/wmi/sbl-fw-update.c
  
  INTEL WMI THUNDERBOLT FORCE POWER DRIVER
  L:    [email protected]
  S:    Maintained
 -F:    drivers/platform/x86/intel-wmi-thunderbolt.c
 +F:    drivers/platform/x86/intel/wmi/thunderbolt.c
  
  INTEL WWAN IOSM DRIVER
  M:    M Chetan Kumar <[email protected]>
@@@ -9812,6 -9748,11 +9812,6 @@@ M:     David Sterba <[email protected]
  S:    Odd Fixes
  F:    drivers/tty/ipwireless/
  
 -IPX NETWORK LAYER
 -L:    [email protected]
 -S:    Obsolete
 -F:    include/uapi/linux/ipx.h
 -
  IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
  M:    Marc Zyngier <[email protected]>
  S:    Maintained
@@@ -10161,17 -10102,6 +10161,17 @@@ T: git git://git.kernel.org/pub/scm/lin
  F:    Documentation/dev-tools/kselftest*
  F:    tools/testing/selftests/
  
 +KERNEL SMB3 SERVER (KSMBD)
 +M:    Namjae Jeon <[email protected]>
 +M:    Sergey Senozhatsky <[email protected]>
 +M:    Steve French <[email protected]>
 +M:    Hyunchul Lee <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://git.samba.org/ksmbd.git
 +F:    fs/cifs_common/
 +F:    fs/ksmbd/
 +
  KERNEL UNIT TESTING FRAMEWORK (KUnit)
  M:    Brendan Higgins <[email protected]>
  L:    [email protected]
@@@ -10457,7 -10387,6 +10457,7 @@@ F:   net/core/skmsg.
  F:    net/core/sock_map.c
  F:    net/ipv4/tcp_bpf.c
  F:    net/ipv4/udp_bpf.c
 +F:    net/unix/unix_bpf.c
  
  LANDLOCK SECURITY MODULE
  M:    Mickaël Salaün <[email protected]>
@@@ -10679,6 -10608,15 +10679,6 @@@ F:  LICENSES
  F:    scripts/spdxcheck-test.sh
  F:    scripts/spdxcheck.py
  
 -LIGHTNVM PLATFORM SUPPORT
 -M:    Matias Bjorling <[email protected]>
 -L:    [email protected]
 -S:    Maintained
 -W:    http://github/OpenChannelSSD
 -F:    drivers/lightnvm/
 -F:    include/linux/lightnvm.h
 -F:    include/uapi/linux/lightnvm.h
 -
  LINEAR RANGES HELPERS
  M:    Mark Brown <[email protected]>
  R:    Matti Vaittinen <[email protected]>
@@@ -11091,18 -11029,6 +11091,18 @@@ F: drivers/mailbox/arm_mhuv2.
  F:    include/linux/mailbox/arm_mhuv2_message.h
  F:    Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml
  
 +MANAGEMENT COMPONENT TRANSPORT PROTOCOL (MCTP)
 +M:    Jeremy Kerr <[email protected]>
 +M:    Matt Johnston <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/networking/mctp.rst
 +F:    drivers/net/mctp/
 +F:    include/net/mctp.h
 +F:    include/net/mctpdevice.h
 +F:    include/net/netns/mctp.h
 +F:    net/mctp/
 +
  MAN-PAGES: MANUAL PAGES FOR LINUX -- Sections 2, 3, 4, 5, and 7
  M:    Michael Kerrisk <[email protected]>
  L:    [email protected]
@@@ -11400,18 -11326,6 +11400,18 @@@ W: https://linuxtv.or
  T:    git git://linuxtv.org/media_tree.git
  F:    drivers/media/radio/radio-maxiradio*
  
 +MAXLINEAR ETHERNET PHY DRIVER
 +M:    Xu Liang <[email protected]>
 +L:    [email protected]
 +S:    Supported
 +F:    drivers/net/phy/mxl-gpy.c
 +
 +MCBA MICROCHIP CAN BUS ANALYZER TOOL DRIVER
 +R:    Yasushi SHOJI <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/net/can/usb/mcba_usb.c
 +
  MCAN MMIO DEVICE DRIVER
  M:    Chandrasekar Ramakrishnan <[email protected]>
  L:    [email protected]
@@@ -11843,7 -11757,6 +11843,7 @@@ F:   drivers/char/hw_random/mtk-rng.
  MEDIATEK SWITCH DRIVER
  M:    Sean Wang <[email protected]>
  M:    Landen Chao <[email protected]>
 +M:    DENG Qingfang <[email protected]>
  L:    [email protected]
  S:    Maintained
  F:    drivers/net/dsa/mt7530.*
@@@ -13859,15 -13772,6 +13859,15 @@@ T: git git://linuxtv.org/media_tree.gi
  F:    Documentation/devicetree/bindings/media/i2c/ov8856.yaml
  F:    drivers/media/i2c/ov8856.c
  
 +OMNIVISION OV9282 SENSOR DRIVER
 +M:    Paul J. Murphy <[email protected]>
 +M:    Daniele Alessandrelli <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://linuxtv.org/media_tree.git
 +F:    Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml
 +F:    drivers/media/i2c/ov9282.c
 +
  OMNIVISION OV9640 SENSOR DRIVER
  M:    Petr Cvek <[email protected]>
  L:    [email protected]
@@@ -13958,12 -13862,6 +13958,12 @@@ F: Documentation/devicetree
  F:    arch/*/boot/dts/
  F:    include/dt-bindings/
  
 +OPENCOMPUTE PTP CLOCK DRIVER
 +M:    Jonathan Lemon <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/ptp/ptp_ocp.c
 +
  OPENCORES I2C BUS DRIVER
  M:    Peter Korsgaard <[email protected]>
  M:    Andrew Lunn <[email protected]>
@@@ -14289,7 -14187,7 +14289,7 @@@ M:   Lucas Stach <[email protected]
  L:    [email protected]
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
 -F:    Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
 +F:    Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
  F:    drivers/pci/controller/dwc/*imx6*
  
  PCI DRIVER FOR FU740
@@@ -14377,8 -14275,7 +14377,8 @@@ M:   Jingoo Han <[email protected]
  M:    Gustavo Pimentel <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/pci/designware-pcie.txt
 +F:    Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
 +F:    Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
  F:    drivers/pci/controller/dwc/*designware*
  
  PCI DRIVER FOR TI DRA7XX/J721E
@@@ -14515,7 -14412,7 +14515,7 @@@ M:   Xiaowei Song <songxiaowei@hisilicon.
  M:    Binghui Wang <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/pci/kirin-pcie.txt
 +F:    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
  F:    drivers/pci/controller/dwc/pcie-kirin.c
  
  PCIE DRIVER FOR HISILICON STB
@@@ -14525,13 -14422,6 +14525,13 @@@ S: Maintaine
  F:    Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt
  F:    drivers/pci/controller/dwc/pcie-histb.c
  
 +PCIE DRIVER FOR INTEL LGM GW SOC
 +M:    Rahul Tanwar <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
 +F:    drivers/pci/controller/dwc/pcie-intel-gw.c
 +
  PCIE DRIVER FOR MEDIATEK
  M:    Ryder Lee <[email protected]>
  M:    Jianjun Wang <[email protected]>
@@@ -14727,6 -14617,12 +14727,12 @@@ F: Documentation/driver-api/pin-control
  F:    drivers/pinctrl/
  F:    include/linux/pinctrl/
  
+ PIN CONTROLLER - AMD
+ M:    Basavaraj Natikar <[email protected]>
+ M:    Shyam Sundar S K <[email protected]>
+ S:    Maintained
+ F:    drivers/pinctrl/pinctrl-amd.c
  PIN CONTROLLER - FREESCALE
  M:    Dong Aisheng <[email protected]>
  M:    Fabio Estevam <[email protected]>
@@@ -14745,12 -14641,19 +14751,19 @@@ S:        Maintaine
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git
  F:    drivers/pinctrl/intel/
  
+ PIN CONTROLLER - KEEMBAY
+ M:    Lakshmi Sowjanya D <[email protected]>
+ S:    Supported
+ F:    drivers/pinctrl/pinctrl-keembay*
  PIN CONTROLLER - MEDIATEK
  M:    Sean Wang <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
- F:    Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
- F:    Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
+ F:    Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
+ F:    Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml
+ F:    Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
+ F:    Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
  F:    drivers/pinctrl/mediatek/
  
  PIN CONTROLLER - MICROCHIP AT91
@@@ -15028,10 -14931,12 +15041,10 @@@ S:        Maintaine
  F:    include/linux/printk.h
  F:    kernel/printk/
  
 -PRISM54 WIRELESS DRIVER
 -M:    Luis Chamberlain <[email protected]>
 -L:    [email protected]
 -S:    Obsolete
 -W:    https://wireless.wiki.kernel.org/en/users/Drivers/p54
 -F:    drivers/net/wireless/intersil/prism54/
 +PRINTK INDEXING
 +R:    Chris Down <[email protected]>
 +S:    Maintained
 +F:    kernel/printk/index.c
  
  PROC FILESYSTEM
  L:    [email protected]
@@@ -15117,13 -15022,6 +15130,13 @@@ F: drivers/net/phy/dp83640
  F:    drivers/ptp/*
  F:    include/linux/ptp_cl*
  
 +PTP VIRTUAL CLOCK SUPPORT
 +M:    Yangbo Lu <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/ptp/ptp_vclock.c
 +F:    net/ethtool/phc_vclocks.c
 +
  PTRACE SUPPORT
  M:    Oleg Nesterov <[email protected]>
  S:    Maintained
@@@ -15574,8 -15472,6 +15587,8 @@@ M:   Pan, Xinhui <[email protected]
  L:    [email protected]
  S:    Supported
  T:    git https://gitlab.freedesktop.org/agd5f/linux.git
 +B:    https://gitlab.freedesktop.org/drm/amd/-/issues
 +C:    irc://irc.oftc.net/radeon
  F:    drivers/gpu/drm/amd/
  F:    drivers/gpu/drm/radeon/
  F:    include/uapi/drm/amdgpu_drm.h
@@@ -15903,7 -15799,7 +15916,7 @@@ F:   Documentation/devicetree/bindings/i2
  F:    drivers/i2c/busses/i2c-emev2.c
  
  RENESAS ETHERNET DRIVERS
 -R:    Sergei Shtylyov <[email protected]>
 +R:    Sergey Shtylyov <[email protected]>
  L:    [email protected]
  L:    [email protected]
  F:    Documentation/devicetree/bindings/net/renesas,*.yaml
  S:    Maintained
  F:    drivers/phy/renesas/phy-rcar-gen3-usb*.c
  
 +RENESAS RZ/G2L A/D DRIVER
 +M:    Lad Prabhakar <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Supported
 +F:    Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
 +F:    drivers/iio/adc/rzg2l_adc.c
 +
  RESET CONTROLLER FRAMEWORK
  M:    Philipp Zabel <[email protected]>
  S:    Maintained
@@@ -16426,7 -16314,7 +16439,7 @@@ SAMSUNG EXYNOS TRUE RANDOM NUMBER GENER
  M:    Łukasz Stelmach <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.txt
 +F:    Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml
  F:    drivers/char/hw_random/exynos-trng.c
  
  SAMSUNG FRAMEBUFFER DRIVER
@@@ -16519,14 -16407,10 +16532,14 @@@ L:        [email protected]
  S:    Supported
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git
  F:    Documentation/devicetree/bindings/clock/exynos*.txt
 +F:    Documentation/devicetree/bindings/clock/samsung,*.yaml
  F:    Documentation/devicetree/bindings/clock/samsung,s3c*
  F:    Documentation/devicetree/bindings/clock/samsung,s5p*
  F:    drivers/clk/samsung/
  F:    include/dt-bindings/clock/exynos*.h
 +F:    include/dt-bindings/clock/s3c*.h
 +F:    include/dt-bindings/clock/s5p*.h
 +F:    include/dt-bindings/clock/samsung,*.h
  F:    include/linux/clk/samsung.h
  F:    include/linux/platform_data/clk-s3c2410.h
  
@@@ -16568,12 -16452,6 +16581,12 @@@ F: drivers/phy/samsung/phy-s5pv210-usb2
  F:    drivers/phy/samsung/phy-samsung-usb2.c
  F:    drivers/phy/samsung/phy-samsung-usb2.h
  
 +SANCLOUD BEAGLEBONE ENHANCED DEVICE TREE
 +M:    Paul Barker <[email protected]>
 +R:    Marc Murphy <[email protected]>
 +S:    Supported
 +F:    arch/arm/boot/dts/am335x-sancloud*
 +
  SC1200 WDT DRIVER
  M:    Zwane Mwaikambo <[email protected]>
  S:    Maintained
@@@ -16833,12 -16711,6 +16846,12 @@@ F: drivers/iio/chemical/scd30_core.
  F:    drivers/iio/chemical/scd30_i2c.c
  F:    drivers/iio/chemical/scd30_serial.c
  
 +SENSIRION SGP40 GAS SENSOR DRIVER
 +M:    Andreas Klinger <[email protected]>
 +S:    Maintained
 +F:    Documentation/ABI/testing/sysfs-bus-iio-chemical-sgp40
 +F:    drivers/iio/chemical/sgp40.c
 +
  SENSIRION SPS30 AIR POLLUTION SENSOR DRIVER
  M:    Tomasz Duszynski <[email protected]>
  S:    Maintained
@@@ -17417,15 -17289,6 +17430,15 @@@ T: git git://linuxtv.org/media_tree.gi
  F:    Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml
  F:    drivers/media/i2c/imx334.c
  
 +SONY IMX335 SENSOR DRIVER
 +M:    Paul J. Murphy <[email protected]>
 +M:    Daniele Alessandrelli <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://linuxtv.org/media_tree.git
 +F:    Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml
 +F:    drivers/media/i2c/imx335.c
 +
  SONY IMX355 SENSOR DRIVER
  M:    Tianshu Qiu <[email protected]>
  L:    [email protected]
@@@ -17433,15 -17296,6 +17446,15 @@@ S: Maintaine
  T:    git git://linuxtv.org/media_tree.git
  F:    drivers/media/i2c/imx355.c
  
 +SONY IMX412 SENSOR DRIVER
 +M:    Paul J. Murphy <[email protected]>
 +M:    Daniele Alessandrelli <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://linuxtv.org/media_tree.git
 +F:    Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml
 +F:    drivers/media/i2c/imx412.c
 +
  SONY MEMORYSTICK SUBSYSTEM
  M:    Maxim Levitsky <[email protected]>
  M:    Alex Dubov <[email protected]>
@@@ -17761,9 -17615,8 +17774,9 @@@ F:   drivers/staging/olpc_dcon
  
  STAGING - REALTEK RTL8188EU DRIVERS
  M:    Larry Finger <[email protected]>
 -S:    Odd Fixes
 -F:    drivers/staging/rtl8188eu/
 +M:    Phillip Potter <[email protected]>
 +S:    Supported
 +F:    drivers/staging/r8188eu/
  
  STAGING - REALTEK RTL8712U DRIVERS
  M:    Larry Finger <[email protected]>
@@@ -17958,7 -17811,7 +17971,7 @@@ F:   include/linux/sync_file.
  F:    include/uapi/linux/sync_file.h
  
  SYNOPSYS ARC ARCHITECTURE
 -M:    Vineet Gupta <vgupta@synopsys.com>
 +M:    Vineet Gupta <vgupta@kernel.org>
  L:    [email protected]
  S:    Supported
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git
@@@ -18100,7 -17953,6 +18113,7 @@@ F:   drivers/regulator/scmi-regulator.
  F:    drivers/reset/reset-scmi.c
  F:    include/linux/sc[mp]i_protocol.h
  F:    include/trace/events/scmi.h
 +F:    include/uapi/linux/virtio_scmi.h
  
  SYSTEM RESET/SHUTDOWN DRIVERS
  M:    Sebastian Reichel <[email protected]>
@@@ -18951,14 -18803,6 +18964,14 @@@ F: arch/x86/mm/testmmiotrace.
  F:    include/linux/mmiotrace.h
  F:    kernel/trace/trace_mmiotrace.c
  
 +TRADITIONAL CHINESE DOCUMENTATION
 +M:    Hu Haowen <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +W:    https://github.com/srcres258/linux-doc
 +T:    git git://github.com/srcres258/linux-doc.git doc-zh-tw
 +F:    Documentation/translations/zh_TW/
 +
  TRIVIAL PATCHES
  M:    Jiri Kosina <[email protected]>
  S:    Maintained
@@@ -19283,7 -19127,7 +19296,7 @@@ M:   Mauro Carvalho Chehab <mchehab@kerne
  L:    [email protected]
  S:    Maintained
  F:    Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml
 -F:    drivers/phy/hisilicon/phy-kirin970-usb3.c
 +F:    drivers/phy/hisilicon/phy-hi3670-usb3.c
  
  USB ISP116X DRIVER
  M:    Olav Kongas <[email protected]>
@@@ -19618,7 -19462,6 +19631,7 @@@ T:   git git://github.com/awilliam/linux-
  F:    Documentation/driver-api/vfio.rst
  F:    drivers/vfio/
  F:    include/linux/vfio.h
 +F:    include/linux/vfio_pci_core.h
  F:    include/uapi/linux/vfio.h
  
  VFIO FSL-MC DRIVER
@@@ -19869,15 -19712,6 +19882,15 @@@ S: Maintaine
  F:    include/uapi/linux/virtio_snd.h
  F:    sound/virtio/*
  
 +VIRTIO I2C DRIVER
 +M:    Jie Deng <[email protected]>
 +M:    Viresh Kumar <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/i2c/busses/i2c-virtio.c
 +F:    include/uapi/linux/virtio_i2c.h
 +
  VIRTUAL BOX GUEST DEVICE DRIVER
  M:    Hans de Goede <[email protected]>
  M:    Arnd Bergmann <[email protected]>
  S:    Supported
  F:    drivers/ptp/ptp_vmw.c
  
 +VMWARE VMCI DRIVER
 +M:    Jorgen Hansen <[email protected]>
 +M:    Vishnu Dasa <[email protected]>
 +L:    [email protected]
 +L:    [email protected] (private)
 +S:    Maintained
 +F:    drivers/misc/vmw_vmci/
 +
  VMWARE VMMOUSE SUBDRIVER
  M:    "VMware Graphics" <[email protected]>
  M:    "VMware, Inc." <[email protected]>
@@@ -20179,8 -20005,7 +20192,8 @@@ F:   Documentation/devicetree/bindings/ex
  F:    Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
  F:    Documentation/devicetree/bindings/mfd/wm831x.txt
  F:    Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
 -F:    Documentation/devicetree/bindings/sound/wlf,arizona.yaml
 +F:    Documentation/devicetree/bindings/sound/wlf,*.yaml
 +F:    Documentation/devicetree/bindings/sound/wm*
  F:    Documentation/hwmon/wm83??.rst
  F:    arch/arm/mach-s3c/mach-crag6410*
  F:    drivers/clk/clk-wm83*.c
index dfb2fbf5a414bbbdd86016fcbe81e4b908cb95a0,1933045da95de6daf2558826e595b282e4d30f49..409cf827970cfa3f431d69288459e3f323c306e5
@@@ -14,7 -14,7 +14,7 @@@
  #include <dt-bindings/reset-controller/mt8183-resets.h>
  #include <dt-bindings/phy/phy.h>
  #include <dt-bindings/thermal/thermal.h>
- #include "mt8183-pinfunc.h"
+ #include <dt-bindings/pinctrl/mt8183-pinfunc.h>
  
  / {
        compatible = "mediatek,mt8183";
                        reg = <0 0x14016000 0 0x1000>;
                        interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_LOW>;
                        power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
 +                      mediatek,gce-events = <CMDQ_EVENT_MUTEX_STREAM_DONE0>,
 +                                            <CMDQ_EVENT_MUTEX_STREAM_DONE1>;
                };
  
                larb0: larb@14017000 {
index 8b34d2c308c74eb672997638494df27af5d3f040,8440c722f6f879d52312a555aaa6cef7565181c4..6e6fefeb21ead5664530f4762e51eff7d7490dbb
@@@ -395,8 -395,8 +395,8 @@@ static void bcm2835_gpio_irq_handle_ban
        events &= pc->enabled_irq_map[bank];
        for_each_set_bit(offset, &events, 32) {
                gpio = (32 * bank) + offset;
 -              generic_handle_irq(irq_linear_revmap(pc->gpio_chip.irq.domain,
 -                                                   gpio));
 +              generic_handle_domain_irq(pc->gpio_chip.irq.domain,
 +                                        gpio);
        }
  }
  
@@@ -416,8 -416,7 +416,7 @@@ static void bcm2835_gpio_irq_handler(st
                }
        }
        /* This should not happen, every IRQ has a bank */
-       if (i == BCM2835_NUM_IRQS)
-               BUG();
+       BUG_ON(i == BCM2835_NUM_IRQS);
  
        chained_irq_enter(host_chip, desc);
  
index ce9cc719c3954b2b9a17296b25fa842c2c8d9cc3,cf4cc8f129f44cc3ab433e8073a17919dba642a8..2712f51eb238124415b13d3efeb00458923e2c21
@@@ -104,6 -104,7 +104,7 @@@ enum jz_version 
        ID_X1500,
        ID_X1830,
        ID_X2000,
+       ID_X2100,
  };
  
  struct ingenic_chip_info {
@@@ -589,6 -590,18 +590,18 @@@ static int jz4755_uart0_data_pins[] = 
  static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
  static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
  static int jz4755_uart2_data_pins[] = { 0x9f, };
+ static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
+ static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
+ static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
+ static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
+ static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
+ static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
+ static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
+ static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
+ static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
+ static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
+ static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
+ static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
  static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
  static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
  static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
@@@ -630,6 -643,18 +643,18 @@@ static const struct group_desc jz4755_g
        INGENIC_PIN_GROUP("uart0-hwflow", jz4755_uart0_hwflow, 0),
        INGENIC_PIN_GROUP("uart1-data", jz4755_uart1_data, 0),
        INGENIC_PIN_GROUP("uart2-data", jz4755_uart2_data, 1),
+       INGENIC_PIN_GROUP("ssi-dt-b", jz4755_ssi_dt_b, 0),
+       INGENIC_PIN_GROUP("ssi-dt-f", jz4755_ssi_dt_f, 0),
+       INGENIC_PIN_GROUP("ssi-dr-b", jz4755_ssi_dr_b, 0),
+       INGENIC_PIN_GROUP("ssi-dr-f", jz4755_ssi_dr_f, 0),
+       INGENIC_PIN_GROUP("ssi-clk-b", jz4755_ssi_clk_b, 0),
+       INGENIC_PIN_GROUP("ssi-clk-f", jz4755_ssi_clk_f, 0),
+       INGENIC_PIN_GROUP("ssi-gpc-b", jz4755_ssi_gpc_b, 0),
+       INGENIC_PIN_GROUP("ssi-gpc-f", jz4755_ssi_gpc_f, 0),
+       INGENIC_PIN_GROUP("ssi-ce0-b", jz4755_ssi_ce0_b, 0),
+       INGENIC_PIN_GROUP("ssi-ce0-f", jz4755_ssi_ce0_f, 0),
+       INGENIC_PIN_GROUP("ssi-ce1-b", jz4755_ssi_ce1_b, 0),
+       INGENIC_PIN_GROUP("ssi-ce1-f", jz4755_ssi_ce1_f, 0),
        INGENIC_PIN_GROUP_FUNCS("mmc0-1bit", jz4755_mmc0_1bit,
                                jz4755_mmc0_1bit_funcs),
        INGENIC_PIN_GROUP_FUNCS("mmc0-4bit", jz4755_mmc0_4bit,
  static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
  static const char *jz4755_uart1_groups[] = { "uart1-data", };
  static const char *jz4755_uart2_groups[] = { "uart2-data", };
+ static const char *jz4755_ssi_groups[] = {
+       "ssi-dt-b", "ssi-dt-f",
+       "ssi-dr-b", "ssi-dr-f",
+       "ssi-clk-b", "ssi-clk-f",
+       "ssi-gpc-b", "ssi-gpc-f",
+       "ssi-ce0-b", "ssi-ce0-f",
+       "ssi-ce1-b", "ssi-ce1-f",
+ };
  static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
  static const char *jz4755_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
  static const char *jz4755_i2c_groups[] = { "i2c-data", };
@@@ -683,6 -716,7 +716,7 @@@ static const struct function_desc jz475
        { "uart0", jz4755_uart0_groups, ARRAY_SIZE(jz4755_uart0_groups), },
        { "uart1", jz4755_uart1_groups, ARRAY_SIZE(jz4755_uart1_groups), },
        { "uart2", jz4755_uart2_groups, ARRAY_SIZE(jz4755_uart2_groups), },
+       { "ssi", jz4755_ssi_groups, ARRAY_SIZE(jz4755_ssi_groups), },
        { "mmc0", jz4755_mmc0_groups, ARRAY_SIZE(jz4755_mmc0_groups), },
        { "mmc1", jz4755_mmc1_groups, ARRAY_SIZE(jz4755_mmc1_groups), },
        { "i2c", jz4755_i2c_groups, ARRAY_SIZE(jz4755_i2c_groups), },
@@@ -710,7 -744,7 +744,7 @@@ static const struct ingenic_chip_info j
  };
  
  static const u32 jz4760_pull_ups[6] = {
-       0xffffffff, 0xfffcf3ff, 0xffffffff, 0xffffcfff, 0xfffffb7c, 0xfffff00f,
+       0xffffffff, 0xfffcf3ff, 0xffffffff, 0xffffcfff, 0xfffffb7c, 0x0000000f,
  };
  
  static const u32 jz4760_pull_downs[6] = {
@@@ -725,6 -759,58 +759,58 @@@ static int jz4760_uart2_data_pins[] = 
  static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
  static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
  static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
+ static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
+ static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
+ static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
+ static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
+ static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
+ static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
+ static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
+ static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
+ static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
+ static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
+ static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
+ static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
+ static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
+ static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
+ static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
+ static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
+ static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
+ static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
+ static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
+ static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
+ static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
+ static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
+ static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
+ static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
+ static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
+ static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
+ static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
+ static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
+ static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
+ static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
+ static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
+ static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
+ static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
+ static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
+ static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
+ static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
+ static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
+ static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
+ static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
+ static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
+ static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
+ static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
+ static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
+ static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
+ static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
+ static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
+ static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
+ static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
+ static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
+ static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
+ static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
+ static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
  static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
  static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
  static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
@@@ -801,6 -887,58 +887,58 @@@ static const struct group_desc jz4760_g
        INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4760_uart3_data,
                                jz4760_uart3_data_funcs),
        INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow, 0),
+       INGENIC_PIN_GROUP("ssi0-dt-a", jz4760_ssi0_dt_a, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-b", jz4760_ssi0_dt_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-d", jz4760_ssi0_dt_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-e", jz4760_ssi0_dt_e, 0),
+       INGENIC_PIN_GROUP("ssi0-dr-a", jz4760_ssi0_dr_a, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-b", jz4760_ssi0_dr_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-d", jz4760_ssi0_dr_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-e", jz4760_ssi0_dr_e, 0),
+       INGENIC_PIN_GROUP("ssi0-clk-a", jz4760_ssi0_clk_a, 2),
+       INGENIC_PIN_GROUP("ssi0-clk-b", jz4760_ssi0_clk_b, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-d", jz4760_ssi0_clk_d, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-e", jz4760_ssi0_clk_e, 0),
+       INGENIC_PIN_GROUP("ssi0-gpc-b", jz4760_ssi0_gpc_b, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-d", jz4760_ssi0_gpc_d, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-e", jz4760_ssi0_gpc_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce0-a", jz4760_ssi0_ce0_a, 2),
+       INGENIC_PIN_GROUP("ssi0-ce0-b", jz4760_ssi0_ce0_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-d", jz4760_ssi0_ce0_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-e", jz4760_ssi0_ce0_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce1-b", jz4760_ssi0_ce1_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-d", jz4760_ssi0_ce1_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-e", jz4760_ssi0_ce1_e, 0),
+       INGENIC_PIN_GROUP("ssi1-dt-b-9", jz4760_ssi1_dt_b_9, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-b-21", jz4760_ssi1_dt_b_21, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-d-12", jz4760_ssi1_dt_d_12, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-d-21", jz4760_ssi1_dt_d_21, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-e", jz4760_ssi1_dt_e, 1),
+       INGENIC_PIN_GROUP("ssi1-dt-f", jz4760_ssi1_dt_f, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-b-6", jz4760_ssi1_dr_b_6, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-b-20", jz4760_ssi1_dr_b_20, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d-13", jz4760_ssi1_dr_d_13, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d-20", jz4760_ssi1_dr_d_20, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-e", jz4760_ssi1_dr_e, 1),
+       INGENIC_PIN_GROUP("ssi1-dr-f", jz4760_ssi1_dr_f, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-b-7", jz4760_ssi1_clk_b_7, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-b-28", jz4760_ssi1_clk_b_28, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-d", jz4760_ssi1_clk_d, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-e-7", jz4760_ssi1_clk_e_7, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-e-15", jz4760_ssi1_clk_e_15, 1),
+       INGENIC_PIN_GROUP("ssi1-clk-f", jz4760_ssi1_clk_f, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-b", jz4760_ssi1_gpc_b, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-d", jz4760_ssi1_gpc_d, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-e", jz4760_ssi1_gpc_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce0-b-8", jz4760_ssi1_ce0_b_8, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-b-29", jz4760_ssi1_ce0_b_29, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-d", jz4760_ssi1_ce0_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-e-6", jz4760_ssi1_ce0_e_6, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-e-16", jz4760_ssi1_ce0_e_16, 1),
+       INGENIC_PIN_GROUP("ssi1-ce0-f", jz4760_ssi1_ce0_f, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-b", jz4760_ssi1_ce1_b, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-d", jz4760_ssi1_ce1_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-e", jz4760_ssi1_ce1_e, 1),
        INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4760_mmc0_1bit_a,
                                jz4760_mmc0_1bit_a_funcs),
        INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a, 1),
@@@ -854,6 -992,22 +992,22 @@@ static const char *jz4760_uart0_groups[
  static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
  static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
  static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
+ static const char *jz4760_ssi0_groups[] = {
+       "ssi0-dt-a", "ssi0-dt-b", "ssi0-dt-d", "ssi0-dt-e",
+       "ssi0-dr-a", "ssi0-dr-b", "ssi0-dr-d", "ssi0-dr-e",
+       "ssi0-clk-a", "ssi0-clk-b", "ssi0-clk-d", "ssi0-clk-e",
+       "ssi0-gpc-b", "ssi0-gpc-d", "ssi0-gpc-e",
+       "ssi0-ce0-a", "ssi0-ce0-b", "ssi0-ce0-d", "ssi0-ce0-e",
+       "ssi0-ce1-b", "ssi0-ce1-d", "ssi0-ce1-e",
+ };
+ static const char *jz4760_ssi1_groups[] = {
+       "ssi1-dt-b-9", "ssi1-dt-b-21", "ssi1-dt-d-12", "ssi1-dt-d-21", "ssi1-dt-e", "ssi1-dt-f",
+       "ssi1-dr-b-6", "ssi1-dr-b-20", "ssi1-dr-d-13", "ssi1-dr-d-20", "ssi1-dr-e", "ssi1-dr-f",
+       "ssi1-clk-b-7", "ssi1-clk-b-28", "ssi1-clk-d", "ssi1-clk-e-7", "ssi1-clk-e-15", "ssi1-clk-f",
+       "ssi1-gpc-b", "ssi1-gpc-d", "ssi1-gpc-e",
+       "ssi1-ce0-b-8", "ssi1-ce0-b-29", "ssi1-ce0-d", "ssi1-ce0-e-6", "ssi1-ce0-e-16", "ssi1-ce0-f",
+       "ssi1-ce1-b", "ssi1-ce1-d", "ssi1-ce1-e",
+ };
  static const char *jz4760_mmc0_groups[] = {
        "mmc0-1bit-a", "mmc0-4bit-a",
        "mmc0-1bit-e", "mmc0-4bit-e", "mmc0-8bit-e",
@@@ -898,6 -1052,8 +1052,8 @@@ static const struct function_desc jz476
        { "uart1", jz4760_uart1_groups, ARRAY_SIZE(jz4760_uart1_groups), },
        { "uart2", jz4760_uart2_groups, ARRAY_SIZE(jz4760_uart2_groups), },
        { "uart3", jz4760_uart3_groups, ARRAY_SIZE(jz4760_uart3_groups), },
+       { "ssi0", jz4760_ssi0_groups, ARRAY_SIZE(jz4760_ssi0_groups), },
+       { "ssi1", jz4760_ssi1_groups, ARRAY_SIZE(jz4760_ssi1_groups), },
        { "mmc0", jz4760_mmc0_groups, ARRAY_SIZE(jz4760_mmc0_groups), },
        { "mmc1", jz4760_mmc1_groups, ARRAY_SIZE(jz4760_mmc1_groups), },
        { "mmc2", jz4760_mmc2_groups, ARRAY_SIZE(jz4760_mmc2_groups), },
@@@ -936,11 -1092,11 +1092,11 @@@ static const struct ingenic_chip_info j
  };
  
  static const u32 jz4770_pull_ups[6] = {
-       0x3fffffff, 0xfff0030c, 0xffffffff, 0xffff4fff, 0xfffffb7c, 0xffa7f00f,
+       0x3fffffff, 0xfff0f3fc, 0xffffffff, 0xffff4fff, 0xfffffb7c, 0x0024f00f,
  };
  
  static const u32 jz4770_pull_downs[6] = {
-       0x00000000, 0x000f0c03, 0x00000000, 0x0000b000, 0x00000483, 0x00580ff0,
+       0x00000000, 0x000f0c03, 0x00000000, 0x0000b000, 0x00000483, 0x005b0ff0,
  };
  
  static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };
@@@ -1827,7 -1983,9 +1983,9 @@@ static int x1000_uart1_data_d_pins[] = 
  static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
  static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
  static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
- static int x1000_sfc_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, 0x1a, 0x1b, };
+ static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
+ static int x1000_sfc_clk_pins[] = { 0x1a, };
+ static int x1000_sfc_ce_pins[] = { 0x1b, };
  static int x1000_ssi_dt_a_22_pins[] = { 0x16, };
  static int x1000_ssi_dt_a_29_pins[] = { 0x1d, };
  static int x1000_ssi_dt_d_pins[] = { 0x62, };
@@@ -1871,8 -2029,8 +2029,8 @@@ static int x1000_i2s_data_tx_pins[] = 
  static int x1000_i2s_data_rx_pins[] = { 0x23, };
  static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
  static int x1000_i2s_sysclk_pins[] = { 0x20, };
- static int x1000_dmic0_pins[] = { 0x35, 0x36, };
- static int x1000_dmic1_pins[] = { 0x25, };
+ static int x1000_dmic_if0_pins[] = { 0x35, 0x36, };
+ static int x1000_dmic_if1_pins[] = { 0x25, };
  static int x1000_cim_pins[] = {
        0x08, 0x09, 0x0a, 0x0b,
        0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c,
@@@ -1901,7 -2059,9 +2059,9 @@@ static const struct group_desc x1000_gr
        INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow, 1),
        INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a, 2),
        INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d, 0),
-       INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+       INGENIC_PIN_GROUP("sfc-data", x1000_sfc_data, 1),
+       INGENIC_PIN_GROUP("sfc-clk", x1000_sfc_clk, 1),
+       INGENIC_PIN_GROUP("sfc-ce", x1000_sfc_ce, 1),
        INGENIC_PIN_GROUP("ssi-dt-a-22", x1000_ssi_dt_a_22, 2),
        INGENIC_PIN_GROUP("ssi-dt-a-29", x1000_ssi_dt_a_29, 2),
        INGENIC_PIN_GROUP("ssi-dt-d", x1000_ssi_dt_d, 0),
        INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx, 1),
        INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx, 1),
        INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk, 1),
-       INGENIC_PIN_GROUP("dmic0", x1000_dmic0, 0),
-       INGENIC_PIN_GROUP("dmic1", x1000_dmic1, 1),
+       INGENIC_PIN_GROUP("dmic-if0", x1000_dmic_if0, 0),
+       INGENIC_PIN_GROUP("dmic-if1", x1000_dmic_if1, 1),
        INGENIC_PIN_GROUP("cim-data", x1000_cim, 2),
        INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit, 1),
        INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit, 1),
@@@ -1956,7 -2116,7 +2116,7 @@@ static const char *x1000_uart1_groups[
        "uart1-data-a", "uart1-data-d", "uart1-hwflow",
  };
  static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
- static const char *x1000_sfc_groups[] = { "sfc", };
+ static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
  static const char *x1000_ssi_groups[] = {
        "ssi-dt-a-22", "ssi-dt-a-29", "ssi-dt-d",
        "ssi-dr-a-23", "ssi-dr-a-28", "ssi-dr-d",
@@@ -1983,7 -2143,7 +2143,7 @@@ static const char *x1000_i2c2_groups[] 
  static const char *x1000_i2s_groups[] = {
        "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-sysclk",
  };
- static const char *x1000_dmic_groups[] = { "dmic0", "dmic1", };
+ static const char *x1000_dmic_groups[] = { "dmic-if0", "dmic-if1", };
  static const char *x1000_cim_groups[] = { "cim-data", };
  static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", };
  static const char *x1000_pwm0_groups[] = { "pwm0", };
@@@ -2048,8 -2208,8 +2208,8 @@@ static int x1500_i2s_data_tx_pins[] = 
  static int x1500_i2s_data_rx_pins[] = { 0x23, };
  static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
  static int x1500_i2s_sysclk_pins[] = { 0x20, };
- static int x1500_dmic0_pins[] = { 0x35, 0x36, };
- static int x1500_dmic1_pins[] = { 0x25, };
+ static int x1500_dmic_if0_pins[] = { 0x35, 0x36, };
+ static int x1500_dmic_if1_pins[] = { 0x25, };
  static int x1500_cim_pins[] = {
        0x08, 0x09, 0x0a, 0x0b,
        0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c,
@@@ -2068,7 -2228,9 +2228,9 @@@ static const struct group_desc x1500_gr
        INGENIC_PIN_GROUP("uart1-hwflow", x1500_uart1_hwflow, 1),
        INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a, 2),
        INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d, 0),
-       INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+       INGENIC_PIN_GROUP("sfc-data", x1000_sfc_data, 1),
+       INGENIC_PIN_GROUP("sfc-clk", x1000_sfc_clk, 1),
+       INGENIC_PIN_GROUP("sfc-ce", x1000_sfc_ce, 1),
        INGENIC_PIN_GROUP("mmc-1bit", x1500_mmc_1bit, 1),
        INGENIC_PIN_GROUP("mmc-4bit", x1500_mmc_4bit, 1),
        INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0, 0),
        INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx, 1),
        INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx, 1),
        INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk, 1),
-       INGENIC_PIN_GROUP("dmic0", x1500_dmic0, 0),
-       INGENIC_PIN_GROUP("dmic1", x1500_dmic1, 1),
+       INGENIC_PIN_GROUP("dmic-if0", x1500_dmic_if0, 0),
+       INGENIC_PIN_GROUP("dmic-if1", x1500_dmic_if1, 1),
        INGENIC_PIN_GROUP("cim-data", x1500_cim, 2),
        INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0, 0),
        INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1, 1),
@@@ -2101,7 -2263,7 +2263,7 @@@ static const char *x1500_i2c2_groups[] 
  static const char *x1500_i2s_groups[] = {
        "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-sysclk",
  };
- static const char *x1500_dmic_groups[] = { "dmic0", "dmic1", };
+ static const char *x1500_dmic_groups[] = { "dmic-if0", "dmic-if1", };
  static const char *x1500_cim_groups[] = { "cim-data", };
  static const char *x1500_pwm0_groups[] = { "pwm0", };
  static const char *x1500_pwm1_groups[] = { "pwm1", };
@@@ -2151,7 -2313,9 +2313,9 @@@ static const u32 x1830_pull_downs[4] = 
  static int x1830_uart0_data_pins[] = { 0x33, 0x36, };
  static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, };
  static int x1830_uart1_data_pins[] = { 0x38, 0x37, };
- static int x1830_sfc_pins[] = { 0x17, 0x18, 0x1a, 0x19, 0x1b, 0x1c, };
+ static int x1830_sfc_data_pins[] = { 0x17, 0x18, 0x1a, 0x19, };
+ static int x1830_sfc_clk_pins[] = { 0x1b, };
+ static int x1830_sfc_ce_pins[] = { 0x1c, };
  static int x1830_ssi0_dt_pins[] = { 0x4c, };
  static int x1830_ssi0_dr_pins[] = { 0x4b, };
  static int x1830_ssi0_clk_pins[] = { 0x4f, };
@@@ -2182,8 -2346,8 +2346,8 @@@ static int x1830_i2s_data_rx_pins[] = 
  static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, };
  static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, };
  static int x1830_i2s_sysclk_pins[] = { 0x57, };
- static int x1830_dmic0_pins[] = { 0x48, 0x59, };
- static int x1830_dmic1_pins[] = { 0x5a, };
+ static int x1830_dmic_if0_pins[] = { 0x48, 0x59, };
+ static int x1830_dmic_if1_pins[] = { 0x5a, };
  static int x1830_lcd_tft_8bit_pins[] = {
        0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
        0x68, 0x73, 0x72, 0x69,
@@@ -2223,7 -2387,9 +2387,9 @@@ static const struct group_desc x1830_gr
        INGENIC_PIN_GROUP("uart0-data", x1830_uart0_data, 0),
        INGENIC_PIN_GROUP("uart0-hwflow", x1830_uart0_hwflow, 0),
        INGENIC_PIN_GROUP("uart1-data", x1830_uart1_data, 0),
-       INGENIC_PIN_GROUP("sfc", x1830_sfc, 1),
+       INGENIC_PIN_GROUP("sfc-data", x1830_sfc_data, 1),
+       INGENIC_PIN_GROUP("sfc-clk", x1830_sfc_clk, 1),
+       INGENIC_PIN_GROUP("sfc-ce", x1830_sfc_ce, 1),
        INGENIC_PIN_GROUP("ssi0-dt", x1830_ssi0_dt, 0),
        INGENIC_PIN_GROUP("ssi0-dr", x1830_ssi0_dr, 0),
        INGENIC_PIN_GROUP("ssi0-clk", x1830_ssi0_clk, 0),
        INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx, 0),
        INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx, 0),
        INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk, 0),
-       INGENIC_PIN_GROUP("dmic0", x1830_dmic0, 2),
-       INGENIC_PIN_GROUP("dmic1", x1830_dmic1, 2),
+       INGENIC_PIN_GROUP("dmic-if0", x1830_dmic_if0, 2),
+       INGENIC_PIN_GROUP("dmic-if1", x1830_dmic_if1, 2),
        INGENIC_PIN_GROUP("lcd-tft-8bit", x1830_lcd_tft_8bit, 0),
        INGENIC_PIN_GROUP("lcd-tft-24bit", x1830_lcd_tft_24bit, 0),
        INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit, 1),
  
  static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
  static const char *x1830_uart1_groups[] = { "uart1-data", };
- static const char *x1830_sfc_groups[] = { "sfc", };
+ static const char *x1830_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
  static const char *x1830_ssi0_groups[] = {
        "ssi0-dt", "ssi0-dr", "ssi0-clk", "ssi0-gpc", "ssi0-ce0", "ssi0-ce1",
  };
@@@ -2301,7 -2467,7 +2467,7 @@@ static const char *x1830_i2c2_groups[] 
  static const char *x1830_i2s_groups[] = {
        "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-clk-rx", "i2s-sysclk",
  };
- static const char *x1830_dmic_groups[] = { "dmic0", "dmic1", };
+ static const char *x1830_dmic_groups[] = { "dmic-if0", "dmic-if1", };
  static const char *x1830_lcd_groups[] = {
        "lcd-tft-8bit", "lcd-tft-24bit", "lcd-slcd-8bit", "lcd-slcd-16bit",
  };
@@@ -2381,17 -2547,21 +2547,21 @@@ static int x2000_uart7_data_a_pins[] = 
  static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, };
  static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, };
  static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, };
- static int x2000_sfc0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, 0x71, 0x72, };
- static int x2000_sfc0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, 0x90, 0x91, };
- static int x2000_sfc1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
+ static int x2000_sfc_data_if0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, };
+ static int x2000_sfc_data_if0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, };
+ static int x2000_sfc_data_if1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
+ static int x2000_sfc_clk_d_pins[] = { 0x71, };
+ static int x2000_sfc_clk_e_pins[] = { 0x90, };
+ static int x2000_sfc_ce_d_pins[] = { 0x72, };
+ static int x2000_sfc_ce_e_pins[] = { 0x91, };
  static int x2000_ssi0_dt_b_pins[] = { 0x3e, };
  static int x2000_ssi0_dt_d_pins[] = { 0x69, };
  static int x2000_ssi0_dr_b_pins[] = { 0x3d, };
  static int x2000_ssi0_dr_d_pins[] = { 0x6a, };
  static int x2000_ssi0_clk_b_pins[] = { 0x3f, };
  static int x2000_ssi0_clk_d_pins[] = { 0x68, };
- static int x2000_ssi0_ce0_b_pins[] = { 0x3c, };
- static int x2000_ssi0_ce0_d_pins[] = { 0x6d, };
+ static int x2000_ssi0_ce_b_pins[] = { 0x3c, };
+ static int x2000_ssi0_ce_d_pins[] = { 0x6d, };
  static int x2000_ssi1_dt_c_pins[] = { 0x4b, };
  static int x2000_ssi1_dt_d_pins[] = { 0x72, };
  static int x2000_ssi1_dt_e_pins[] = { 0x91, };
@@@ -2401,9 -2571,9 +2571,9 @@@ static int x2000_ssi1_dr_e_pins[] = { 0
  static int x2000_ssi1_clk_c_pins[] = { 0x4c, };
  static int x2000_ssi1_clk_d_pins[] = { 0x71, };
  static int x2000_ssi1_clk_e_pins[] = { 0x90, };
- static int x2000_ssi1_ce0_c_pins[] = { 0x49, };
- static int x2000_ssi1_ce0_d_pins[] = { 0x76, };
- static int x2000_ssi1_ce0_e_pins[] = { 0x95, };
+ static int x2000_ssi1_ce_c_pins[] = { 0x49, };
+ static int x2000_ssi1_ce_d_pins[] = { 0x76, };
+ static int x2000_ssi1_ce_e_pins[] = { 0x95, };
  static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, };
  static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, };
  static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
@@@ -2455,10 -2625,10 +2625,10 @@@ static int x2000_i2s3_data_tx2_pins[] 
  static int x2000_i2s3_data_tx3_pins[] = { 0x06, };
  static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, };
  static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, };
- static int x2000_dmic0_pins[] = { 0x54, 0x55, };
- static int x2000_dmic1_pins[] = { 0x56, };
- static int x2000_dmic2_pins[] = { 0x57, };
- static int x2000_dmic3_pins[] = { 0x58, };
+ static int x2000_dmic_if0_pins[] = { 0x54, 0x55, };
+ static int x2000_dmic_if1_pins[] = { 0x56, };
+ static int x2000_dmic_if2_pins[] = { 0x57, };
+ static int x2000_dmic_if3_pins[] = { 0x58, };
  static int x2000_cim_8bit_pins[] = {
        0x0e, 0x0c, 0x0d, 0x4f,
        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@@ -2545,17 -2715,21 +2715,21 @@@ static const struct group_desc x2000_gr
        INGENIC_PIN_GROUP("uart7-data-c", x2000_uart7_data_c, 3),
        INGENIC_PIN_GROUP("uart8-data", x2000_uart8_data, 3),
        INGENIC_PIN_GROUP("uart9-data", x2000_uart9_data, 3),
-       INGENIC_PIN_GROUP("sfc0-d", x2000_sfc0_d, 1),
-       INGENIC_PIN_GROUP("sfc0-e", x2000_sfc0_e, 0),
-       INGENIC_PIN_GROUP("sfc1", x2000_sfc1, 1),
+       INGENIC_PIN_GROUP("sfc-data-if0-d", x2000_sfc_data_if0_d, 1),
+       INGENIC_PIN_GROUP("sfc-data-if0-e", x2000_sfc_data_if0_e, 0),
+       INGENIC_PIN_GROUP("sfc-data-if1", x2000_sfc_data_if1, 1),
+       INGENIC_PIN_GROUP("sfc-clk-d", x2000_sfc_clk_d, 1),
+       INGENIC_PIN_GROUP("sfc-clk-e", x2000_sfc_clk_e, 0),
+       INGENIC_PIN_GROUP("sfc-ce-d", x2000_sfc_ce_d, 1),
+       INGENIC_PIN_GROUP("sfc-ce-e", x2000_sfc_ce_e, 0),
        INGENIC_PIN_GROUP("ssi0-dt-b", x2000_ssi0_dt_b, 1),
        INGENIC_PIN_GROUP("ssi0-dt-d", x2000_ssi0_dt_d, 1),
        INGENIC_PIN_GROUP("ssi0-dr-b", x2000_ssi0_dr_b, 1),
        INGENIC_PIN_GROUP("ssi0-dr-d", x2000_ssi0_dr_d, 1),
        INGENIC_PIN_GROUP("ssi0-clk-b", x2000_ssi0_clk_b, 1),
        INGENIC_PIN_GROUP("ssi0-clk-d", x2000_ssi0_clk_d, 1),
-       INGENIC_PIN_GROUP("ssi0-ce0-b", x2000_ssi0_ce0_b, 1),
-       INGENIC_PIN_GROUP("ssi0-ce0-d", x2000_ssi0_ce0_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce-b", x2000_ssi0_ce_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce-d", x2000_ssi0_ce_d, 1),
        INGENIC_PIN_GROUP("ssi1-dt-c", x2000_ssi1_dt_c, 2),
        INGENIC_PIN_GROUP("ssi1-dt-d", x2000_ssi1_dt_d, 2),
        INGENIC_PIN_GROUP("ssi1-dt-e", x2000_ssi1_dt_e, 1),
        INGENIC_PIN_GROUP("ssi1-clk-c", x2000_ssi1_clk_c, 2),
        INGENIC_PIN_GROUP("ssi1-clk-d", x2000_ssi1_clk_d, 2),
        INGENIC_PIN_GROUP("ssi1-clk-e", x2000_ssi1_clk_e, 1),
-       INGENIC_PIN_GROUP("ssi1-ce0-c", x2000_ssi1_ce0_c, 2),
-       INGENIC_PIN_GROUP("ssi1-ce0-d", x2000_ssi1_ce0_d, 2),
-       INGENIC_PIN_GROUP("ssi1-ce0-e", x2000_ssi1_ce0_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce-c", x2000_ssi1_ce_c, 2),
+       INGENIC_PIN_GROUP("ssi1-ce-d", x2000_ssi1_ce_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce-e", x2000_ssi1_ce_e, 1),
        INGENIC_PIN_GROUP("mmc0-1bit", x2000_mmc0_1bit, 0),
        INGENIC_PIN_GROUP("mmc0-4bit", x2000_mmc0_4bit, 0),
        INGENIC_PIN_GROUP("mmc0-8bit", x2000_mmc0_8bit, 0),
        INGENIC_PIN_GROUP("i2s3-data-tx3", x2000_i2s3_data_tx3, 2),
        INGENIC_PIN_GROUP("i2s3-clk-tx", x2000_i2s3_clk_tx, 2),
        INGENIC_PIN_GROUP("i2s3-sysclk-tx", x2000_i2s3_sysclk_tx, 2),
-       INGENIC_PIN_GROUP("dmic0", x2000_dmic0, 0),
-       INGENIC_PIN_GROUP("dmic1", x2000_dmic1, 0),
-       INGENIC_PIN_GROUP("dmic2", x2000_dmic2, 0),
-       INGENIC_PIN_GROUP("dmic3", x2000_dmic3, 0),
+       INGENIC_PIN_GROUP("dmic-if0", x2000_dmic_if0, 0),
+       INGENIC_PIN_GROUP("dmic-if1", x2000_dmic_if1, 0),
+       INGENIC_PIN_GROUP("dmic-if2", x2000_dmic_if2, 0),
+       INGENIC_PIN_GROUP("dmic-if3", x2000_dmic_if3, 0),
        INGENIC_PIN_GROUP_FUNCS("cim-data-8bit", x2000_cim_8bit,
                                x2000_cim_8bit_funcs),
        INGENIC_PIN_GROUP("cim-data-12bit", x2000_cim_12bit, 0),
@@@ -2670,18 -2844,21 +2844,21 @@@ static const char *x2000_uart6_groups[
  static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", };
  static const char *x2000_uart8_groups[] = { "uart8-data", };
  static const char *x2000_uart9_groups[] = { "uart9-data", };
- static const char *x2000_sfc_groups[] = { "sfc0-d", "sfc0-e", "sfc1", };
+ static const char *x2000_sfc_groups[] = {
+       "sfc-data-if0-d", "sfc-data-if0-e", "sfc-data-if1",
+       "sfc-clk-d", "sfc-clk-e", "sfc-ce-d", "sfc-ce-e",
+ };
  static const char *x2000_ssi0_groups[] = {
        "ssi0-dt-b", "ssi0-dt-d",
        "ssi0-dr-b", "ssi0-dr-d",
        "ssi0-clk-b", "ssi0-clk-d",
-       "ssi0-ce0-b", "ssi0-ce0-d",
+       "ssi0-ce-b", "ssi0-ce-d",
  };
  static const char *x2000_ssi1_groups[] = {
        "ssi1-dt-c", "ssi1-dt-d", "ssi1-dt-e",
        "ssi1-dr-c", "ssi1-dr-d", "ssi1-dr-e",
        "ssi1-clk-c", "ssi1-clk-d", "ssi1-clk-e",
-       "ssi1-ce0-c", "ssi1-ce0-d", "ssi1-ce0-e",
+       "ssi1-ce-c", "ssi1-ce-d", "ssi1-ce-e",
  };
  static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", };
  static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
@@@ -2711,7 -2888,9 +2888,9 @@@ static const char *x2000_i2s3_groups[] 
        "i2s3-data-tx0", "i2s3-data-tx1", "i2s3-data-tx2", "i2s3-data-tx3",
        "i2s3-clk-tx", "i2s3-sysclk-tx",
  };
- static const char *x2000_dmic_groups[] = { "dmic0", "dmic1", "dmic2", "dmic3", };
+ static const char *x2000_dmic_groups[] = {
+       "dmic-if0", "dmic-if1", "dmic-if2", "dmic-if3",
+ };
  static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
  static const char *x2000_lcd_groups[] = {
        "lcd-tft-8bit", "lcd-tft-16bit", "lcd-tft-18bit", "lcd-tft-24bit",
@@@ -2802,6 -2981,216 +2981,216 @@@ static const struct ingenic_chip_info x
        .pull_downs = x2000_pull_downs,
  };
  
+ static const u32 x2100_pull_ups[5] = {
+       0x0003ffff, 0xffffffff, 0x1ff0ffff, 0xc7fe3f3f, 0x0fbf003f,
+ };
+ static const u32 x2100_pull_downs[5] = {
+       0x0003ffff, 0xffffffff, 0x1ff0ffff, 0x00000000, 0x0fbf003f,
+ };
+ static int x2100_mac_pins[] = {
+       0x4b, 0x47, 0x46, 0x4a, 0x43, 0x42, 0x4c, 0x4d, 0x4f, 0x41,
+ };
+ static const struct group_desc x2100_groups[] = {
+       INGENIC_PIN_GROUP("uart0-data", x2000_uart0_data, 2),
+       INGENIC_PIN_GROUP("uart0-hwflow", x2000_uart0_hwflow, 2),
+       INGENIC_PIN_GROUP("uart1-data", x2000_uart1_data, 1),
+       INGENIC_PIN_GROUP("uart1-hwflow", x2000_uart1_hwflow, 1),
+       INGENIC_PIN_GROUP("uart2-data", x2000_uart2_data, 0),
+       INGENIC_PIN_GROUP("uart3-data-c", x2000_uart3_data_c, 0),
+       INGENIC_PIN_GROUP("uart3-data-d", x2000_uart3_data_d, 1),
+       INGENIC_PIN_GROUP("uart3-hwflow-c", x2000_uart3_hwflow_c, 0),
+       INGENIC_PIN_GROUP("uart3-hwflow-d", x2000_uart3_hwflow_d, 1),
+       INGENIC_PIN_GROUP("uart4-data-a", x2000_uart4_data_a, 1),
+       INGENIC_PIN_GROUP("uart4-data-c", x2000_uart4_data_c, 3),
+       INGENIC_PIN_GROUP("uart4-hwflow-a", x2000_uart4_hwflow_a, 1),
+       INGENIC_PIN_GROUP("uart4-hwflow-c", x2000_uart4_hwflow_c, 3),
+       INGENIC_PIN_GROUP("uart5-data-a", x2000_uart5_data_a, 1),
+       INGENIC_PIN_GROUP("uart5-data-c", x2000_uart5_data_c, 3),
+       INGENIC_PIN_GROUP("uart6-data-a", x2000_uart6_data_a, 1),
+       INGENIC_PIN_GROUP("uart6-data-c", x2000_uart6_data_c, 3),
+       INGENIC_PIN_GROUP("uart7-data-a", x2000_uart7_data_a, 1),
+       INGENIC_PIN_GROUP("uart7-data-c", x2000_uart7_data_c, 3),
+       INGENIC_PIN_GROUP("uart8-data", x2000_uart8_data, 3),
+       INGENIC_PIN_GROUP("uart9-data", x2000_uart9_data, 3),
+       INGENIC_PIN_GROUP("sfc-data-if0-d", x2000_sfc_data_if0_d, 1),
+       INGENIC_PIN_GROUP("sfc-data-if0-e", x2000_sfc_data_if0_e, 0),
+       INGENIC_PIN_GROUP("sfc-data-if1", x2000_sfc_data_if1, 1),
+       INGENIC_PIN_GROUP("sfc-clk-d", x2000_sfc_clk_d, 1),
+       INGENIC_PIN_GROUP("sfc-clk-e", x2000_sfc_clk_e, 0),
+       INGENIC_PIN_GROUP("sfc-ce-d", x2000_sfc_ce_d, 1),
+       INGENIC_PIN_GROUP("sfc-ce-e", x2000_sfc_ce_e, 0),
+       INGENIC_PIN_GROUP("ssi0-dt-b", x2000_ssi0_dt_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-d", x2000_ssi0_dt_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-b", x2000_ssi0_dr_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-d", x2000_ssi0_dr_d, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-b", x2000_ssi0_clk_b, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-d", x2000_ssi0_clk_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce-b", x2000_ssi0_ce_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce-d", x2000_ssi0_ce_d, 1),
+       INGENIC_PIN_GROUP("ssi1-dt-c", x2000_ssi1_dt_c, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-d", x2000_ssi1_dt_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-e", x2000_ssi1_dt_e, 1),
+       INGENIC_PIN_GROUP("ssi1-dr-c", x2000_ssi1_dr_c, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d", x2000_ssi1_dr_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-e", x2000_ssi1_dr_e, 1),
+       INGENIC_PIN_GROUP("ssi1-clk-c", x2000_ssi1_clk_c, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-d", x2000_ssi1_clk_d, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-e", x2000_ssi1_clk_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce-c", x2000_ssi1_ce_c, 2),
+       INGENIC_PIN_GROUP("ssi1-ce-d", x2000_ssi1_ce_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce-e", x2000_ssi1_ce_e, 1),
+       INGENIC_PIN_GROUP("mmc0-1bit", x2000_mmc0_1bit, 0),
+       INGENIC_PIN_GROUP("mmc0-4bit", x2000_mmc0_4bit, 0),
+       INGENIC_PIN_GROUP("mmc0-8bit", x2000_mmc0_8bit, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit", x2000_mmc1_1bit, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit", x2000_mmc1_4bit, 0),
+       INGENIC_PIN_GROUP("mmc2-1bit", x2000_mmc2_1bit, 0),
+       INGENIC_PIN_GROUP("mmc2-4bit", x2000_mmc2_4bit, 0),
+       INGENIC_PIN_GROUP("emc-8bit-data", x2000_emc_8bit_data, 0),
+       INGENIC_PIN_GROUP("emc-16bit-data", x2000_emc_16bit_data, 0),
+       INGENIC_PIN_GROUP("emc-addr", x2000_emc_addr, 0),
+       INGENIC_PIN_GROUP("emc-rd-we", x2000_emc_rd_we, 0),
+       INGENIC_PIN_GROUP("emc-wait", x2000_emc_wait, 0),
+       INGENIC_PIN_GROUP("emc-cs1", x2000_emc_cs1, 3),
+       INGENIC_PIN_GROUP("emc-cs2", x2000_emc_cs2, 3),
+       INGENIC_PIN_GROUP("i2c0-data", x2000_i2c0, 3),
+       INGENIC_PIN_GROUP("i2c1-data-c", x2000_i2c1_c, 2),
+       INGENIC_PIN_GROUP("i2c1-data-d", x2000_i2c1_d, 1),
+       INGENIC_PIN_GROUP("i2c2-data-b", x2000_i2c2_b, 2),
+       INGENIC_PIN_GROUP("i2c2-data-d", x2000_i2c2_d, 2),
+       INGENIC_PIN_GROUP("i2c2-data-e", x2000_i2c2_e, 1),
+       INGENIC_PIN_GROUP("i2c3-data-a", x2000_i2c3_a, 0),
+       INGENIC_PIN_GROUP("i2c3-data-d", x2000_i2c3_d, 1),
+       INGENIC_PIN_GROUP("i2c4-data-c", x2000_i2c4_c, 1),
+       INGENIC_PIN_GROUP("i2c4-data-d", x2000_i2c4_d, 2),
+       INGENIC_PIN_GROUP("i2c5-data-c", x2000_i2c5_c, 1),
+       INGENIC_PIN_GROUP("i2c5-data-d", x2000_i2c5_d, 1),
+       INGENIC_PIN_GROUP("i2s1-data-tx", x2000_i2s1_data_tx, 2),
+       INGENIC_PIN_GROUP("i2s1-data-rx", x2000_i2s1_data_rx, 2),
+       INGENIC_PIN_GROUP("i2s1-clk-tx", x2000_i2s1_clk_tx, 2),
+       INGENIC_PIN_GROUP("i2s1-clk-rx", x2000_i2s1_clk_rx, 2),
+       INGENIC_PIN_GROUP("i2s1-sysclk-tx", x2000_i2s1_sysclk_tx, 2),
+       INGENIC_PIN_GROUP("i2s1-sysclk-rx", x2000_i2s1_sysclk_rx, 2),
+       INGENIC_PIN_GROUP("i2s2-data-rx0", x2000_i2s2_data_rx0, 2),
+       INGENIC_PIN_GROUP("i2s2-data-rx1", x2000_i2s2_data_rx1, 2),
+       INGENIC_PIN_GROUP("i2s2-data-rx2", x2000_i2s2_data_rx2, 2),
+       INGENIC_PIN_GROUP("i2s2-data-rx3", x2000_i2s2_data_rx3, 2),
+       INGENIC_PIN_GROUP("i2s2-clk-rx", x2000_i2s2_clk_rx, 2),
+       INGENIC_PIN_GROUP("i2s2-sysclk-rx", x2000_i2s2_sysclk_rx, 2),
+       INGENIC_PIN_GROUP("i2s3-data-tx0", x2000_i2s3_data_tx0, 2),
+       INGENIC_PIN_GROUP("i2s3-data-tx1", x2000_i2s3_data_tx1, 2),
+       INGENIC_PIN_GROUP("i2s3-data-tx2", x2000_i2s3_data_tx2, 2),
+       INGENIC_PIN_GROUP("i2s3-data-tx3", x2000_i2s3_data_tx3, 2),
+       INGENIC_PIN_GROUP("i2s3-clk-tx", x2000_i2s3_clk_tx, 2),
+       INGENIC_PIN_GROUP("i2s3-sysclk-tx", x2000_i2s3_sysclk_tx, 2),
+       INGENIC_PIN_GROUP("dmic-if0", x2000_dmic_if0, 0),
+       INGENIC_PIN_GROUP("dmic-if1", x2000_dmic_if1, 0),
+       INGENIC_PIN_GROUP("dmic-if2", x2000_dmic_if2, 0),
+       INGENIC_PIN_GROUP("dmic-if3", x2000_dmic_if3, 0),
+       INGENIC_PIN_GROUP_FUNCS("cim-data-8bit", x2000_cim_8bit,
+                               x2000_cim_8bit_funcs),
+       INGENIC_PIN_GROUP("cim-data-12bit", x2000_cim_12bit, 0),
+       INGENIC_PIN_GROUP("lcd-tft-8bit", x2000_lcd_tft_8bit, 1),
+       INGENIC_PIN_GROUP("lcd-tft-16bit", x2000_lcd_tft_16bit, 1),
+       INGENIC_PIN_GROUP("lcd-tft-18bit", x2000_lcd_tft_18bit, 1),
+       INGENIC_PIN_GROUP("lcd-tft-24bit", x2000_lcd_tft_24bit, 1),
+       INGENIC_PIN_GROUP("lcd-slcd-8bit", x2000_lcd_slcd_8bit, 2),
+       INGENIC_PIN_GROUP("lcd-slcd-16bit", x2000_lcd_tft_16bit, 2),
+       INGENIC_PIN_GROUP("pwm0-c", x2000_pwm_pwm0_c, 0),
+       INGENIC_PIN_GROUP("pwm0-d", x2000_pwm_pwm0_d, 2),
+       INGENIC_PIN_GROUP("pwm1-c", x2000_pwm_pwm1_c, 0),
+       INGENIC_PIN_GROUP("pwm1-d", x2000_pwm_pwm1_d, 2),
+       INGENIC_PIN_GROUP("pwm2-c", x2000_pwm_pwm2_c, 0),
+       INGENIC_PIN_GROUP("pwm2-e", x2000_pwm_pwm2_e, 1),
+       INGENIC_PIN_GROUP("pwm3-c", x2000_pwm_pwm3_c, 0),
+       INGENIC_PIN_GROUP("pwm3-e", x2000_pwm_pwm3_e, 1),
+       INGENIC_PIN_GROUP("pwm4-c", x2000_pwm_pwm4_c, 0),
+       INGENIC_PIN_GROUP("pwm4-e", x2000_pwm_pwm4_e, 1),
+       INGENIC_PIN_GROUP("pwm5-c", x2000_pwm_pwm5_c, 0),
+       INGENIC_PIN_GROUP("pwm5-e", x2000_pwm_pwm5_e, 1),
+       INGENIC_PIN_GROUP("pwm6-c", x2000_pwm_pwm6_c, 0),
+       INGENIC_PIN_GROUP("pwm6-e", x2000_pwm_pwm6_e, 1),
+       INGENIC_PIN_GROUP("pwm7-c", x2000_pwm_pwm7_c, 0),
+       INGENIC_PIN_GROUP("pwm7-e", x2000_pwm_pwm7_e, 1),
+       INGENIC_PIN_GROUP("pwm8", x2000_pwm_pwm8, 0),
+       INGENIC_PIN_GROUP("pwm9", x2000_pwm_pwm9, 0),
+       INGENIC_PIN_GROUP("pwm10", x2000_pwm_pwm10, 0),
+       INGENIC_PIN_GROUP("pwm11", x2000_pwm_pwm11, 0),
+       INGENIC_PIN_GROUP("pwm12", x2000_pwm_pwm12, 0),
+       INGENIC_PIN_GROUP("pwm13", x2000_pwm_pwm13, 0),
+       INGENIC_PIN_GROUP("pwm14", x2000_pwm_pwm14, 0),
+       INGENIC_PIN_GROUP("pwm15", x2000_pwm_pwm15, 0),
+       INGENIC_PIN_GROUP("mac", x2100_mac, 1),
+ };
+ static const char *x2100_mac_groups[] = { "mac", };
+ static const struct function_desc x2100_functions[] = {
+       { "uart0", x2000_uart0_groups, ARRAY_SIZE(x2000_uart0_groups), },
+       { "uart1", x2000_uart1_groups, ARRAY_SIZE(x2000_uart1_groups), },
+       { "uart2", x2000_uart2_groups, ARRAY_SIZE(x2000_uart2_groups), },
+       { "uart3", x2000_uart3_groups, ARRAY_SIZE(x2000_uart3_groups), },
+       { "uart4", x2000_uart4_groups, ARRAY_SIZE(x2000_uart4_groups), },
+       { "uart5", x2000_uart5_groups, ARRAY_SIZE(x2000_uart5_groups), },
+       { "uart6", x2000_uart6_groups, ARRAY_SIZE(x2000_uart6_groups), },
+       { "uart7", x2000_uart7_groups, ARRAY_SIZE(x2000_uart7_groups), },
+       { "uart8", x2000_uart8_groups, ARRAY_SIZE(x2000_uart8_groups), },
+       { "uart9", x2000_uart9_groups, ARRAY_SIZE(x2000_uart9_groups), },
+       { "sfc", x2000_sfc_groups, ARRAY_SIZE(x2000_sfc_groups), },
+       { "ssi0", x2000_ssi0_groups, ARRAY_SIZE(x2000_ssi0_groups), },
+       { "ssi1", x2000_ssi1_groups, ARRAY_SIZE(x2000_ssi1_groups), },
+       { "mmc0", x2000_mmc0_groups, ARRAY_SIZE(x2000_mmc0_groups), },
+       { "mmc1", x2000_mmc1_groups, ARRAY_SIZE(x2000_mmc1_groups), },
+       { "mmc2", x2000_mmc2_groups, ARRAY_SIZE(x2000_mmc2_groups), },
+       { "emc", x2000_emc_groups, ARRAY_SIZE(x2000_emc_groups), },
+       { "emc-cs1", x2000_cs1_groups, ARRAY_SIZE(x2000_cs1_groups), },
+       { "emc-cs2", x2000_cs2_groups, ARRAY_SIZE(x2000_cs2_groups), },
+       { "i2c0", x2000_i2c0_groups, ARRAY_SIZE(x2000_i2c0_groups), },
+       { "i2c1", x2000_i2c1_groups, ARRAY_SIZE(x2000_i2c1_groups), },
+       { "i2c2", x2000_i2c2_groups, ARRAY_SIZE(x2000_i2c2_groups), },
+       { "i2c3", x2000_i2c3_groups, ARRAY_SIZE(x2000_i2c3_groups), },
+       { "i2c4", x2000_i2c4_groups, ARRAY_SIZE(x2000_i2c4_groups), },
+       { "i2c5", x2000_i2c5_groups, ARRAY_SIZE(x2000_i2c5_groups), },
+       { "i2s1", x2000_i2s1_groups, ARRAY_SIZE(x2000_i2s1_groups), },
+       { "i2s2", x2000_i2s2_groups, ARRAY_SIZE(x2000_i2s2_groups), },
+       { "i2s3", x2000_i2s3_groups, ARRAY_SIZE(x2000_i2s3_groups), },
+       { "dmic", x2000_dmic_groups, ARRAY_SIZE(x2000_dmic_groups), },
+       { "cim", x2000_cim_groups, ARRAY_SIZE(x2000_cim_groups), },
+       { "lcd", x2000_lcd_groups, ARRAY_SIZE(x2000_lcd_groups), },
+       { "pwm0", x2000_pwm0_groups, ARRAY_SIZE(x2000_pwm0_groups), },
+       { "pwm1", x2000_pwm1_groups, ARRAY_SIZE(x2000_pwm1_groups), },
+       { "pwm2", x2000_pwm2_groups, ARRAY_SIZE(x2000_pwm2_groups), },
+       { "pwm3", x2000_pwm3_groups, ARRAY_SIZE(x2000_pwm3_groups), },
+       { "pwm4", x2000_pwm4_groups, ARRAY_SIZE(x2000_pwm4_groups), },
+       { "pwm5", x2000_pwm5_groups, ARRAY_SIZE(x2000_pwm5_groups), },
+       { "pwm6", x2000_pwm6_groups, ARRAY_SIZE(x2000_pwm6_groups), },
+       { "pwm7", x2000_pwm7_groups, ARRAY_SIZE(x2000_pwm7_groups), },
+       { "pwm8", x2000_pwm8_groups, ARRAY_SIZE(x2000_pwm8_groups), },
+       { "pwm9", x2000_pwm9_groups, ARRAY_SIZE(x2000_pwm9_groups), },
+       { "pwm10", x2000_pwm10_groups, ARRAY_SIZE(x2000_pwm10_groups), },
+       { "pwm11", x2000_pwm11_groups, ARRAY_SIZE(x2000_pwm11_groups), },
+       { "pwm12", x2000_pwm12_groups, ARRAY_SIZE(x2000_pwm12_groups), },
+       { "pwm13", x2000_pwm13_groups, ARRAY_SIZE(x2000_pwm13_groups), },
+       { "pwm14", x2000_pwm14_groups, ARRAY_SIZE(x2000_pwm14_groups), },
+       { "pwm15", x2000_pwm15_groups, ARRAY_SIZE(x2000_pwm15_groups), },
+       { "mac", x2100_mac_groups, ARRAY_SIZE(x2100_mac_groups), },
+ };
+ static const struct ingenic_chip_info x2100_chip_info = {
+       .num_chips = 5,
+       .reg_offset = 0x100,
+       .version = ID_X2100,
+       .groups = x2100_groups,
+       .num_groups = ARRAY_SIZE(x2100_groups),
+       .functions = x2100_functions,
+       .num_functions = ARRAY_SIZE(x2100_functions),
+       .pull_ups = x2100_pull_ups,
+       .pull_downs = x2100_pull_downs,
+ };
  static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)
  {
        unsigned int val;
@@@ -3080,7 -3469,7 +3469,7 @@@ static void ingenic_gpio_irq_handler(st
                flag = ingenic_gpio_read_reg(jzgc, JZ4730_GPIO_GPFR);
  
        for_each_set_bit(i, &flag, 32)
 -              generic_handle_irq(irq_linear_revmap(gc->irq.domain, i));
 +              generic_handle_domain_irq(gc->irq.domain, i);
        chained_irq_exit(irq_chip, desc);
  }
  
@@@ -3441,17 -3830,17 +3830,17 @@@ static void ingenic_set_bias(struct ing
  {
        if (jzpc->info->version >= ID_X2000) {
                switch (bias) {
-               case PIN_CONFIG_BIAS_PULL_UP:
+               case GPIO_PULL_UP:
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, false);
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, true);
                        break;
  
-               case PIN_CONFIG_BIAS_PULL_DOWN:
+               case GPIO_PULL_DOWN:
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, false);
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, true);
                        break;
  
-               case PIN_CONFIG_BIAS_DISABLE:
+               case GPIO_PULL_DIS:
                default:
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, false);
                        ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, false);
@@@ -3654,19 -4043,20 +4043,20 @@@ static const struct regmap_config ingen
        .reg_stride = 4,
  };
  
- static const struct of_device_id ingenic_gpio_of_match[] __initconst = {
-       { .compatible = "ingenic,jz4730-gpio", },
-       { .compatible = "ingenic,jz4740-gpio", },
-       { .compatible = "ingenic,jz4725b-gpio", },
-       { .compatible = "ingenic,jz4750-gpio", },
-       { .compatible = "ingenic,jz4755-gpio", },
-       { .compatible = "ingenic,jz4760-gpio", },
-       { .compatible = "ingenic,jz4770-gpio", },
-       { .compatible = "ingenic,jz4775-gpio", },
-       { .compatible = "ingenic,jz4780-gpio", },
-       { .compatible = "ingenic,x1000-gpio", },
-       { .compatible = "ingenic,x1830-gpio", },
-       { .compatible = "ingenic,x2000-gpio", },
+ static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
+       { .compatible = "ingenic,jz4730-gpio" },
+       { .compatible = "ingenic,jz4740-gpio" },
+       { .compatible = "ingenic,jz4725b-gpio" },
+       { .compatible = "ingenic,jz4750-gpio" },
+       { .compatible = "ingenic,jz4755-gpio" },
+       { .compatible = "ingenic,jz4760-gpio" },
+       { .compatible = "ingenic,jz4770-gpio" },
+       { .compatible = "ingenic,jz4775-gpio" },
+       { .compatible = "ingenic,jz4780-gpio" },
+       { .compatible = "ingenic,x1000-gpio" },
+       { .compatible = "ingenic,x1830-gpio" },
+       { .compatible = "ingenic,x2000-gpio" },
+       { .compatible = "ingenic,x2100-gpio" },
        {},
  };
  
@@@ -3759,6 -4149,7 +4149,7 @@@ static int __init ingenic_pinctrl_probe
        void __iomem *base;
        const struct ingenic_chip_info *chip_info;
        struct device_node *node;
+       struct regmap_config regmap_config;
        unsigned int i;
        int err;
  
        if (IS_ERR(base))
                return PTR_ERR(base);
  
-       jzpc->map = devm_regmap_init_mmio(dev, base,
-                       &ingenic_pinctrl_regmap_config);
+       regmap_config = ingenic_pinctrl_regmap_config;
+       regmap_config.max_register = chip_info->num_chips * chip_info->reg_offset;
+       jzpc->map = devm_regmap_init_mmio(dev, base, &regmap_config);
        if (IS_ERR(jzpc->map)) {
                dev_err(dev, "Failed to create regmap\n");
                return PTR_ERR(jzpc->map);
        dev_set_drvdata(dev, jzpc->map);
  
        for_each_child_of_node(dev->of_node, node) {
-               if (of_match_node(ingenic_gpio_of_match, node)) {
+               if (of_match_node(ingenic_gpio_of_matches, node)) {
                        err = ingenic_gpio_probe(jzpc, node);
                        if (err) {
                                of_node_put(node);
  
  #define IF_ENABLED(cfg, ptr)  PTR_IF(IS_ENABLED(cfg), (ptr))
  
- static const struct of_device_id ingenic_pinctrl_of_match[] = {
+ static const struct of_device_id ingenic_pinctrl_of_matches[] = {
        {
                .compatible = "ingenic,jz4730-pinctrl",
                .data = IF_ENABLED(CONFIG_MACH_JZ4730, &jz4730_chip_info)
                .compatible = "ingenic,x2000e-pinctrl",
                .data = IF_ENABLED(CONFIG_MACH_X2000, &x2000_chip_info)
        },
+       {
+               .compatible = "ingenic,x2100-pinctrl",
+               .data = IF_ENABLED(CONFIG_MACH_X2100, &x2100_chip_info)
+       },
        { /* sentinel */ },
  };
  
  static struct platform_driver ingenic_pinctrl_driver = {
        .driver = {
                .name = "pinctrl-ingenic",
-               .of_match_table = ingenic_pinctrl_of_match,
+               .of_match_table = ingenic_pinctrl_of_matches,
        },
  };
  
index aa6e72214609a2dd499cbedebac5b24b0cc60406,d8b4dc40f3c6cf0bd421ce4dac9bf79bf8d3b67c..67bec7ea0f8b0bfc3c7abf2d854096f8f4f9ea6b
@@@ -1115,7 -1115,7 +1115,7 @@@ static int pcs_parse_bits_in_pinctrl_en
  {
        const char *name = "pinctrl-single,bits";
        struct pcs_func_vals *vals;
-       int rows, *pins, found = 0, res = -ENOMEM, i, fsel, gsel;
+       int rows, *pins, found = 0, res = -ENOMEM, i, fsel;
        int npins_in_row;
        struct pcs_function *function = NULL;
  
                return -EINVAL;
        }
  
+       if (PCS_HAS_PINCONF) {
+               dev_err(pcs->dev, "pinconf not supported\n");
+               return -ENOTSUPP;
+       }
        npins_in_row = pcs->width / pcs->bits_per_pin;
  
        vals = devm_kzalloc(pcs->dev,
                goto free_pins;
        }
  
-       gsel = pinctrl_generic_add_group(pcs->pctl, np->name, pins, found, pcs);
-       if (gsel < 0) {
-               res = gsel;
+       res = pinctrl_generic_add_group(pcs->pctl, np->name, pins, found, pcs);
+       if (res < 0)
                goto free_function;
-       }
  
        (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
        (*map)->data.mux.group = np->name;
        (*map)->data.mux.function = np->name;
  
-       if (PCS_HAS_PINCONF) {
-               dev_err(pcs->dev, "pinconf not supported\n");
-               goto free_pingroups;
-       }
        *num_maps = 1;
        mutex_unlock(&pcs->mutex);
  
        return 0;
  
- free_pingroups:
-       pinctrl_generic_remove_group(pcs->pctl, gsel);
-       *num_maps = 1;
  free_function:
        pinmux_generic_remove_function(pcs->pctl, fsel);
  free_pins:
@@@ -1491,8 -1486,8 +1486,8 @@@ static int pcs_irq_handle(struct pcs_so
                mask = pcs->read(pcswi->reg);
                raw_spin_unlock(&pcs->lock);
                if (mask & pcs_soc->irq_status_mask) {
 -                      generic_handle_irq(irq_find_mapping(pcs->domain,
 -                                                          pcswi->hwirq));
 +                      generic_handle_domain_irq(pcs->domain,
 +                                                pcswi->hwirq);
                        count++;
                }
        }
index cad4e60df618c86a057ee9dfb6ab1962dd86f03e,2bc6206555506190c785a03f30d68299fce56f62..32ea2a8ec02b54a1b9323cd5cc6c1663403f774a
@@@ -13,7 -13,7 +13,7 @@@ config PINCTRL_MS
  
  config PINCTRL_APQ8064
        tristate "Qualcomm APQ8064 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
@@@ -21,7 -21,7 +21,7 @@@
  
  config PINCTRL_APQ8084
        tristate "Qualcomm APQ8084 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
@@@ -29,7 -29,7 +29,7 @@@
  
  config PINCTRL_IPQ4019
        tristate "Qualcomm IPQ4019 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
@@@ -37,7 -37,7 +37,7 @@@
  
  config PINCTRL_IPQ8064
        tristate "Qualcomm IPQ8064 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
@@@ -45,7 -45,7 +45,7 @@@
  
  config PINCTRL_IPQ8074
        tristate "Qualcomm Technologies, Inc. IPQ8074 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for
@@@ -55,7 -55,7 +55,7 @@@
  
  config PINCTRL_IPQ6018
        tristate "Qualcomm Technologies, Inc. IPQ6018 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for
@@@ -65,7 -65,7 +65,7 @@@
  
  config PINCTRL_MSM8226
        tristate "Qualcomm 8226 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
@@@ -74,7 -74,7 +74,7 @@@
  
  config PINCTRL_MSM8660
        tristate "Qualcomm 8660 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8960
        tristate "Qualcomm 8960 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
          Qualcomm TLMM block found in the Qualcomm 8960 platform.
  
+ config PINCTRL_MDM9607
+       tristate "Qualcomm 9607 pin controller driver"
+       depends on GPIOLIB && OF
+       depends on PINCTRL_MSM
+       help
+         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+         Qualcomm TLMM block found in the Qualcomm 9607 platform.
  config PINCTRL_MDM9615
        tristate "Qualcomm 9615 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8X74
        tristate "Qualcomm 8x74 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8916
        tristate "Qualcomm 8916 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8953
        tristate "Qualcomm 8953 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8976
        tristate "Qualcomm 8976 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8994
        tristate "Qualcomm 8994 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8996
        tristate "Qualcomm MSM8996 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_MSM8998
        tristate "Qualcomm MSM8998 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_QCS404
        tristate "Qualcomm QCS404 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_QDF2XXX
        tristate "Qualcomm Technologies QDF2xxx pin controller driver"
 -      depends on GPIOLIB && ACPI
 +      depends on ACPI
        depends on PINCTRL_MSM
        help
          This is the GPIO driver for the TLMM block found on the
  
  config PINCTRL_QCOM_SPMI_PMIC
        tristate "Qualcomm SPMI PMIC pin controller driver"
 -      depends on GPIOLIB && OF && SPMI
 +      depends on OF && SPMI
        select REGMAP_SPMI
        select PINMUX
        select PINCONF
  
  config PINCTRL_QCOM_SSBI_PMIC
        tristate "Qualcomm SSBI PMIC pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        select PINMUX
        select PINCONF
        select GENERIC_PINCONF
  
  config PINCTRL_SC7180
        tristate "Qualcomm Technologies Inc SC7180 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SC7280
        tristate "Qualcomm Technologies Inc SC7280 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SC8180X
        tristate "Qualcomm Technologies Inc SC8180x pin controller driver"
 -      depends on GPIOLIB && (OF || ACPI)
 +      depends on (OF || ACPI)
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SDM660
        tristate "Qualcomm Technologies Inc SDM660 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SDM845
        tristate "Qualcomm Technologies Inc SDM845 pin controller driver"
 -      depends on GPIOLIB && (OF || ACPI)
 +      depends on (OF || ACPI)
        depends on PINCTRL_MSM
        help
         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SDX55
        tristate "Qualcomm Technologies Inc SDX55 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
         Qualcomm Technologies Inc TLMM block found on the Qualcomm
         Technologies Inc SDX55 platform.
  
+ config PINCTRL_SM6115
+       tristate "Qualcomm Technologies Inc SM6115,SM4250 pin controller driver"
+       depends on GPIOLIB && OF
+       depends on PINCTRL_MSM
+       help
+        This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+        Qualcomm Technologies Inc TLMM block found on the Qualcomm
+        Technologies Inc SM6115 and SM4250 platforms.
  config PINCTRL_SM6125
        tristate "Qualcomm Technologies Inc SM6125 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SM8150
        tristate "Qualcomm Technologies Inc SM8150 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
         This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SM8250
        tristate "Qualcomm Technologies Inc SM8250 pin controller driver"
 -      depends on GPIOLIB && OF
 +      depends on OF
        depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
  
  config PINCTRL_SM8350
        tristate "Qualcomm Technologies Inc SM8350 pin controller driver"
 -      depends on GPIOLIB && OF
 -      select PINCTRL_MSM
 +      depends on PINCTRL_MSM
        help
          This is the pinctrl, pinmux, pinconf and gpiolib driver for the
          Qualcomm Technologies Inc TLMM block found on the Qualcomm
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