drm/i915/gt: s/gen3/gen2/

Now that we use the gen3 codepaths also for gen2
rename everything to gen2_ to match.

Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Jani Nikula <[email protected]>

diff --git a/drivers/gpu/drm/i915/gt/gen2_engine_cs.c b/drivers/gpu/drm/i915/gt/gen2_engine_cs.c
index 54077cab8e16658e04df3d9b3d14ee055dfd5e9d..4904d0f4162c62ff60ea9fefe3a9bd3abf06683f 100644 (file)
--- a/drivers/gpu/drm/i915/gt/gen2_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen2_engine_cs.c
@@ -169,7 +169,7 @@ static u32 *__gen2_emit_breadcrumb(struct i915_request *rq, u32 *cs,
        return cs;
 }
 
-u32 *gen3_emit_breadcrumb(struct i915_request *rq, u32 *cs)
+u32 *gen2_emit_breadcrumb(struct i915_request *rq, u32 *cs)
 {
        return __gen2_emit_breadcrumb(rq, cs, 16, 8);
 }
@@ -248,7 +248,7 @@ int i830_emit_bb_start(struct i915_request *rq,
        return 0;
 }
 
-int gen3_emit_bb_start(struct i915_request *rq,
+int gen2_emit_bb_start(struct i915_request *rq,
                       u64 offset, u32 len,
                       unsigned int dispatch_flags)
 {
@@ -290,14 +290,14 @@ int gen4_emit_bb_start(struct i915_request *rq,
        return 0;
 }
 
-void gen3_irq_enable(struct intel_engine_cs *engine)
+void gen2_irq_enable(struct intel_engine_cs *engine)
 {
        engine->i915->irq_mask &= ~engine->irq_enable_mask;
        intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask);
        intel_uncore_posting_read_fw(engine->uncore, GEN2_IMR);
 }
 
-void gen3_irq_disable(struct intel_engine_cs *engine)
+void gen2_irq_disable(struct intel_engine_cs *engine)
 {
        engine->i915->irq_mask |= engine->irq_enable_mask;
        intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask);

diff --git a/drivers/gpu/drm/i915/gt/gen2_engine_cs.h b/drivers/gpu/drm/i915/gt/gen2_engine_cs.h
index 2f707620b3d44073bc85d712fe808f9882b53f4d..7b37560fc3563dd8c905bcb3b82fc34adc54fa01 100644 (file)
--- a/drivers/gpu/drm/i915/gt/gen2_engine_cs.h
+++ b/drivers/gpu/drm/i915/gt/gen2_engine_cs.h
@@ -15,21 +15,21 @@ int gen2_emit_flush(struct i915_request *rq, u32 mode);
 int gen4_emit_flush_rcs(struct i915_request *rq, u32 mode);
 int gen4_emit_flush_vcs(struct i915_request *rq, u32 mode);
 
-u32 *gen3_emit_breadcrumb(struct i915_request *rq, u32 *cs);
+u32 *gen2_emit_breadcrumb(struct i915_request *rq, u32 *cs);
 u32 *gen5_emit_breadcrumb(struct i915_request *rq, u32 *cs);
 
 int i830_emit_bb_start(struct i915_request *rq,
                       u64 offset, u32 len,
                       unsigned int dispatch_flags);
-int gen3_emit_bb_start(struct i915_request *rq,
+int gen2_emit_bb_start(struct i915_request *rq,
                       u64 offset, u32 len,
                       unsigned int dispatch_flags);
 int gen4_emit_bb_start(struct i915_request *rq,
                       u64 offset, u32 length,
                       unsigned int dispatch_flags);
 
-void gen3_irq_enable(struct intel_engine_cs *engine);
-void gen3_irq_disable(struct intel_engine_cs *engine);
+void gen2_irq_enable(struct intel_engine_cs *engine);
+void gen2_irq_disable(struct intel_engine_cs *engine);
 void gen5_irq_enable(struct intel_engine_cs *engine);
 void gen5_irq_disable(struct intel_engine_cs *engine);
 

diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 694cb79d5452b5fed798f7ddb3b6b4ab80f1e48e..3ec8bc01058b4e472587e149f97d9cb29aae5f41 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -1091,8 +1091,8 @@ static void setup_irq(struct intel_engine_cs *engine)
                engine->irq_enable = gen5_irq_enable;
                engine->irq_disable = gen5_irq_disable;
        } else {
-               engine->irq_enable = gen3_irq_enable;
-               engine->irq_disable = gen3_irq_disable;
+               engine->irq_enable = gen2_irq_enable;
+               engine->irq_disable = gen2_irq_disable;
        }
 }
 
@@ -1143,7 +1143,7 @@ static void setup_common(struct intel_engine_cs *engine)
         * equivalent to our next initial bread so we can elide
         * engine->emit_init_breadcrumb().
         */
-       engine->emit_fini_breadcrumb = gen3_emit_breadcrumb;
+       engine->emit_fini_breadcrumb = gen2_emit_breadcrumb;
        if (GRAPHICS_VER(i915) == 5)
                engine->emit_fini_breadcrumb = gen5_emit_breadcrumb;
 
@@ -1156,7 +1156,7 @@ static void setup_common(struct intel_engine_cs *engine)
        else if (IS_I830(i915) || IS_I845G(i915))
                engine->emit_bb_start = i830_emit_bb_start;
        else
-               engine->emit_bb_start = gen3_emit_bb_start;
+               engine->emit_bb_start = gen2_emit_bb_start;
 }
 
 static void setup_rcs(struct intel_engine_cs *engine)