]> Git Repo - J-linux.git/commitdiff
ARM: dts: uniphier: update to new Denali NAND binding
authorMasahiro Yamada <[email protected]>
Fri, 21 Jun 2019 10:53:16 +0000 (19:53 +0900)
committerMasahiro Yamada <[email protected]>
Tue, 25 Jun 2019 15:06:50 +0000 (00:06 +0900)
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

In the new binding, the number of connected chips are described in
DT instead of run-time probed.

I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().

I changed all the pinctrl properties to use the single CS.

Signed-off-by: Masahiro Yamada <[email protected]>
arch/arm/boot/dts/uniphier-ld4-ref.dts
arch/arm/boot/dts/uniphier-ld4.dtsi
arch/arm/boot/dts/uniphier-ld6b-ref.dts
arch/arm/boot/dts/uniphier-pro4-ref.dts
arch/arm/boot/dts/uniphier-pro4.dtsi
arch/arm/boot/dts/uniphier-pro5.dtsi
arch/arm/boot/dts/uniphier-pxs2.dtsi
arch/arm/boot/dts/uniphier-sld8-ref.dts
arch/arm/boot/dts/uniphier-sld8.dtsi

index 3aaca10f6644ab25f739403ae4550105b40763c3..f2d060f403cc05306b9d930ffae65cc4eb199a8e 100644 (file)
@@ -77,4 +77,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };
index c2706cef0b8a1105ab539f3be9efd18c1dcab1ee..58cd4e8fa5beea9f03d7d8de17a7daa67eeab0ce 100644 (file)
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_nand2cs>;
+                       pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
index 3d9080ee7aef73b5a1642757d5931b5345e698a6..60994b6e8b99946dc27b350aeb13474daab4e62d 100644 (file)
@@ -90,4 +90,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };
index 28038b17bbb3a784975ee4a5add93478ee1752a1..854f2eba3e72ef173597423b772b3d1306c8bebd 100644 (file)
@@ -98,4 +98,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };
index 97d051ef4968abfa28d1575348b8a12c42bc1d78..7f64e5a616d6bb687e0c5a44131baab708492c31 100644 (file)
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
index 3657387394126b802de7e2eb918f609de4585960..eff74717b37c6ce29e8ffb0570ebfc3bb834e1de 100644 (file)
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_nand2cs>;
+                       pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
index 06a049f6edf8082549180d887f767c4a8eb4a838..4eddbb8d7fcac0a1ea8915b8553d5450ab767fb5 100644 (file)
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_nand2cs>;
+                       pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
index 01bf94c6b93aeabacb954fbcf1dd1efdf02b313b..cf9ea0b1506522701f967e929a7a8e0e4aed9f1e 100644 (file)
@@ -81,4 +81,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };
index efce02768b6fb5b44798ca291f1c5d699a7e00c4..cbebb6e4c6167ee9b7a0e05f5b7a1e0e1a55a361 100644 (file)
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_nand2cs>;
+                       pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
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